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author | Alex Frid <afrid@nvidia.com> | 2014-02-21 23:25:37 -0800 |
---|---|---|
committer | Yu-Huan Hsu <yhsu@nvidia.com> | 2014-02-24 11:47:56 -0800 |
commit | ada321f30039993c2ad9fe2c90e029bcbe130afc (patch) | |
tree | 560e80050c549c8ede62a664fc2200642ef666d6 | |
parent | da59523e227b5102217530619a6d32f882d0e521 (diff) |
regulator: DFLL bypass: Add Tegra13 PWM compatibility
Added DFLL bypass driver compatibility with DFLL PWM in Tegra132 SoC.
Bug 1442709
Change-Id: I4b2b4a2c6e969051b0aa695446205d6fbc2eab5c
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/373258
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
-rw-r--r-- | drivers/regulator/tegra-dfll-bypass-regulator.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/regulator/tegra-dfll-bypass-regulator.c b/drivers/regulator/tegra-dfll-bypass-regulator.c index ecd5236e57a8..57717c69a654 100644 --- a/drivers/regulator/tegra-dfll-bypass-regulator.c +++ b/drivers/regulator/tegra-dfll-bypass-regulator.c @@ -153,6 +153,7 @@ static struct regulator_ops tegra_dfll_bypass_rops = { static struct of_device_id of_tegra_dfll_bypass_pwm_match_tbl[] = { { .compatible = "nvidia,tegra124-dfll-pwm", }, + { .compatible = "nvidia,tegra132-dfll-pwm", }, }; static struct of_device_id of_tegra_dfll_bypass_regulator_match_tbl[] = { |