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authorVineet Gupta <vgupta@synopsys.com>2014-06-25 17:16:04 +0530
committerVineet Gupta <vgupta@synopsys.com>2014-07-23 11:17:55 +0530
commit878f46c71e99cfb6d8e4e15a561db63a3c9601e5 (patch)
tree5e41401f5aeb29f8253d7fd335ccc2464ea8b844
parentc16e3e22839a33e1485b950ff7e86e58a862adea (diff)
ARC: [intc] don't mask all IRQ by default
Hardware keeps them enabled on reset, and Linux needs to keep status quo. Any spurious interrupts will be reported/blocked by genirq. This helps remove a SMP IRQ quirk (next commit), where a peripheral IRQ is hard wired to core0, and request_irq()->unmask() happens on core1, keeping the IRQ masked on core0, needing an explicit unmask. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
-rw-r--r--arch/arc/kernel/irq.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/arch/arc/kernel/irq.c b/arch/arc/kernel/irq.c
index 835fa5e71b62..02ffc764c97a 100644
--- a/arch/arc/kernel/irq.c
+++ b/arch/arc/kernel/irq.c
@@ -19,21 +19,16 @@
/*
* Early Hardware specific Interrupt setup
+ * -Platform independent, needed for each CPU (not foldable into init_IRQ)
* -Called very early (start_kernel -> setup_arch -> setup_processor)
- * -Platform Independent (must for any ARC700)
- * -Needed for each CPU (hence not foldable into init_IRQ)
*
* what it does ?
- * -Disable all IRQs (on CPU side)
* -Optionally, setup the High priority Interrupts as Level 2 IRQs
*/
void arc_init_IRQ(void)
{
int level_mask = 0;
- /* Disable all IRQs: enable them as devices request */
- write_aux_reg(AUX_IENABLE, 0);
-
/* setup any high priority Interrupts (Level2 in ARCompact jargon) */
level_mask |= IS_ENABLED(CONFIG_ARC_IRQ3_LV2) << 3;
level_mask |= IS_ENABLED(CONFIG_ARC_IRQ5_LV2) << 5;