diff options
| author | minwuklee <mlee@nvidia.com> | 2010-12-06 13:55:52 +0900 |
|---|---|---|
| committer | Bharat Nihalani <bnihalani@nvidia.com> | 2010-12-07 01:02:43 -0800 |
| commit | ca1049c4b06fad1321d683503c7ac1400370e8d2 (patch) | |
| tree | d6981bef3c653878e091b64cab69e02062bf204d | |
| parent | cf1b67dab294e70458e4623f919384e949af8531 (diff) | |
[tegra:dma] set dma burst size for spi/slink
for spi/slink, depending on transfer size,
burst size can be set to 1, 4, or 8.
bug 747979
Change-Id: Ieae0285d374e7d0eb6c2c2e633f8cafbb2b51b3a
Reviewed-on: http://git-master/r/12076
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
| -rwxr-xr-x | arch/arm/mach-tegra/dma.c | 7 | ||||
| -rwxr-xr-x | drivers/spi/spi_tegra.c | 4 |
2 files changed, 8 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/dma.c b/arch/arm/mach-tegra/dma.c index e0a77a50d092..001dbcc14bfc 100755 --- a/arch/arm/mach-tegra/dma.c +++ b/arch/arm/mach-tegra/dma.c @@ -478,12 +478,15 @@ static void tegra_dma_update_hw(struct tegra_dma_channel *ch, case TEGRA_DMA_REQ_SEL_SL2B4: case TEGRA_DMA_REQ_SEL_SPI: /* For spi/slink the burst size based on transfer size - * i.e. if multiple of 16 bytes then busrt is + * i.e. if multiple of 32 bytes then busrt is + * 8 word else if multiple of 16 bytes then burst is * 4 word else burst size is 1 word */ if (req->size & 0xF) ahb_seq |= AHB_SEQ_BURST_1; - else + else if ((req->size >> 4) & 0x1) ahb_seq |= AHB_SEQ_BURST_4; + else + ahb_seq |= AHB_SEQ_BURST_8; break; default: ahb_seq |= AHB_SEQ_BURST_1; diff --git a/drivers/spi/spi_tegra.c b/drivers/spi/spi_tegra.c index 5d7100085a5c..9470f1f438ad 100755 --- a/drivers/spi/spi_tegra.c +++ b/drivers/spi/spi_tegra.c @@ -201,8 +201,10 @@ static void spi_tegra_go(struct spi_tegra_data *tspi) val &= ~SLINK_TX_TRIG_MASK & ~SLINK_RX_TRIG_MASK; if (tspi->rx_dma_req.size & 0xF) { val |= SLINK_TX_TRIG_1 | SLINK_RX_TRIG_1; - } else { + } else if ((tspi->rx_dma_req.size >> 4) & 0x1){ val |= SLINK_TX_TRIG_4 | SLINK_RX_TRIG_4; + } else { + val |= SLINK_TX_TRIG_8 | SLINK_RX_TRIG_8; } spi_tegra_writel(tspi, val, SLINK_DMA_CTL); } |