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authorStefan Agner <stefan.agner@toradex.com>2017-03-06 17:44:22 -0800
committerMarcel Ziswiler <marcel.ziswiler@toradex.com>2017-04-03 15:13:48 +0200
commit70f901b01c4ac4dfe741f91b76967a433674a37d (patch)
tree06af5ec814e5ffcfd86d436f9e359d4c0b4918f9
parent3e92301d12417baf5ed424da3a64081243eda2c2 (diff)
ARM: imx: busfreq: initialize M4 frequency depending boot state
Set low frequency state in case M4 start with 24MHz. This makes sure that Linux is aware of the M4 state and makes sure the bus frequency is not accidentally increased during suspend (bus_freq_pm_notify). Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
-rw-r--r--arch/arm/mach-imx/busfreq-imx.c14
-rw-r--r--arch/arm/mach-imx/common.h2
-rw-r--r--arch/arm/mach-imx/mu.c5
3 files changed, 15 insertions, 6 deletions
diff --git a/arch/arm/mach-imx/busfreq-imx.c b/arch/arm/mach-imx/busfreq-imx.c
index f1326582ca44..38540487429a 100644
--- a/arch/arm/mach-imx/busfreq-imx.c
+++ b/arch/arm/mach-imx/busfreq-imx.c
@@ -1225,15 +1225,17 @@ static int busfreq_probe(struct platform_device *pdev)
err = init_mmdc_lpddr2_settings(pdev);
}
- if (cpu_is_imx6sx() || cpu_is_imx7d()) {
- /* if M4 is enabled and rate > 24MHz, add high bus count */
- if (imx_src_is_m4_enabled() &&
- (clk_get_rate(m4_clk) > LPAPM_CLK))
+ if ((cpu_is_imx6sx() || cpu_is_imx7d()) && imx_src_is_m4_enabled()) {
+ /* if M4 at rate > 24MHz, add high bus count */
+ if (clk_get_rate(m4_clk) > LPAPM_CLK)
high_bus_count++;
+ else
+ imx_mu_set_m4_low_freq();
+
+ if (cpu_is_imx7d())
+ imx_mu_lpm_ready(true);
}
- if (cpu_is_imx7d() && imx_src_is_m4_enabled())
- imx_mu_lpm_ready(true);
if (err) {
dev_err(busfreq_dev, "Busfreq init of ddr controller failed\n");
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index c26801af32ae..d933ddf34300 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -93,8 +93,10 @@ bool imx_mu_is_m4_in_stop(void);
void imx_mu_set_m4_run_mode(void);
#ifdef CONFIG_HAVE_IMX_MU
int imx_mu_lpm_ready(bool ready);
+void imx_mu_set_m4_low_freq(void);
#else
static inline int imx_mu_lpm_ready(bool ready) { return 0; }
+static inline void imx_mu_set_m4_low_freq(void) { }
#endif
enum mxc_cpu_pwr_mode {
diff --git a/arch/arm/mach-imx/mu.c b/arch/arm/mach-imx/mu.c
index c992e586d8bc..e6ebd6c253d8 100644
--- a/arch/arm/mach-imx/mu.c
+++ b/arch/arm/mach-imx/mu.c
@@ -73,6 +73,11 @@ void imx_mu_set_m4_run_mode(void)
m4_in_stop = false;
}
+void imx_mu_set_m4_low_freq(void)
+{
+ m4_freq_low = true;
+}
+
bool imx_mu_is_m4_in_stop(void)
{
return m4_in_stop;