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authorPaul Walmsley <paul@pwsan.com>2011-09-13 19:52:14 -0600
committerPaul Walmsley <paul@pwsan.com>2011-09-14 15:44:30 -0600
commit9ed2ba7aa78ee35dda2cfc9a49b5cd4b2ae88500 (patch)
tree37b0c46a2e3d2f98f8d5c7948d1fe3fe7fc83e89
parent91d92d6cc86c9390b891a96e12a452a644c3ad76 (diff)
OMAP3: id: use explicit omap_revision codes for 3505/3517 ES levels
Use explicit revision codes for OMAP/AM 3505/3517 ES levels, as the rest of the OMAP2+ SoCs do in mach-omap2/cpu.c. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Sanjeev Premi <premi@ti.com> Tested-by: Igor Grinberg <grinberg@compulab.co.il> Tested-by: Abhilash Koyamangalath <abhilash.kv@ti.com>
-rw-r--r--arch/arm/mach-omap2/id.c10
-rw-r--r--arch/arm/plat-omap/include/plat/cpu.h3
2 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 9fae4de824e1..94a51cfc6483 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -312,7 +312,15 @@ static void __init omap3_check_revision(void)
*
* REVISIT: AM3505/AM3517 should have their own CHIP_IS
*/
- omap_revision = OMAP3517_REV(rev);
+ switch (rev) {
+ case 0:
+ omap_revision = OMAP3517_REV_ES1_0;
+ break;
+ case 1:
+ /* FALLTHROUGH */
+ default:
+ omap_revision = OMAP3517_REV_ES1_1;
+ }
omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
break;
case 0xb891:
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 34df1719462c..1debee9810d2 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -399,7 +399,8 @@ IS_OMAP_TYPE(3517, 0x3517)
#define OMAP3630_REV_ES1_2 (OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
#define OMAP3517_CLASS 0x35170034
-#define OMAP3517_REV(v) (OMAP3517_CLASS | (v << 8))
+#define OMAP3517_REV_ES1_0 OMAP3517_CLASS
+#define OMAP3517_REV_ES1_1 (OMAP3517_CLASS | (OMAP_REVBITS_01 << 8))
#define TI816X_CLASS 0x81600034
#define TI8168_REV_ES1_0 TI816X_CLASS