video: tegra: host: Use host1x_readl/writel

Introduce one set of functions to read/write host1x and host1x client
registers, and remove redundant ones.

Change-Id: I42ac706ec6c6f030175d0ee1d6a343ccaa7b7143
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/345613

10 files changed, 83 insertions, 132 deletions

diff --git a/drivers/video/tegra/host/bus_client.c b/drivers/video/tegra/host/bus_client.c
index 267e2abfbca3..5970e919e384 100644
--- a/drivers/video/tegra/host/bus_client.c
+++ b/drivers/video/tegra/host/bus_client.c
@@ -85,6 +85,23 @@ static __iomem void *get_aperture(struct platform_device *pdev)
 	return pdata->aperture[0];
 }
 
+void host1x_writel(struct platform_device *pdev, u32 r, u32 v)
+{
+	void __iomem *addr = get_aperture(pdev) + r;
+	nvhost_dbg(dbg_reg, " d=%s r=0x%x v=0x%x", pdev->name, r, v);
+	writel(v, addr);
+}
+EXPORT_SYMBOL_GPL(host1x_writel);
+
+u32 host1x_readl(struct platform_device *pdev, u32 r)
+{
+	void __iomem *addr = get_aperture(pdev) + r;
+	u32 v = readl(addr);
+	nvhost_dbg(dbg_reg, " d=%s r=0x%x v=0x%x", pdev->name, r, v);
+	return v;
+}
+EXPORT_SYMBOL_GPL(host1x_readl);
+
 int nvhost_read_module_regs(struct platform_device *ndev,
 			u32 offset, int count, u32 *values)
 {
@@ -137,23 +154,6 @@ int nvhost_write_module_regs(struct platform_device *ndev,
 	return 0;
 }
 
-bool nvhost_client_can_writel(struct platform_device *pdev)
-{
-	return !!get_aperture(pdev);
-}
-EXPORT_SYMBOL(nvhost_client_can_writel);
-
-void nvhost_client_writel(struct platform_device *pdev, u32 val, u32 reg)
-{
-	writel(val, get_aperture(pdev) + reg * 4);
-}
-EXPORT_SYMBOL(nvhost_client_writel);
-
-u32 nvhost_client_readl(struct platform_device *pdev, u32 reg)
-{
-	return readl(get_aperture(pdev) + reg * 4);
-}
-
 struct nvhost_channel_userctx {
 	struct nvhost_channel *ch;
 	struct nvhost_hwctx *hwctx;
diff --git a/drivers/video/tegra/host/bus_client.h b/drivers/video/tegra/host/bus_client.h
index a70b272b3fb4..a2d3d2347905 100644
--- a/drivers/video/tegra/host/bus_client.h
+++ b/drivers/video/tegra/host/bus_client.h
@@ -32,13 +32,6 @@ int nvhost_read_module_regs(struct platform_device *ndev,
 int nvhost_write_module_regs(struct platform_device *ndev,
 			u32 offset, int count, const u32 *values);
 
-bool nvhost_client_can_writel(struct platform_device *pdev);
-
-void nvhost_client_writel(struct platform_device *pdev,
-		u32 val, u32 reg);
-
-u32 nvhost_client_readl(struct platform_device *pdev, u32 reg);
-
 int nvhost_client_user_init(struct platform_device *dev);
 
 int nvhost_client_device_init(struct platform_device *dev);
diff --git a/drivers/video/tegra/host/dev.c b/drivers/video/tegra/host/dev.c
index 4f8b5af041ec..27d3d44b2e2d 100644
--- a/drivers/video/tegra/host/dev.c
+++ b/drivers/video/tegra/host/dev.c
@@ -136,20 +136,6 @@ void nvhost_set_register_sets(unsigned int r)
 	register_sets = r;
 }
 
-void nvhost_device_writel(struct platform_device *dev, u32 r, u32 v)
-{
-	struct nvhost_device_data *pdata = platform_get_drvdata(dev);
-	writel(v, pdata->aperture[0] + r);
-}
-EXPORT_SYMBOL_GPL(nvhost_device_writel);
-
-u32 nvhost_device_readl(struct platform_device *dev, u32 r)
-{
-	struct nvhost_device_data *pdata = platform_get_drvdata(dev);
-	return readl(pdata->aperture[0] + r);
-}
-EXPORT_SYMBOL_GPL(nvhost_device_readl);
-
 module_param_call(register_sets, NULL, param_get_uint, &register_sets, 0444);
 MODULE_PARM_DESC(register_sets, "Number of register sets");
 
diff --git a/drivers/video/tegra/host/isp/isp.c b/drivers/video/tegra/host/isp/isp.c
index d2d34874f77b..8f780ad56556 100644
--- a/drivers/video/tegra/host/isp/isp.c
+++ b/drivers/video/tegra/host/isp/isp.c
@@ -40,7 +40,7 @@
 #include <mach/latency_allowance.h>
 #include "isp.h"
 
-#define T12_ISP_CG_CTRL		0x1d
+#define T12_ISP_CG_CTRL		0x74
 #define T12_CG_2ND_LEVEL_EN	1
 #define T12_ISPB_DEV_ID		1
 
@@ -62,7 +62,7 @@ static struct of_device_id tegra_isp_of_match[] = {
 
 int nvhost_isp_t124_finalize_poweron(struct platform_device *pdev)
 {
-	nvhost_client_writel(pdev, T12_CG_2ND_LEVEL_EN, T12_ISP_CG_CTRL);
+	host1x_writel(pdev, T12_ISP_CG_CTRL, T12_CG_2ND_LEVEL_EN);
 	return 0;
 }
 
diff --git a/drivers/video/tegra/host/msenc/msenc.c b/drivers/video/tegra/host/msenc/msenc.c
index a4d886da8439..534f1d85b063 100644
--- a/drivers/video/tegra/host/msenc/msenc.c
+++ b/drivers/video/tegra/host/msenc/msenc.c
@@ -88,7 +88,7 @@ static int msenc_dma_wait_idle(struct platform_device *dev, u32 *timeout)
 
 	do {
 		u32 check = min_t(u32, MSENC_IDLE_CHECK_PERIOD, *timeout);
-		u32 dmatrfcmd = nvhost_device_readl(dev, msenc_dmatrfcmd_r());
+		u32 dmatrfcmd = host1x_readl(dev, msenc_dmatrfcmd_r());
 		u32 idle_v = msenc_dmatrfcmd_idle_v(dmatrfcmd);
 
 		if (msenc_dmatrfcmd_idle_true_v() == idle_v)
@@ -114,9 +114,9 @@ static int msenc_dma_pa_to_internal_256b(struct platform_device *dev,
 	if (imem)
 		cmd |= msenc_dmatrfcmd_imem_true_f();
 
-	nvhost_device_writel(dev, msenc_dmatrfmoffs_r(), i_offset);
-	nvhost_device_writel(dev, msenc_dmatrffboffs_r(), pa_offset);
-	nvhost_device_writel(dev, msenc_dmatrfcmd_r(), cmd);
+	host1x_writel(dev, msenc_dmatrfmoffs_r(), i_offset);
+	host1x_writel(dev, msenc_dmatrffboffs_r(), pa_offset);
+	host1x_writel(dev, msenc_dmatrfcmd_r(), cmd);
 
 	return msenc_dma_wait_idle(dev, &timeout);
 
@@ -129,7 +129,7 @@ static int msenc_wait_idle(struct platform_device *dev, u32 *timeout)
 
 	do {
 		u32 check = min_t(u32, MSENC_IDLE_CHECK_PERIOD, *timeout);
-		u32 w = nvhost_device_readl(dev, msenc_idlestate_r());
+		u32 w = host1x_readl(dev, msenc_idlestate_r());
 
 		if (!w)
 			return 0;
@@ -151,8 +151,8 @@ int msenc_boot(struct platform_device *dev)
 	if (!m || !m->valid)
 		return -ENOMEDIUM;
 
-	nvhost_device_writel(dev, msenc_dmactl_r(), 0);
-	nvhost_device_writel(dev, msenc_dmatrfbase_r(),
+	host1x_writel(dev, msenc_dmactl_r(), 0);
+	host1x_writel(dev, msenc_dmatrfbase_r(),
 		(m->phys + m->os.bin_data_offset) >> 8);
 
 	for (offset = 0; offset < m->os.data_size; offset += 256)
@@ -163,26 +163,26 @@ int msenc_boot(struct platform_device *dev)
 	msenc_dma_pa_to_internal_256b(dev, m->os.code_offset, 0, true);
 
 	/* setup msenc interrupts and enable interface */
-	nvhost_device_writel(dev, msenc_irqmset_r(),
+	host1x_writel(dev, msenc_irqmset_r(),
 			(msenc_irqmset_ext_f(0xff) |
 				msenc_irqmset_swgen1_set_f() |
 				msenc_irqmset_swgen0_set_f() |
 				msenc_irqmset_exterr_set_f() |
 				msenc_irqmset_halt_set_f()   |
 				msenc_irqmset_wdtmr_set_f()));
-	nvhost_device_writel(dev, msenc_irqdest_r(),
+	host1x_writel(dev, msenc_irqdest_r(),
 			(msenc_irqdest_host_ext_f(0xff) |
 				msenc_irqdest_host_swgen1_host_f() |
 				msenc_irqdest_host_swgen0_host_f() |
 				msenc_irqdest_host_exterr_host_f() |
 				msenc_irqdest_host_halt_host_f()));
-	nvhost_device_writel(dev, msenc_itfen_r(),
+	host1x_writel(dev, msenc_itfen_r(),
 			(msenc_itfen_mthden_enable_f() |
 				msenc_itfen_ctxen_enable_f()));
 
 	/* boot msenc */
-	nvhost_device_writel(dev, msenc_bootvec_r(), msenc_bootvec_vec_f(0));
-	nvhost_device_writel(dev, msenc_cpuctl_r(),
+	host1x_writel(dev, msenc_bootvec_r(), msenc_bootvec_vec_f(0));
+	host1x_writel(dev, msenc_cpuctl_r(),
 			msenc_cpuctl_startcpu_true_f());
 
 	timeout = 0; /* default */
diff --git a/drivers/video/tegra/host/tsec/tsec.c b/drivers/video/tegra/host/tsec/tsec.c
index e04a4cf2db3c..9316ab5bc9cc 100644
--- a/drivers/video/tegra/host/tsec/tsec.c
+++ b/drivers/video/tegra/host/tsec/tsec.c
@@ -92,7 +92,7 @@ static int tsec_dma_wait_idle(struct platform_device *dev, u32 *timeout)
 
 	do {
 		u32 check = min_t(u32, TSEC_IDLE_CHECK_PERIOD, *timeout);
-		u32 dmatrfcmd = nvhost_device_readl(dev, tsec_dmatrfcmd_r());
+		u32 dmatrfcmd = host1x_readl(dev, tsec_dmatrfcmd_r());
 		u32 idle_v = tsec_dmatrfcmd_idle_v(dmatrfcmd);
 
 		if (tsec_dmatrfcmd_idle_true_v() == idle_v)
@@ -118,9 +118,9 @@ static int tsec_dma_pa_to_internal_256b(struct platform_device *dev,
 	if (imem)
 		cmd |= tsec_dmatrfcmd_imem_true_f();
 
-	nvhost_device_writel(dev, tsec_dmatrfmoffs_r(), i_offset);
-	nvhost_device_writel(dev, tsec_dmatrffboffs_r(), pa_offset);
-	nvhost_device_writel(dev, tsec_dmatrfcmd_r(), cmd);
+	host1x_writel(dev, tsec_dmatrfmoffs_r(), i_offset);
+	host1x_writel(dev, tsec_dmatrffboffs_r(), pa_offset);
+	host1x_writel(dev, tsec_dmatrfcmd_r(), cmd);
 
 	return tsec_dma_wait_idle(dev, &timeout);
 
@@ -133,7 +133,7 @@ static int tsec_wait_idle(struct platform_device *dev, u32 *timeout)
 
 	do {
 		u32 check = min_t(u32, TSEC_IDLE_CHECK_PERIOD, *timeout);
-		u32 w = nvhost_device_readl(dev, tsec_idlestate_r());
+		u32 w = host1x_readl(dev, tsec_idlestate_r());
 
 		if (!w)
 			return 0;
@@ -149,19 +149,19 @@ static int tsec_load_kfuse(struct platform_device *pdev)
 	u32 val;
 	u32 timeout;
 
-	val = nvhost_device_readl(pdev, tsec_tegra_ctl_r());
+	val = host1x_readl(pdev, tsec_tegra_ctl_r());
 	val &= ~tsec_tegra_ctl_tkfi_kfuse_m();
-	nvhost_device_writel(pdev, tsec_tegra_ctl_r(), val);
+	host1x_writel(pdev, tsec_tegra_ctl_r(), val);
 
-	val = nvhost_device_readl(pdev, tsec_scp_ctl_pkey_r());
+	val = host1x_readl(pdev, tsec_scp_ctl_pkey_r());
 	val |= tsec_scp_ctl_pkey_request_reload_s();
-	nvhost_device_writel(pdev, tsec_scp_ctl_pkey_r(), val);
+	host1x_writel(pdev, tsec_scp_ctl_pkey_r(), val);
 
 	timeout = TSEC_IDLE_TIMEOUT_DEFAULT;
 
 	do {
 		u32 check = min_t(u32, TSEC_IDLE_CHECK_PERIOD, timeout);
-		u32 w = nvhost_device_readl(pdev, tsec_scp_ctl_pkey_r());
+		u32 w = host1x_readl(pdev, tsec_scp_ctl_pkey_r());
 
 		if (w & tsec_scp_ctl_pkey_loaded_m())
 			break;
@@ -169,9 +169,9 @@ static int tsec_load_kfuse(struct platform_device *pdev)
 		timeout -= check;
 	} while (timeout);
 
-	val = nvhost_device_readl(pdev, tsec_tegra_ctl_r());
+	val = host1x_readl(pdev, tsec_tegra_ctl_r());
 	val |= tsec_tegra_ctl_tkfi_kfuse_m();
-	nvhost_device_writel(pdev, tsec_tegra_ctl_r(), val);
+	host1x_writel(pdev, tsec_tegra_ctl_r(), val);
 
 	if (timeout)
 		return 0;
@@ -192,8 +192,8 @@ int tsec_boot(struct platform_device *dev)
 	if (m->is_booted)
 		return 0;
 
-	nvhost_device_writel(dev, tsec_dmactl_r(), 0);
-	nvhost_device_writel(dev, tsec_dmatrfbase_r(),
+	host1x_writel(dev, tsec_dmactl_r(), 0);
+	host1x_writel(dev, tsec_dmatrfbase_r(),
 		(m->dma_addr + m->os.bin_data_offset) >> 8);
 
 	for (offset = 0; offset < m->os.data_size; offset += 256)
@@ -207,9 +207,9 @@ int tsec_boot(struct platform_device *dev)
 
 
 	/* boot tsec */
-	nvhost_device_writel(dev, tsec_bootvec_r(),
+	host1x_writel(dev, tsec_bootvec_r(),
 			     tsec_bootvec_vec_f(TSEC_OS_START_OFFSET));
-	nvhost_device_writel(dev, tsec_cpuctl_r(),
+	host1x_writel(dev, tsec_cpuctl_r(),
 			tsec_cpuctl_startcpu_true_f());
 
 	timeout = 0; /* default */
@@ -221,7 +221,7 @@ int tsec_boot(struct platform_device *dev)
 	}
 
 	/* setup tsec interrupts and enable interface */
-	nvhost_device_writel(dev, tsec_irqmset_r(),
+	host1x_writel(dev, tsec_irqmset_r(),
 			(tsec_irqmset_ext_f(0xff) |
 				tsec_irqmset_swgen1_set_f() |
 				tsec_irqmset_swgen0_set_f() |
@@ -229,7 +229,7 @@ int tsec_boot(struct platform_device *dev)
 				tsec_irqmset_halt_set_f()   |
 				tsec_irqmset_wdtmr_set_f()));
 
-	nvhost_device_writel(dev, tsec_itfen_r(),
+	host1x_writel(dev, tsec_itfen_r(),
 			(tsec_itfen_mthden_enable_f() |
 				tsec_itfen_ctxen_enable_f()));
 
diff --git a/drivers/video/tegra/host/vi/tegra_vi.c b/drivers/video/tegra/host/vi/tegra_vi.c
index af0a68732685..5552b1f2e58c 100644
--- a/drivers/video/tegra/host/vi/tegra_vi.c
+++ b/drivers/video/tegra/host/vi/tegra_vi.c
@@ -31,10 +31,10 @@
 
 static DEFINE_MUTEX(la_lock);
 
-#define T12_VI_CFG_CG_CTRL	0x2e
+#define T12_VI_CFG_CG_CTRL	0xb8
 #define T12_CG_2ND_LEVEL_EN	1
-#define T12_VI_CSI_0_SW_RESET	0x40
-#define T12_VI_CSI_1_SW_RESET	0x80
+#define T12_VI_CSI_0_SW_RESET	0x100
+#define T12_VI_CSI_1_SW_RESET	0x200
 #define T12_VI_CSI_SW_RESET_MCCIF_RESET 3
 
 #ifdef TEGRA_12X_OR_HIGHER_CONFIG
@@ -75,9 +75,7 @@ int nvhost_vi_finalize_poweron(struct platform_device *dev)
 		}
 	}
 
-	if (nvhost_client_can_writel(dev))
-		nvhost_client_writel(dev,
-				T12_CG_2ND_LEVEL_EN, T12_VI_CFG_CG_CTRL);
+	host1x_writel(dev, T12_VI_CFG_CG_CTRL, T12_CG_2ND_LEVEL_EN);
 
  fail:
 	return ret;
@@ -233,11 +231,10 @@ void nvhost_vi_reset(struct platform_device *pdev)
 	else
 		reset_reg = T12_VI_CSI_1_SW_RESET;
 
-	nvhost_client_writel(pdev, T12_VI_CSI_SW_RESET_MCCIF_RESET,
-			reset_reg);
+	host1x_writel(pdev, reset_reg, T12_VI_CSI_SW_RESET_MCCIF_RESET);
 
 	udelay(10);
 
-	nvhost_client_writel(pdev, 0, reset_reg);
+	host1x_writel(pdev, reset_reg, 0);
 }
 
diff --git a/drivers/video/tegra/host/vic03/vic03.c b/drivers/video/tegra/host/vic03/vic03.c
index 8dc6b8b32eea..35816243e0b5 100644
--- a/drivers/video/tegra/host/vic03/vic03.c
+++ b/drivers/video/tegra/host/vic03/vic03.c
@@ -80,11 +80,9 @@ static char *vic_get_fw_name(struct platform_device *dev)
 
 #define VIC_IDLE_TIMEOUT_DEFAULT	10000	/* 10 milliseconds */
 #define VIC_IDLE_CHECK_PERIOD	10		/* 10 usec */
-static int vic03_flcn_wait_idle(struct platform_device *dev,
+static int vic03_flcn_wait_idle(struct platform_device *pdev,
 				u32 *timeout)
 {
-	struct vic03 *v = get_vic03(dev);
-
 	nvhost_dbg_fn("");
 
 	if (!*timeout)
@@ -92,7 +90,7 @@ static int vic03_flcn_wait_idle(struct platform_device *dev,
 
 	do {
 		u32 check = min_t(u32, VIC_IDLE_CHECK_PERIOD, *timeout);
-		u32 w = vic03_readl(v, flcn_idlestate_r());
+		u32 w = host1x_readl(pdev, flcn_idlestate_r());
 
 		if (!w) {
 			nvhost_dbg_fn("done");
@@ -102,14 +100,13 @@ static int vic03_flcn_wait_idle(struct platform_device *dev,
 		*timeout -= check;
 	} while (*timeout);
 
-	dev_err(&dev->dev, "vic03 flcn idle timeout");
+	dev_err(&pdev->dev, "vic03 flcn idle timeout");
 
 	return -1;
 }
 
-static int vic03_flcn_dma_wait_idle(struct platform_device *dev, u32 *timeout)
+static int vic03_flcn_dma_wait_idle(struct platform_device *pdev, u32 *timeout)
 {
-	struct vic03 *v = get_vic03(dev);
 	nvhost_dbg_fn("");
 
 	if (!*timeout)
@@ -117,7 +114,7 @@ static int vic03_flcn_dma_wait_idle(struct platform_device *dev, u32 *timeout)
 
 	do {
 		u32 check = min_t(u32, VIC_IDLE_CHECK_PERIOD, *timeout);
-		u32 dmatrfcmd = vic03_readl(v, flcn_dmatrfcmd_r());
+		u32 dmatrfcmd = host1x_readl(pdev, flcn_dmatrfcmd_r());
 		u32 idle_v = flcn_dmatrfcmd_idle_v(dmatrfcmd);
 
 		if (flcn_dmatrfcmd_idle_true_v() == idle_v) {
@@ -128,19 +125,17 @@ static int vic03_flcn_dma_wait_idle(struct platform_device *dev, u32 *timeout)
 		*timeout -= check;
 	} while (*timeout);
 
-	dev_err(&dev->dev, "vic03 dma idle timeout");
+	dev_err(&pdev->dev, "vic03 dma idle timeout");
 
 	return -1;
 }
 
 
-static int vic03_flcn_dma_pa_to_internal_256b(struct platform_device *dev,
+static int vic03_flcn_dma_pa_to_internal_256b(struct platform_device *pdev,
 					      phys_addr_t pa,
 					      u32 internal_offset,
 					      bool imem)
 {
-	struct vic03 *v = get_vic03(dev);
-
 	u32 cmd = flcn_dmatrfcmd_size_256b_f();
 	u32 pa_offset =  flcn_dmatrffboffs_offs_f(pa);
 	u32 i_offset = flcn_dmatrfmoffs_offs_f(internal_offset);
@@ -149,11 +144,11 @@ static int vic03_flcn_dma_pa_to_internal_256b(struct platform_device *dev,
 	if (imem)
 		cmd |= flcn_dmatrfcmd_imem_true_f();
 
-	vic03_writel(v, flcn_dmatrfmoffs_r(), i_offset);
-	vic03_writel(v, flcn_dmatrffboffs_r(), pa_offset);
-	vic03_writel(v, flcn_dmatrfcmd_r(), cmd);
+	host1x_writel(pdev, flcn_dmatrfmoffs_r(), i_offset);
+	host1x_writel(pdev, flcn_dmatrffboffs_r(), pa_offset);
+	host1x_writel(pdev, flcn_dmatrfcmd_r(), cmd);
 
-	return vic03_flcn_dma_wait_idle(dev, &timeout);
+	return vic03_flcn_dma_wait_idle(pdev, &timeout);
 
 }
 
@@ -287,9 +282,9 @@ static int vic03_read_ucode(struct platform_device *dev, const char *fw_name)
 	return err;
 }
 
-static int vic03_boot(struct platform_device *dev)
+static int vic03_boot(struct platform_device *pdev)
 {
-	struct vic03 *v = get_vic03(dev);
+	struct vic03 *v = get_vic03(pdev);
 	u32 timeout;
 	u32 offset;
 	int err = 0;
@@ -301,43 +296,43 @@ static int vic03_boot(struct platform_device *dev)
 	if (v->is_booted)
 		return 0;
 
-	vic03_writel(v, flcn_dmactl_r(), 0);
+	host1x_writel(pdev, flcn_dmactl_r(), 0);
 
-	vic03_writel(v, flcn_dmatrfbase_r(),
+	host1x_writel(pdev, flcn_dmatrfbase_r(),
 			(v->ucode.dma_addr + v->ucode.os.bin_data_offset) >> 8);
 
 	for (offset = 0; offset < v->ucode.os.data_size; offset += 256)
-		vic03_flcn_dma_pa_to_internal_256b(dev,
+		vic03_flcn_dma_pa_to_internal_256b(pdev,
 					   v->ucode.os.data_offset + offset,
 					   offset, false);
 
-	vic03_flcn_dma_pa_to_internal_256b(dev, v->ucode.os.code_offset,
+	vic03_flcn_dma_pa_to_internal_256b(pdev, v->ucode.os.code_offset,
 					   0, true);
 
 	/* setup falcon interrupts and enable interface */
-	vic03_writel(v, flcn_irqmset_r(), (flcn_irqmset_ext_f(0xff)    |
+	host1x_writel(pdev, flcn_irqmset_r(), (flcn_irqmset_ext_f(0xff)    |
 					   flcn_irqmset_swgen1_set_f() |
 					   flcn_irqmset_swgen0_set_f() |
 					   flcn_irqmset_exterr_set_f() |
 					   flcn_irqmset_halt_set_f()   |
 					   flcn_irqmset_wdtmr_set_f()));
-	vic03_writel(v, flcn_irqdest_r(), (flcn_irqdest_host_ext_f(0xff) |
+	host1x_writel(pdev, flcn_irqdest_r(), (flcn_irqdest_host_ext_f(0xff) |
 					   flcn_irqdest_host_swgen1_host_f() |
 					   flcn_irqdest_host_swgen0_host_f() |
 					   flcn_irqdest_host_exterr_host_f() |
 					   flcn_irqdest_host_halt_host_f()));
-	vic03_writel(v, flcn_itfen_r(), (flcn_itfen_mthden_enable_f() |
+	host1x_writel(pdev, flcn_itfen_r(), (flcn_itfen_mthden_enable_f() |
 					flcn_itfen_ctxen_enable_f()));
 
 	/* boot falcon */
-	vic03_writel(v, flcn_bootvec_r(), flcn_bootvec_vec_f(0));
-	vic03_writel(v, flcn_cpuctl_r(), flcn_cpuctl_startcpu_true_f());
+	host1x_writel(pdev, flcn_bootvec_r(), flcn_bootvec_vec_f(0));
+	host1x_writel(pdev, flcn_cpuctl_r(), flcn_cpuctl_startcpu_true_f());
 
 	timeout = 0; /* default */
 
-	err = vic03_flcn_wait_idle(dev, &timeout);
+	err = vic03_flcn_wait_idle(pdev, &timeout);
 	if (err != 0) {
-		dev_err(&dev->dev, "boot failed due to timeout");
+		dev_err(&pdev->dev, "boot failed due to timeout");
 		return err;
 	}
 
@@ -375,7 +370,6 @@ int nvhost_vic03_init(struct platform_device *dev)
 	nvhost_dbg_fn("primed dev:%p v:%p", dev, v);
 
 	v->host = nvhost_get_host(dev);
-	v->regs = pdata->aperture[0];
 
 	if (!v->ucode.valid)
 		err = vic03_read_ucode(dev, fw_name);
@@ -423,9 +417,6 @@ void nvhost_vic03_deinit(struct platform_device *dev)
 		v->ucode.dma_addr = 0;
 	}
 
-	if (v->regs)
-		v->regs = NULL;
-
 	/* zap, free */
 	set_vic03(dev, NULL);
 	kfree(v);
@@ -564,9 +555,8 @@ struct nvhost_hwctx_handler *nvhost_vic03_alloc_hwctx_handler(u32 syncpt,
 
 int nvhost_vic03_finalize_poweron(struct platform_device *pdev)
 {
-	struct vic03 *v = get_vic03(pdev);
-	vic03_writel(v, flcn_slcg_override_high_a_r(), 0);
-	vic03_writel(v, flcn_cg_r(),
+	host1x_writel(pdev, flcn_slcg_override_high_a_r(), 0);
+	host1x_writel(pdev, flcn_cg_r(),
 		     flcn_cg_idle_cg_dly_cnt_f(4) |
 		     flcn_cg_idle_cg_en_f(1) |
 		     flcn_cg_wakeup_dly_cnt_f(4));
diff --git a/drivers/video/tegra/host/vic03/vic03.h b/drivers/video/tegra/host/vic03/vic03.h
index 1b75c4e4b8da..af4f9b2f4d50 100644
--- a/drivers/video/tegra/host/vic03/vic03.h
+++ b/drivers/video/tegra/host/vic03/vic03.h
@@ -73,7 +73,6 @@ struct vic03 {
 	struct nvhost_master *host;
 
 	struct resource *reg_mem;
-	void __iomem *regs;
 	bool is_booted;
 
 	struct {
@@ -95,20 +94,6 @@ struct vic03 {
 	void (*remove_support)(struct vic03 *);
 };
 
-/* register accessors */
-static inline void vic03_writel(struct vic03 *vic, u32 r, u32 v)
-{
-	nvhost_dbg(dbg_reg, " vic03 r=0x%x v=0x%x", r, v);
-	writel(v, vic->regs + r);
-}
-static inline u32 vic03_readl(struct vic03 *vic, u32 r)
-{
-	u32 v;
-	v = readl(vic->regs + r);
-	nvhost_dbg(dbg_reg, " vic03 r=0x%x v=0x%x", r, v);
-	return v;
-}
-
 struct nvhost_hwctx_handler *nvhost_vic03_alloc_hwctx_handler(
 		u32 syncpt, u32 base,
 		struct nvhost_channel *ch);
diff --git a/include/linux/nvhost.h b/include/linux/nvhost.h
index 47159618cb97..b872587cdd9a 100644
--- a/include/linux/nvhost.h
+++ b/include/linux/nvhost.h
@@ -328,8 +328,8 @@ struct nvhost_device_power_attr {
 	struct kobj_attribute power_attr[NVHOST_POWER_SYSFS_ATTRIB_MAX];
 };
 
-void nvhost_device_writel(struct platform_device *dev, u32 r, u32 v);
-u32 nvhost_device_readl(struct platform_device *dev, u32 r);
+void host1x_writel(struct platform_device *dev, u32 r, u32 v);
+u32 host1x_readl(struct platform_device *dev, u32 r);
 
 /* public host1x power management APIs */
 bool nvhost_module_powered_ext(struct platform_device *dev);