diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2011-06-14 11:04:56 +0300 |
---|---|---|
committer | Varun Colbert <vcolbert@nvidia.com> | 2011-07-21 15:06:54 -0700 |
commit | 9ed3acbe2266446c32ff85501a21ef9da0b4829f (patch) | |
tree | 3a0361caaf09c5f2d414791cd68a0bd4347f3fd9 | |
parent | d7e25c0c2ca13fc33cc9b5887b5576ea10038276 (diff) |
nvhost: Enable 3D powergating
Enables 3D power gating on chips that support it.
Bug 793861
Change-Id: Iadc40b65ac4897550d3b0d2076cc7efe98c95dfa
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/37821
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Tested-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
-rw-r--r-- | arch/arm/mach-tegra/fuse.h | 2 | ||||
-rw-r--r-- | drivers/video/tegra/host/nvhost_acm.c | 33 |
2 files changed, 18 insertions, 17 deletions
diff --git a/arch/arm/mach-tegra/fuse.h b/arch/arm/mach-tegra/fuse.h index 8ccb085870a4..4c6b74b454e3 100644 --- a/arch/arm/mach-tegra/fuse.h +++ b/arch/arm/mach-tegra/fuse.h @@ -28,8 +28,6 @@ int tegra_sku_id(void); void tegra_init_fuse(void); u32 tegra_fuse_readl(unsigned long offset); void tegra_fuse_writel(u32 value, unsigned long offset); -enum tegra_chipid tegra_get_chipid(void); -enum tegra_revision tegra_get_revision(void); const char *tegra_get_revision_name(void); #ifdef CONFIG_TEGRA_SILICON_PLATFORM diff --git a/drivers/video/tegra/host/nvhost_acm.c b/drivers/video/tegra/host/nvhost_acm.c index cabb354bc144..1df7dbc1330b 100644 --- a/drivers/video/tegra/host/nvhost_acm.c +++ b/drivers/video/tegra/host/nvhost_acm.c @@ -27,12 +27,11 @@ #include <linux/device.h> #include <mach/powergate.h> #include <mach/clk.h> +#include <mach/hardware.h> #define ACM_POWERDOWN_HANDLER_DELAY_MSEC 25 #define ACM_SUSPEND_WAIT_FOR_IDLE_TIMEOUT (2 * HZ) -#define DISABLE_3D_POWERGATING - void nvhost_module_busy(struct nvhost_module *mod) { mutex_lock(&mod->lock); @@ -123,6 +122,16 @@ static const char *get_module_clk_id(const char *module, int index) return NULL; } +/* Not all hardware revisions support power gating */ +static bool _3d_powergating_disabled(void) +{ + int chipid = tegra_get_chipid(); + + return chipid < TEGRA_CHIPID_TEGRA3 + || (chipid == TEGRA_CHIPID_TEGRA3 + && tegra_get_revision() == TEGRA_REVISION_A01); +} + int nvhost_module_init(struct nvhost_module *mod, const char *name, nvhost_modulef func, struct nvhost_module *parent, struct device *dev) @@ -160,29 +169,23 @@ int nvhost_module_init(struct nvhost_module *mod, const char *name, if (strcmp(name, "gr3d") == 0) { mod->powergate_id = TEGRA_POWERGATE_3D; -#ifndef CONFIG_ARCH_TEGRA_2x_SOC +#ifdef CONFIG_ARCH_TEGRA_3x_SOC mod->powergate_id2 = TEGRA_POWERGATE_3D1; #endif - } else if (strcmp(name, "mpe") == 0) - mod->powergate_id = TEGRA_POWERGATE_MPE; + } -#ifdef DISABLE_3D_POWERGATING - /* - * It is possible for the 3d block to generate an invalid memory - * request during the power up sequence in some cases. Workaround - * is to disable 3d block power gating. - */ - if (mod->powergate_id == TEGRA_POWERGATE_3D) { + if (mod->powergate_id == TEGRA_POWERGATE_3D + && _3d_powergating_disabled()) { tegra_unpowergate_partition(mod->powergate_id); mod->powergate_id = -1; - } -#ifndef CONFIG_ARCH_TEGRA_2x_SOC + +#ifdef CONFIG_ARCH_TEGRA_3x_SOC if (mod->powergate_id2 == TEGRA_POWERGATE_3D1) { tegra_unpowergate_partition(mod->powergate_id2); mod->powergate_id2 = -1; } #endif -#endif + } mutex_init(&mod->lock); init_waitqueue_head(&mod->idle); |