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authorGrzegorz Jaszczyk <jaz@semihalf.com>2016-08-04 12:14:13 +0200
committerGregory CLEMENT <gregory.clement@free-electrons.com>2016-08-08 16:28:54 +0200
commitd81a914fc630fe969a71f6f275cb66e232c1f71d (patch)
tree31cf96d36596149e6388ecc8f35b66afd56256f4
parent100a20a9ff895297115b8359b0ed858faa3d4e44 (diff)
ARM: dts: mvebu: armada-39x: add missing nodes describing GPIO's
The whole Armada 39x SoC family of processors has GPIO's which all can be supported with existing driver. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
-rw-r--r--arch/arm/boot/dts/armada-39x.dtsi30
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/armada-39x.dtsi b/arch/arm/boot/dts/armada-39x.dtsi
index 785f661ee610..c521378e239f 100644
--- a/arch/arm/boot/dts/armada-39x.dtsi
+++ b/arch/arm/boot/dts/armada-39x.dtsi
@@ -55,6 +55,8 @@
compatible = "marvell,armada390";
aliases {
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
@@ -250,6 +252,34 @@
};
};
+ gpio0: gpio@18100 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18100 0x40>;
+ ngpios = <32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ gpio1: gpio@18140 {
+ compatible = "marvell,orion-gpio";
+ reg = <0x18140 0x40>;
+ ngpios = <28>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
system-controller@18200 {
compatible = "marvell,armada-390-system-controller",
"marvell,armada-370-xp-system-controller";