diff options
| author | Philippe Schenker <philippe.schenker@toradex.com> | 2019-08-30 11:25:13 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2020-02-12 11:06:03 +0100 |
| commit | f36183c7e0ae0f605128ff64e8f165329b85aa69 (patch) | |
| tree | f7b437642940295ea97d223055acd7aafc7e7a33 | |
| parent | 217f678a80a1adc762b9426367c0974cda1044a0 (diff) | |
ARM64: dts: imx8qm-apalis: use low-drive for SD pins
This commit makes sure to use low-drive mode on all sd pins as
suggested by our hardware team.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts index de43ad6212f4..902677aed8c3 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts @@ -871,27 +871,27 @@ pinctrl_usdhc3_100mhz: usdhc3grp100mhz { fsl,pins = < - SC_P_USDHC2_CLK_CONN_USDHC2_CLK 0x06000040 - SC_P_USDHC2_CMD_CONN_USDHC2_CMD 0x00000020 - SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000020 - SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000020 - SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000020 - SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000020 + SC_P_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041 + SC_P_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021 + SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021 + SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021 + SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021 + SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021 /* On-module PMIC use */ - SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000020 + SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021 >; }; pinctrl_usdhc3_200mhz: usdhc3grp200mhz { fsl,pins = < - SC_P_USDHC2_CLK_CONN_USDHC2_CLK 0x06000040 - SC_P_USDHC2_CMD_CONN_USDHC2_CMD 0x00000020 - SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000020 - SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000020 - SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000020 - SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000020 + SC_P_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041 + SC_P_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021 + SC_P_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021 + SC_P_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021 + SC_P_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021 + SC_P_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021 /* On-module PMIC use */ - SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000020 + SC_P_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021 >; }; |