[ARM/tegra] clocks: Enabled clock before set rate.

Made sure graphics and sdhci clocks are enabled before the respective
rate is configured.

Change-Id: I2d09ad111321b296a8d8fbb2d4bff02016e12feb
Reviewed-on: http://git-master/r/8272
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

3 files changed, 22 insertions, 8 deletions

diff --git a/arch/arm/mach-tegra/nvrm/core/ap15/nvrm_clocks.c b/arch/arm/mach-tegra/nvrm/core/ap15/nvrm_clocks.c
index b6ab9339af28..b9c1c87f3297 100644
--- a/arch/arm/mach-tegra/nvrm/core/ap15/nvrm_clocks.c
+++ b/arch/arm/mach-tegra/nvrm/core/ap15/nvrm_clocks.c
@@ -600,6 +600,8 @@ ExecPlatform NvRmPrivGetExecPlatform(NvRmDeviceHandle hRmDeviceHandle)
 
 /*****************************************************************************/
 
+#define NVRM_DEBUG_MODULE_CLOCK_SET (1)
+
 /* Sets module clock source/divider register */
 void NvRmPrivModuleClockSet(
     NvRmDeviceHandle hDevice,
@@ -608,6 +610,16 @@ void NvRmPrivModuleClockSet(
 {
     NvU32 reg, divisor;
 
+#if NVRM_DEBUG_MODULE_CLOCK_SET
+    if(cinfo->ClkEnableOffset != 0)
+    {
+        reg = NV_REGR(hDevice,
+            NvRmPrivModuleID_ClockAndReset, 0, cinfo->ClkEnableOffset);
+        if ((reg & cinfo->ClkEnableField) != cinfo->ClkEnableField)
+            NvOsDebugPrintf("tegra: configuring disabled clock ( module %d, "
+                "instance %d )\n", cinfo->Module, cinfo->Instance);
+    }
+#endif
     NV_ASSERT(cinfo->ClkSourceOffset);
     reg = NV_REGR(hDevice, NvRmPrivModuleID_ClockAndReset, 0, cinfo->ClkSourceOffset);
     divisor = (reg >> cinfo->DivisorFieldShift) & cinfo->DivisorFieldMask;
diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
index 8f9510c7dea7..684a1c4278b4 100755
--- a/drivers/mmc/host/sdhci-tegra.c
+++ b/drivers/mmc/host/sdhci-tegra.c
@@ -113,13 +113,6 @@ static void tegra_sdhci_set_clock(struct sdhci_host *sdhost,
 {
 	struct tegra_sdhci *host = sdhci_priv(sdhost);
 
-	if (clock) {
-		clk_set_rate(host->clk, clock);
-		sdhost->max_clk = clk_get_rate(host->clk);
-		dev_dbg(&host->pdev->dev, "clock request: %uKHz. currently "
-			"%uKHz\n", clock/1000, sdhost->max_clk/1000);
-	}
-
 	if (clock && !host->clk_enable) {
 		clk_enable(host->clk);
 		host->clk_enable = true;
@@ -127,6 +120,13 @@ static void tegra_sdhci_set_clock(struct sdhci_host *sdhost,
 		clk_disable(host->clk);
 		host->clk_enable = false;
 	}
+
+	if (clock) {
+		clk_set_rate(host->clk, clock);
+		sdhost->max_clk = clk_get_rate(host->clk);
+		dev_dbg(&host->pdev->dev, "clock request: %uKHz. currently "
+			"%uKHz\n", clock/1000, sdhost->max_clk/1000);
+	}
 }
 
 static struct sdhci_ops tegra_sdhci_wp_cd_ops = {
@@ -291,8 +291,8 @@ skip_gpio_wp:
 	if (host->pinmux && host->nr_pins)
 		tegra_pinmux_config_tristate_table(host->pinmux,
 			host->nr_pins, TEGRA_TRI_NORMAL);
-	clk_set_rate(host->clk, host->max_clk);
 	clk_enable(host->clk);
+	clk_set_rate(host->clk, host->max_clk);
 	host->max_clk = clk_get_rate(host->clk);
 	host->clk_enable = true;
 
diff --git a/drivers/video/tegra/host/nvhost_acm.c b/drivers/video/tegra/host/nvhost_acm.c
index 6514f0e85263..9964c0fa7750 100644
--- a/drivers/video/tegra/host/nvhost_acm.c
+++ b/drivers/video/tegra/host/nvhost_acm.c
@@ -108,7 +108,9 @@ int nvhost_module_init(struct nvhost_module *mod, const char *name,
 				__func__, name);
 			break;
 		}
+		clk_enable(mod->clk[i]);
 		clk_set_rate(mod->clk[i], rate);
+		clk_disable(mod->clk[i]);
 		i++;
 	}