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authorDaniel Schaeffer <daniel.schaeffer@timesys.com>2009-03-05 09:20:50 -0500
committerDaniel Schaeffer <daniel.schaeffer@timesys.com>2009-03-05 09:20:50 -0500
commitcb24ce8396132a5a48191d804741edbff3e48e81 (patch)
treebbce453f5b7f3891a5e57c24855b0c9cdc4cb83f
parenta432aa7dcbd421770aab5a5d8db40f2a67195e50 (diff)
Added spi support for the mx31lite board.2.6.28-mx31lite-200903050920
Signed-off-by: Daniel Schaeffer <daniel.schaeffer@timesys.com>
-rw-r--r--arch/arm/mach-mx3/devices.c89
-rw-r--r--arch/arm/mach-mx3/devices.h4
-rw-r--r--arch/arm/mach-mx3/mx31lite.c61
3 files changed, 140 insertions, 14 deletions
diff --git a/arch/arm/mach-mx3/devices.c b/arch/arm/mach-mx3/devices.c
index a6bdcc07f3c9..5300517d974d 100644
--- a/arch/arm/mach-mx3/devices.c
+++ b/arch/arm/mach-mx3/devices.c
@@ -23,6 +23,7 @@
#include <linux/gpio.h>
#include <mach/hardware.h>
#include <mach/imx-uart.h>
+#include <mach/spi_imx.h>
static struct resource uart0[] = {
{
@@ -119,6 +120,94 @@ struct platform_device mxc_uart_device4 = {
.num_resources = ARRAY_SIZE(uart4),
};
+static struct resource spi0[] = {
+ [0] = {
+ .start = CSPI1_BASE_ADDR,
+ .end = CSPI1_BASE_ADDR + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = MXC_INT_CSPI1,
+ .end = MXC_INT_CSPI1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct spi_imx_master spi0_data = {
+ .num_chipselect = 4,
+ .init = NULL,
+ .exit = NULL,
+};
+
+struct platform_device mxc_spi_device0 = {
+ .name = "spi_imx",
+ .id = 0,
+ .dev = {
+ .platform_data = &spi0_data,
+ },
+ .num_resources = ARRAY_SIZE(spi0),
+ .resource = spi0,
+};
+
+static struct resource spi1[] = {
+ [0] = {
+ .start = CSPI2_BASE_ADDR,
+ .end = CSPI2_BASE_ADDR + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = MXC_INT_CSPI2,
+ .end = MXC_INT_CSPI2,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct spi_imx_master spi1_data = {
+ .num_chipselect = 4,
+ .init = NULL,
+ .exit = NULL,
+};
+
+struct platform_device mxc_spi_device1 = {
+ .name = "spi_imx",
+ .id = 1,
+ .dev = {
+ .platform_data = &spi1_data,
+ },
+ .num_resources = ARRAY_SIZE(spi1),
+ .resource = spi1,
+};
+
+static struct resource spi2[] = {
+ [0] = {
+ .start = CSPI3_BASE_ADDR,
+ .end = CSPI3_BASE_ADDR + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = MXC_INT_CSPI3,
+ .end = MXC_INT_CSPI3,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct spi_imx_master spi2_data = {
+ .num_chipselect = 4,
+ .init = NULL,
+ .exit = NULL,
+};
+
+struct platform_device mxc_spi_device2 = {
+ .name = "spi_imx",
+ .id = 2,
+ .dev = {
+ .platform_data = &spi2_data,
+ },
+ .num_resources = ARRAY_SIZE(spi2),
+ .resource = spi2,
+};
+
+
/* GPIO port description */
static struct mxc_gpio_port imx_gpio_ports[] = {
[0] = {
diff --git a/arch/arm/mach-mx3/devices.h b/arch/arm/mach-mx3/devices.h
index 4dc03f9e6001..5a86802e1ac5 100644
--- a/arch/arm/mach-mx3/devices.h
+++ b/arch/arm/mach-mx3/devices.h
@@ -4,3 +4,7 @@ extern struct platform_device mxc_uart_device1;
extern struct platform_device mxc_uart_device2;
extern struct platform_device mxc_uart_device3;
extern struct platform_device mxc_uart_device4;
+
+extern struct platform_device mxc_spi_device0;
+extern struct platform_device mxc_spi_device1;
+extern struct platform_device mxc_spi_device2;
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c
index c31e1115b2cc..a0eacc709672 100644
--- a/arch/arm/mach-mx3/mx31lite.c
+++ b/arch/arm/mach-mx3/mx31lite.c
@@ -47,17 +47,17 @@
#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
static struct imxuart_platform_data uart_pdata = {
- .flags = IMXUART_HAVE_RTSCTS,
+ .flags = IMXUART_HAVE_RTSCTS,
};
static inline void mxc_init_imx_uart(void)
{
- mxc_iomux_mode(MX31_PIN_CTS1__CTS1);
- mxc_iomux_mode(MX31_PIN_RTS1__RTS1);
- mxc_iomux_mode(MX31_PIN_TXD1__TXD1);
- mxc_iomux_mode(MX31_PIN_RXD1__RXD1);
+ mxc_iomux_mode(MX31_PIN_CTS1__CTS1);
+ mxc_iomux_mode(MX31_PIN_RTS1__RTS1);
+ mxc_iomux_mode(MX31_PIN_TXD1__TXD1);
+ mxc_iomux_mode(MX31_PIN_RXD1__RXD1);
- mxc_register_device(&mxc_uart_device0, &uart_pdata);
+ mxc_register_device(&mxc_uart_device0, &uart_pdata);
}
#else /* !SERIAL_IMX */
static inline void mxc_init_imx_uart(void)
@@ -65,16 +65,48 @@ static inline void mxc_init_imx_uart(void)
}
#endif /* !SERIAL_IMX */
+
+#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
+static inline void mxc_init_imx_spi(void)
+{
+ /* CSPI1 - AT93C66A EEPROM attached to CS2 */
+ mxc_iomux_mode(MX31_PIN_CSPI1_MOSI__MOSI);
+ mxc_iomux_mode(MX31_PIN_CSPI1_MISO__MISO);
+ mxc_iomux_mode(MX31_PIN_CSPI1_SCLK__SCLK);
+ mxc_iomux_mode(MX31_PIN_CSPI1_SPI_RDY__SPI_RDY);
+ mxc_iomux_mode(MX31_PIN_CSPI1_SS0__SS0);
+ mxc_iomux_mode(MX31_PIN_CSPI1_SS1__SS1);
+ mxc_iomux_mode(MX31_PIN_CSPI1_SS2__SS2);
+ /* CSPI2 - PMIC attached to CS0 */
+ mxc_iomux_mode(MX31_PIN_CSPI2_MOSI__MOSI);
+ mxc_iomux_mode(MX31_PIN_CSPI2_MISO__MISO);
+ mxc_iomux_mode(MX31_PIN_CSPI2_SCLK__SCLK);
+ mxc_iomux_mode(MX31_PIN_CSPI2_SPI_RDY__SPI_RDY);
+ mxc_iomux_mode(MX31_PIN_CSPI2_SS0__SS0);
+ mxc_iomux_mode(MX31_PIN_CSPI2_SS1__SS1);
+ mxc_iomux_mode(MX31_PIN_CSPI2_SS2__SS2);
+
+ /* register the spi masters */
+ platform_device_register(&mxc_spi_device0);
+ platform_device_register(&mxc_spi_device1);
+
+}
+#else /* !SPI_IMX */
+static inline void mxc_init_imx_spi(void)
+{
+}
+#endif /* !SPI_IMX */
+
static struct resource smc911x_resources[] = {
[0] = {
- .start = CS4_BASE_ADDR,
- .end = (CS4_BASE_ADDR + 0xfffff),
- .flags = IORESOURCE_MEM,
+ .start = CS4_BASE_ADDR,
+ .end = (CS4_BASE_ADDR + 0xfffff),
+ .flags = IORESOURCE_MEM,
},
[1] = {
- .start = IOMUX_TO_IRQ(MX31_PIN_SFS6),
- .end = IOMUX_TO_IRQ(MX31_PIN_SFS6),
- .flags = IORESOURCE_IRQ,
+ .start = IOMUX_TO_IRQ(MX31_PIN_SFS6),
+ .end = IOMUX_TO_IRQ(MX31_PIN_SFS6),
+ .flags = IORESOURCE_IRQ,
},
};
@@ -89,7 +121,7 @@ static struct platform_device mx31lite_eth = {
.num_resources = ARRAY_SIZE(smc911x_resources),
.resource = smc911x_resources,
.dev = {
- .platform_data = &smc911x_info,
+ .platform_data = &smc911x_info,
},
};
@@ -142,11 +174,12 @@ static void __init mxc_board_init(void)
/* init eth */
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO));
if (!gpio_request(MX31_PIN_GPIO3_1, "mx31lite-eth"))
- gpio_direction_input(MX31_PIN_SFS6);
+ gpio_direction_input(MX31_PIN_SFS6);
platform_add_devices(devices, ARRAY_SIZE(devices));
mxc_init_imx_uart();
+ mxc_init_imx_spi();
}
static void __init mx31lite_timer_init(void)