diff options
| author | Peter Chen <peter.chen@freescale.com> | 2013-04-09 16:18:51 +0800 |
|---|---|---|
| committer | Peter Chen <peter.chen@freescale.com> | 2013-04-11 13:09:05 +0800 |
| commit | 01ac974f301d2da4e3c5113d1db81527794cc752 (patch) | |
| tree | bdb91625b20919c31baf8a89f7730a900cfae4b1 | |
| parent | 754fa25a2310995c10acc9cfe6b2db35b3536a23 (diff) | |
ENGR00257130-6 mx6-msl: usb: Add 500us delay for phy stable time
The PHY needs 500us time to be stable when its clock
from off to on. If there is wakeup enable before the
PHY is stable, there will be an unexpected wakeup.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
| -rw-r--r-- | arch/arm/mach-mx6/usb_dr.c | 7 | ||||
| -rw-r--r-- | arch/arm/mach-mx6/usb_h1.c | 7 |
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/usb_dr.c b/arch/arm/mach-mx6/usb_dr.c index aa293257ce2d..994207133775 100644 --- a/arch/arm/mach-mx6/usb_dr.c +++ b/arch/arm/mach-mx6/usb_dr.c @@ -247,6 +247,13 @@ static void enter_phy_lowpower_suspend(struct fsl_usb2_platform_data *pdata, boo | BM_USBPHY_PWD_RXPWDDIFF | BM_USBPHY_PWD_RXPWDRX); __raw_writel(tmp, phy_reg + HW_USBPHY_PWD_CLR); + /* + * The PHY works at 32Khz clock when it is at low power mode, + * it needs 10 clocks from 32Khz to normal work state, so + * 500us is the safe value for PHY enters stable status + * according to IC engineer. + */ + udelay(500); } pr_debug("DR: %s ends, enable is %d\n", __func__, enable); diff --git a/arch/arm/mach-mx6/usb_h1.c b/arch/arm/mach-mx6/usb_h1.c index b7fa2e9e6614..e12e4dd2738e 100644 --- a/arch/arm/mach-mx6/usb_h1.c +++ b/arch/arm/mach-mx6/usb_h1.c @@ -334,6 +334,13 @@ static void _phy_lowpower_suspend(struct fsl_usb2_platform_data *pdata, bool ena | BM_USBPHY_PWD_RXPWDDIFF | BM_USBPHY_PWD_RXPWDRX); __raw_writel(tmp, phy_reg + HW_USBPHY_PWD_CLR); + /* + * The PHY works at 32Khz clock when it is at low power mode, + * it needs 10 clocks from 32Khz to normal work state, so + * 500us is the safe value for PHY enters stable status + * according to IC engineer. + */ + udelay(500); } } |