pcm052: enable EEPROM driver in config, fix TSC IRQsPD13.0.0alpha3.0-pcm052-ts1

Signed-off-by: Russell Robinson Jr <rrobinson@phytec.com>

5 files changed, 47 insertions, 7 deletions

diff --git a/arch/arm/configs/pcm052_defconfig b/arch/arm/configs/pcm052_defconfig
index 2ba4cafb5815..bd13e16e0cea 100644
--- a/arch/arm/configs/pcm052_defconfig
+++ b/arch/arm/configs/pcm052_defconfig
@@ -660,7 +660,40 @@ CONFIG_BLK_DEV_RAM_SIZE=4096
 # CONFIG_MG_DISK is not set
 # CONFIG_BLK_DEV_RBD is not set
 # CONFIG_SENSORS_LIS3LV02D is not set
-# CONFIG_MISC_DEVICES is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_INTEL_MID_PTI is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_APDS9802ALS is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_BH1780 is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_APDS990X is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_TI_DAC7512 is not set
+# CONFIG_BMP085 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+CONFIG_EEPROM_AT24=y
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_IWMC3200TOP is not set
+
+#
+# Texas Instruments shared transport line discipline
+#
+# CONFIG_TI_ST is not set
+# CONFIG_SENSORS_LIS3_SPI is not set
+# CONFIG_SENSORS_LIS3_I2C is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
diff --git a/arch/arm/mach-mvf/board-pcm052.c b/arch/arm/mach-mvf/board-pcm052.c
index dc583b4a69f5..08b071f1dcf7 100644
--- a/arch/arm/mach-mvf/board-pcm052.c
+++ b/arch/arm/mach-mvf/board-pcm052.c
@@ -436,7 +436,7 @@ static struct stmpe_ts_platform_data pba_ts_stm_pdata = {
 
 static struct stmpe_platform_data pba_stm_pdata = {
         .blocks = STMPE_BLOCK_GPIO | STMPE_BLOCK_TOUCHSCREEN,
-        .irq_base = NR_IRQS,
+        .irq_base = STMPE_IRQ_BASE,
         .irq_trigger = IRQF_TRIGGER_RISING,
         .irq_invert_polarity = true,
         .gpio = &pba_gpio_stm_data,
@@ -457,7 +457,7 @@ static struct i2c_board_info pcm052_i2c2_board_info[] __initdata = {
 	},
 	{
 		I2C_BOARD_INFO("stmpe811", 0x41),
-		.irq = PCM052_TS_IRQ,
+		.irq = gpio_to_irq(PCM052_TS_IRQ),
 		.platform_data = &pba_stm_pdata,
 	},
 };
diff --git a/arch/arm/plat-mxc/devices/platform-mvf-dcu.c b/arch/arm/plat-mxc/devices/platform-mvf-dcu.c
index 0fe5099eca34..15f6f0dbe24e 100644
--- a/arch/arm/plat-mxc/devices/platform-mvf-dcu.c
+++ b/arch/arm/plat-mxc/devices/platform-mvf-dcu.c
@@ -28,10 +28,10 @@ int __init mvf_dcu_init(int id)
 
 	ret = gpio_request_one(DCU_LCD_ENABLE_PIN, GPIOF_OUT_INIT_LOW, "DCU");
 	if (ret)
-		printk(KERN_ERR "DCU: failed to request GPIO 30\n");
+		printk(KERN_ERR "DCU: failed to request GPIO 25\n");
 
 	msleep(2);
-	gpio_set_value(DCU_LCD_ENABLE_PIN, 1);
+	gpio_set_value(DCU_LCD_ENABLE_PIN, 0);
 
 	writel(0x20000000, MVF_IO_ADDRESS(MVF_TCON0_BASE_ADDR));
 	return ret;
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mvf.h b/arch/arm/plat-mxc/include/mach/iomux-mvf.h
index fbc0571f8b9f..a838e0bbead9 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mvf.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mvf.h
@@ -356,8 +356,8 @@ typedef enum iomux_config {
 
 /* Touch Screen */
 #define MVF600_PAD32_PTB10_TS_IRQ			\
-		IOMUX_PAD(0x0080, 0x0080, 0, 0x0000, 0, \
-				MVF600_GPIO_GENERAL_CTRL | PAD_CTL_IBE_ENABLE)
+	IOMUX_PAD(0x0080, 0x0080, 0, 0x0000, 0, \
+			PAD_CTL_SPEED_MED | PAD_CTL_IBE_ENABLE)
 
 /*QSPI*/
 #define MVF600_PAD79_PTD0_QSPI0_A_SCK                           \
diff --git a/arch/arm/plat-mxc/include/mach/irqs.h b/arch/arm/plat-mxc/include/mach/irqs.h
index 9fce85784a32..4edd8d91c57d 100644
--- a/arch/arm/plat-mxc/include/mach/irqs.h
+++ b/arch/arm/plat-mxc/include/mach/irqs.h
@@ -74,7 +74,14 @@
 #define MX5_IPU_IRQS 0
 #endif
 
+#ifdef CONFIG_MACH_PCM052
+#define STMPE_IRQ_BASE		(MXC_IPU_IRQ_START)
+#define STMPE_MAX_GPIOS		24
+#define STMPE_IRQ_END		(STMPE_IRQ_BASE + STMPE_MAX_GPIOS)
+#define NR_IRQS			(STMPE_IRQ_END)
+#else
 #define NR_IRQS	(MXC_IPU_IRQ_START + MX3_IPU_IRQS + MX5_IPU_IRQS)
+#endif
 
 extern int imx_irq_set_priority(unsigned char irq, unsigned char prio);