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authorShengjiu Wang <b02247@freescale.com>2014-07-07 19:03:21 +0800
committerShengjiu Wang <b02247@freescale.com>2014-07-09 16:06:10 +0800
commit9500361d12307778e640f4d094c7b1b7e54f0c12 (patch)
tree8ec83d0a2c2a1c0b5227f8771b78e0d0babfcfc5
parentb06e80f43d0fa24aaaa6e340ef18a7cb8955a317 (diff)
ENGR00321941 ASoC: fsl_spdif: fix that can't get the Rx Sample Rate
The SRPC register should be volatile, LOCK bit is set by the hardware. Signed-off-by: Shengjiu Wang <b02247@freescale.com>
-rw-r--r--sound/soc/fsl/fsl_spdif.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index 868ee2ca547e..a261f151f7ed 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -88,6 +88,8 @@ struct fsl_spdif_priv {
struct clk *dmaclk;
struct snd_dmaengine_dai_dma_data dma_params_tx;
struct snd_dmaengine_dai_dma_data dma_params_rx;
+ /* regcache for SRPC */
+ u32 regcache_srpc;
/* The name space will be allocated dynamically */
char name[0];
@@ -986,6 +988,7 @@ static bool fsl_spdif_readable_reg(struct device *dev, unsigned int reg)
static bool fsl_spdif_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
+ case REG_SPDIF_SRPC:
case REG_SPDIF_SIS:
case REG_SPDIF_SRL:
case REG_SPDIF_SRR:
@@ -1304,6 +1307,9 @@ static int fsl_spdif_suspend(struct device *dev)
{
struct fsl_spdif_priv *spdif_priv = dev_get_drvdata(dev);
+ regmap_read(spdif_priv->regmap, REG_SPDIF_SRPC,
+ &spdif_priv->regcache_srpc);
+
regcache_cache_only(spdif_priv->regmap, true);
regcache_mark_dirty(spdif_priv->regmap);
@@ -1315,6 +1321,11 @@ static int fsl_spdif_resume(struct device *dev)
struct fsl_spdif_priv *spdif_priv = dev_get_drvdata(dev);
regcache_cache_only(spdif_priv->regmap, false);
+
+ regmap_update_bits(spdif_priv->regmap, REG_SPDIF_SRPC,
+ SRPC_CLKSRC_SEL_MASK | SRPC_GAINSEL_MASK,
+ spdif_priv->regcache_srpc);
+
return regcache_sync(spdif_priv->regmap);
}
#endif /* CONFIG_PM_SLEEP */