diff options
| author | Fugang Duan <b38611@freescale.com> | 2015-01-19 17:16:35 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2015-02-02 14:47:21 +0800 |
| commit | 6e305cb7e29d5fe5771a5f70a1d878dcd7011a95 (patch) | |
| tree | 519ced01039d97d45412003a43a32612e6e9fc89 | |
| parent | f083680940eb04fedb2ead47aa7547fcecf91e23 (diff) | |
MLK-10116 tty: serial: imx: fix flush buffer issue when module clock is at 4Mhz
In general, uart module clock require it is great than 80Mhz to match 5Mbps
baud rate. When test below 14Mhz module clock, software reset cause state
machines off normal. And for i.MX6SL evk board low power test, it set uart
module clock to 4Mhz, which cause console port print out messy code.
The patch just is workaround to fix console issue.
Signed-off-by: Fugang Duan <B38611@freescale.com>
(cherry picked from commit d7061a8c6b17f1a0d9b7f161967d538b1a408e5c)
| -rw-r--r-- | drivers/tty/serial/imx.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index 42128dc69573..d557f1efb405 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c @@ -1391,6 +1391,10 @@ static void imx_flush_buffer(struct uart_port *port) dmaengine_terminate_all(sport->dma_chan_tx); } + /* For console port, it is not necessary flush buffer and reset FIFO */ + if (uart_console(port)) + return; + /* * UCR2_SRST will reset the transmit and receive state machines, * all FIFOs and register UBIR, UBMR, UBRC, |