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author | Robby Cai <R63905@freescale.com> | 2013-06-17 16:12:33 +0800 |
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committer | Robby Cai <R63905@freescale.com> | 2013-06-19 11:47:10 +0800 |
commit | a74340d3daa977103143cb123ea123f38a532503 (patch) | |
tree | b62e7070ae113f4accae12a931b12cdafa2c1d76 | |
parent | 6450da3b878ddbac7f80083a2b666d0e5ecb9f93 (diff) |
ENGR00267228-4 pxp/epdc: set axi clock to 200MHz
set pxp axi and epdc axi clock to maximum freq: 200MHz (on imx6dl, it's IPU2).
Signed-off-by: Robby Cai <R63905@freescale.com>
(cherry picked from commit a070e0037109ef139ad16beab318f7e8609262f2)
-rw-r--r-- | arch/arm/mach-imx/clk-imx6q.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index b17eff104144..3427b6919adb 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -638,6 +638,12 @@ int __init mx6q_clocks_init(void) clk_set_parent(clk[ipu2_sel], clk[mmdc_ch0_axi]); } + if (cpu_is_imx6dl()) { + /* pxp & epdc */ + clk_set_parent(clk[ipu2_sel], clk[pll2_pfd2_396m]); + clk_set_rate(clk[ipu2], 200000000); + } + for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) clk_prepare_enable(clk[clks_init_on[i]]); |