diff options
| author | Seshendra Gadagottu <sgadagottu@nvidia.com> | 2011-03-13 12:13:28 +0530 |
|---|---|---|
| committer | Varun Colbert <vcolbert@nvidia.com> | 2011-03-14 16:52:51 -0800 |
| commit | 37e517a3bfdda2865c8c9927ec7e22a7d98340b0 (patch) | |
| tree | 25f2d2f6c32c6d1572b9dba5cdebf86acd5024b4 | |
| parent | 6ef90dd552195da7e26907d2ee3f6a13368594ad (diff) | |
ARM: tegra: usb_phy: Setting USB_TXFILLTUNING for underrun issue
Setting the USB_TXFILLTUNING to 0x10, where as power on value
is 0x2. With this updated setting USB2 controller under run
are avoided. Setting this value after power_on and post_resume.
Bug 791857
Change-Id: Ie09b4093d49f9f56f431df03c31b876f5a6fa3a7
Reviewed-on: http://git-master/r/22735
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
| -rw-r--r-- | arch/arm/mach-tegra/usb_phy.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index a3c23bc5a9aa..eac24c442f81 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c @@ -40,6 +40,8 @@ #define USB_USBSTS_PCI (1 << 2) #define USB_USBSTS_HCH (1 << 12) +#define USB_TXFILLTUNING 0x164 + #define ULPI_VIEWPORT 0x170 #define ULPI_WAKEUP (1 << 31) #define ULPI_RUN (1 << 30) @@ -653,6 +655,19 @@ static void utmi_phy_postresume(struct tegra_usb_phy *phy) writel(val, base + UTMIP_TX_CFG0); } +static void uhsic_phy_postresume(struct tegra_usb_phy *phy) +{ + unsigned long val; + void __iomem *base = phy->regs; + + val = readl(base + USB_TXFILLTUNING); + if ((val & 0x00ff0000) != 0x00100000) { + val = 0x00100000; + writel(val, base + USB_TXFILLTUNING); + } + +} + static void utmi_phy_restore_start(struct tegra_usb_phy *phy, enum tegra_usb_phy_port_speed port_speed) { @@ -940,6 +955,12 @@ static void uhsic_phy_power_on(struct tegra_usb_phy *phy) val &= ~USB_PORTSC1_PTS(~0); writel(val, base + USB_PORTSC1); + val = readl(base + USB_TXFILLTUNING); + if ((val & 0x00ff0000) != 0x00100000) { + val = 0x00100000; + writel(val, base + USB_TXFILLTUNING); + } + val = readl(base + USB_PORTSC1); val &= ~(USB_PORTSC1_WKOC | USB_PORTSC1_WKDS | USB_PORTSC1_WKCN); writel(val, base + USB_PORTSC1); @@ -1134,8 +1155,13 @@ int tegra_usb_phy_preresume(struct tegra_usb_phy *phy) int tegra_usb_phy_postresume(struct tegra_usb_phy *phy) { + struct tegra_ulpi_config *config = phy->config; + if (phy->instance != 1) utmi_phy_postresume(phy); + else if ((phy->instance == 1) && + (config->inf_type == TEGRA_USB_UHSIC)) + uhsic_phy_postresume(phy); return 0; } |