video: tegra: Allow gradual phase in of adjustments on DIDIM

Adds phase_in_video field that slowly phases in changes to the
pixel modification and backlight values.  This should only be enabled
during video as its results with content that has non-deterministic
time between frame updates is sub-optimal.

Bug 888294

Change-Id: If4cba05779b9eb51a63d58a780ae72ceabfb4c2d
Reviewed-on: http://git-master/r/57596
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Matt Wagner <mwagner@nvidia.com>

2 files changed, 45 insertions, 4 deletions

diff --git a/arch/arm/mach-tegra/include/mach/dc.h b/arch/arm/mach-tegra/include/mach/dc.h
index 21fe93312455..f42383429906 100644
--- a/arch/arm/mach-tegra/include/mach/dc.h
+++ b/arch/arm/mach-tegra/include/mach/dc.h
@@ -263,14 +263,17 @@ struct tegra_dc_sd_settings {
 	unsigned enable;
 	bool use_auto_pwm;
 	u8 hw_update_delay;
-	short bin_width;
 	u8 aggressiveness;
+	short bin_width;
 	u8 phase_in;
+	u8 phase_in_video;
 	u8 cmd;
-	u16 cur_agg_step;
 	u8 final_agg;
+	u16 cur_agg_step;
 	u16 cur_phase_step;
 	u16 phase_in_steps;
+	short prev_k;
+	short phase_vid_step;
 
 	struct tegra_dc_sd_agg_priorities agg_priorities;
 
diff --git a/drivers/video/tegra/dc/nvsd.c b/drivers/video/tegra/dc/nvsd.c
index 33e25a00dad7..d477dc7657ec 100644
--- a/drivers/video/tegra/dc/nvsd.c
+++ b/drivers/video/tegra/dc/nvsd.c
@@ -43,6 +43,7 @@ static ssize_t nvsd_registers_show(struct kobject *kobj,
 NVSD_ATTR(enable);
 NVSD_ATTR(aggressiveness);
 NVSD_ATTR(phase_in);
+NVSD_ATTR(phase_in_video);
 NVSD_ATTR(bin_width);
 NVSD_ATTR(hw_update_delay);
 NVSD_ATTR(use_vid_luma);
@@ -60,6 +61,7 @@ static struct attribute *nvsd_attrs[] = {
 	NVSD_ATTRS_ENTRY(enable),
 	NVSD_ATTRS_ENTRY(aggressiveness),
 	NVSD_ATTRS_ENTRY(phase_in),
+	NVSD_ATTRS_ENTRY(phase_in_video),
 	NVSD_ATTRS_ENTRY(bin_width),
 	NVSD_ATTRS_ENTRY(hw_update_delay),
 	NVSD_ATTRS_ENTRY(use_vid_luma),
@@ -441,6 +443,7 @@ bool nvsd_update_brightness(struct tegra_dc *dc)
 	u32 val = 0;
 	int cur_sd_brightness;
 	struct tegra_dc_sd_settings *settings = dc->out->sd_settings;
+	int new_k, step;
 
 	if (sd_brightness) {
 		if (atomic_read(&man_k_until_blank)) {
@@ -462,8 +465,29 @@ bool nvsd_update_brightness(struct tegra_dc *dc)
 		/* read brightness value */
 		val = tegra_dc_readl(dc, DC_DISP_SD_BL_CONTROL);
 		val = SD_BLC_BRIGHTNESS(val);
-
-		if (val != (u32)cur_sd_brightness) {
+		new_k = tegra_dc_readl(dc, DC_DISP_SD_HW_K_VALUES);
+		new_k = SD_HW_K_R(new_k);
+
+		if (settings->phase_in_video) {
+			step = settings->phase_vid_step;
+			/* check if pixel modification value has changed */
+			if (new_k != settings->prev_k) {
+				/* Compute how much to shift brightness by */
+				step = ((int)val - cur_sd_brightness)*8/256;
+				if (step <= 0)
+					step = step ? 1 : ~step + 1;
+				settings->prev_k = new_k;
+			} else if (cur_sd_brightness != val) {
+				/* Phase in Brightness */
+				if (step--)
+					val > cur_sd_brightness ?
+						(cur_sd_brightness++)
+						: (cur_sd_brightness--);
+				atomic_set(sd_brightness, cur_sd_brightness);
+				return true;
+			}
+			settings->phase_vid_step = step;
+		} else if (val != (u32)cur_sd_brightness) {
 			/* set brightness value and note the update */
 			atomic_set(sd_brightness, (int)val);
 			return true;
@@ -541,6 +565,9 @@ static ssize_t nvsd_settings_show(struct kobject *kobj,
 		else if (IS_NVSD_ATTR(phase_in))
 			res = snprintf(buf, PAGE_SIZE, "%d\n",
 				sd_settings->phase_in);
+		else if (IS_NVSD_ATTR(phase_in_video))
+			res = snprintf(buf, PAGE_SIZE, "%d\n",
+				sd_settings->phase_in_video);
 		else if (IS_NVSD_ATTR(bin_width))
 			res = snprintf(buf, PAGE_SIZE, "%d\n",
 				sd_settings->bin_width);
@@ -696,6 +723,17 @@ static ssize_t nvsd_settings_store(struct kobject *kobj,
 
 		} else if (IS_NVSD_ATTR(phase_in)) {
 			nvsd_check_and_update(0, 1, phase_in);
+		} else if (IS_NVSD_ATTR(phase_in_video)) {
+			nvsd_check_and_update(0, 1, phase_in_video);
+			if (sd_settings->phase_in_video) {
+				/* Phase in adjustments to pixels */
+				sd_settings->blp.time_constant = 4;
+				sd_settings->blp.step = 0;
+			} else {
+				/* Instant Adjustments to pixels */
+				sd_settings->blp.time_constant = 1024;
+				sd_settings->blp.step = 255;
+			}
 		} else if (IS_NVSD_ATTR(bin_width)) {
 			nvsd_check_and_update(0, 8, bin_width);
 		} else if (IS_NVSD_ATTR(hw_update_delay)) {