diff options
author | Alex Frid <afrid@nvidia.com> | 2011-10-19 21:49:40 -0700 |
---|---|---|
committer | Simone Willett <swillett@nvidia.com> | 2011-10-24 15:02:56 -0700 |
commit | 3bdc83bebf4ef74c760d075a8ae8ffe6baf8b15a (patch) | |
tree | f0e02cea904c179984bd6e34dcf6569a3512017d | |
parent | 5749bd88bad0eb23cfc2d4fc721ae30ff5b9f5e0 (diff) |
ARM: tegra: dvfs: Update cpu nominal voltage selection
Update cpu nominal voltage selection to accommodate irregular voltage
steps in cpu dvfs table (instead of constant 25mV step assumed so far).
Change-Id: I2df2f0fb3dc2e4ebb66602441d0f484500d2965c
Reviewed-on: http://git-master/r/59457
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
-rw-r--r-- | arch/arm/mach-tegra/tegra3_dvfs.c | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/arch/arm/mach-tegra/tegra3_dvfs.c b/arch/arm/mach-tegra/tegra3_dvfs.c index dba34003b338..d07195366bf6 100644 --- a/arch/arm/mach-tegra/tegra3_dvfs.c +++ b/arch/arm/mach-tegra/tegra3_dvfs.c @@ -361,18 +361,21 @@ static int __init get_cpu_nominal_mv_index( struct clk *c; /* - * Start with nominal level for the chips with this speedo_id. Then, - * make sure cpu nominal voltage is below core ("solve from cpu to - * core at nominal"). + * Find maximum cpu voltage that satisfies cpu_to_core dependency for + * nominal core voltage ("solve from cpu to core at nominal"). Clip + * result to the nominal cpu level for the chips with this speedo_id. */ BUG_ON(speedo_id >= ARRAY_SIZE(cpu_speedo_nominal_millivolts)); - mv = cpu_speedo_nominal_millivolts[speedo_id]; - if (tegra3_dvfs_rail_vdd_core.nominal_millivolts) { - int core_mv = tegra3_dvfs_rail_vdd_core.nominal_millivolts; - while ((mv > tegra3_dvfs_rail_vdd_cpu.min_millivolts) && - (tegra3_get_core_floor_mv(mv) > core_mv)) - mv -= 25; + mv = tegra3_dvfs_rail_vdd_core.nominal_millivolts; + for (i = 0; i < MAX_DVFS_FREQS; i++) { + if ((cpu_millivolts[i] == 0) || + tegra3_get_core_floor_mv(cpu_millivolts[i]) > mv) + break; } + BUG_ON(i == 0); + mv = cpu_millivolts[i - 1]; + BUG_ON(mv < tegra3_dvfs_rail_vdd_cpu.min_millivolts); + mv = min(mv, cpu_speedo_nominal_millivolts[speedo_id]); /* * Find matching cpu dvfs entry, and use it to determine index to the |