ARM: tegra: dvfs: Update Tegra3 CPU dvfs tables

Bug 817679

Change-Id: I02a1f3a3d12d426748abaa11947b055a655ebfdf
Reviewed-on: http://git-master/r/45454
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>

2 files changed, 16 insertions, 16 deletions

diff --git a/arch/arm/mach-tegra/tegra3_clocks.c b/arch/arm/mach-tegra/tegra3_clocks.c
index 4228c868fa6e..e710370f791a 100644
--- a/arch/arm/mach-tegra/tegra3_clocks.c
+++ b/arch/arm/mach-tegra/tegra3_clocks.c
@@ -4132,7 +4132,7 @@ static struct cpufreq_frequency_table freq_table_1p3GHz[] = {
 	{ 0,  102000 },
 	{ 1,  204000 },
 	{ 2,  340000 },
-	{ 3,  480000 },
+	{ 3,  475000 },
 	{ 4,  640000 },
 	{ 5,  760000 },
 	{ 6,  880000 },
@@ -4147,7 +4147,7 @@ static struct cpufreq_frequency_table freq_table_1p4GHz[] = {
 	{ 0,  102000 },
 	{ 1,  204000 },
 	{ 2,  370000 },
-	{ 3,  480000 },
+	{ 3,  475000 },
 	{ 4,  620000 },
 	{ 5,  760000 },
 	{ 6,  880000 },
diff --git a/arch/arm/mach-tegra/tegra3_dvfs.c b/arch/arm/mach-tegra/tegra3_dvfs.c
index 51ce676f4b68..17c5cf733a5f 100644
--- a/arch/arm/mach-tegra/tegra3_dvfs.c
+++ b/arch/arm/mach-tegra/tegra3_dvfs.c
@@ -42,7 +42,7 @@ static const int core_speedo_nominal_millivolts[] =
 
 static const int cpu_speedo_nominal_millivolts[] =
 /* speedo_id 0,    1,    2,    3 */
-	{ 1125, 1150, 1125, 1150 };
+	{ 1125, 1150, 1150, 1150 };
 
 #define KHZ 1000
 #define MHZ 1000000
@@ -127,18 +127,18 @@ static struct dvfs cpu_dvfs_table[] = {
 	CPU_DVFS("cpu_g", 0, 2, MHZ, 540, 540, 711, 711, 883, 883, 1039, 1039, 1039, 1178, 1206, 1300),
 	CPU_DVFS("cpu_g", 0, 3, MHZ, 570, 570, 777, 777, 931, 931, 1102, 1102, 1102, 1216, 1300),
 
-	CPU_DVFS("cpu_g", 1, 0, MHZ,   1, 399, 399, 541, 541, 684,  684,  817,  817,  817, 1026, 1102, 1149, 1187, 1225, 1282, 1300),
-	CPU_DVFS("cpu_g", 1, 1, MHZ,   1, 481, 481, 652, 652, 807,  807,  948,  948,  948, 1117, 1171, 1206, 1300),
-	CPU_DVFS("cpu_g", 1, 2, MHZ,   1, 540, 540, 711, 711, 883,  883, 1039, 1039, 1039, 1178, 1206, 1300),
-	CPU_DVFS("cpu_g", 1, 3, MHZ,   1, 570, 570, 777, 777, 931,  931, 1102, 1102, 1102, 1216, 1300),
+	CPU_DVFS("cpu_g", 1, 0, MHZ,   1,   1, 510, 510, 650, 650,  770,  770,  770,  870,  970, 1040, 1080, 1180, 1200, 1280, 1300),
+	CPU_DVFS("cpu_g", 1, 1, MHZ,   1,   1, 610, 610, 700, 700,  900,  900,  900, 1010, 1110, 1170, 1200, 1300),
+	CPU_DVFS("cpu_g", 1, 2, MHZ,   1,   1, 620, 620, 780, 780,  920,  920,  920, 1090, 1180, 1200, 1300),
+	CPU_DVFS("cpu_g", 1, 3, MHZ,   1,   1, 640, 640, 850, 850, 1000, 1000, 1000, 1180, 1230, 1300),
 
-	CPU_DVFS("cpu_g", 2, 1, MHZ, 481, 481, 652, 652, 807, 807,  948,  948,  948, 1117, 1171, 1206, 1254, 1292, 1311, 1400),
-	CPU_DVFS("cpu_g", 2, 2, MHZ, 540, 540, 711, 711, 883, 883, 1039, 1039, 1039, 1178, 1206, 1263, 1301, 1400),
-	CPU_DVFS("cpu_g", 2, 3, MHZ, 570, 570, 777, 777, 931, 931, 1102, 1102, 1102, 1216, 1255, 1304, 1400),
+	CPU_DVFS("cpu_g", 2, 1, MHZ,   1,   1, 610, 610, 700, 700,  900,  900,  900, 1010, 1110, 1170, 1200, 1250, 1300, 1330, 1400),
+	CPU_DVFS("cpu_g", 2, 2, MHZ,   1,   1, 620, 620, 780, 780,  920,  920,  920, 1090, 1180, 1200, 1300, 1310, 1350, 1400),
+	CPU_DVFS("cpu_g", 2, 3, MHZ,   1,   1, 640, 640, 850, 850, 1000, 1000, 1000, 1180, 1230, 1300, 1320, 1350, 1400),
 
-	CPU_DVFS("cpu_g", 3, 1, MHZ,   1, 481, 481, 652, 652, 807,  807,  948,  948,  948, 1117, 1171, 1206, 1254, 1292, 1311, 1400),
-	CPU_DVFS("cpu_g", 3, 2, MHZ,   1, 540, 540, 711, 711, 883,  883, 1039, 1039, 1039, 1178, 1206, 1263, 1301, 1400),
-	CPU_DVFS("cpu_g", 3, 3, MHZ,   1, 570, 570, 777, 777, 931,  931, 1102, 1102, 1102, 1216, 1255, 1304, 1400),
+	CPU_DVFS("cpu_g", 3, 1, MHZ,   1,   1, 610, 610, 700, 700,  900,  900,  900, 1010, 1110, 1170, 1200, 1250, 1300, 1330, 1400),
+	CPU_DVFS("cpu_g", 3, 2, MHZ,   1,   1, 620, 620, 780, 780,  920,  920,  920, 1090, 1180, 1200, 1300, 1310, 1350, 1400),
+	CPU_DVFS("cpu_g", 3, 3, MHZ,   1,   1, 640, 640, 850, 850, 1000, 1000, 1000, 1180, 1230, 1300, 1320, 1350, 1400),
 
 	/*
 	 * "Safe entry" to be used when no match for chip speedo, process
@@ -162,9 +162,9 @@ static struct dvfs cpu_dvfs_table[] = {
 static struct dvfs core_dvfs_table[] = {
 	/* Core voltages (mV):		   1000,   1050,   1100,   1150,    1200,    1250,    1300 */
 	/* Clock limits for internal blocks, PLLs */
-	CORE_DVFS("cpu_lp", 0, 1, KHZ,   294500, 342000, 427000, 484000,  500000,  500000,  500000),
-	CORE_DVFS("cpu_lp", 1, 1, KHZ,   294500, 342000, 427000, 484000,  500000,  500000,  500000),
-	CORE_DVFS("cpu_lp", 2, 1, KHZ,   304000, 370000, 437000, 503000,  541000,  579000,  620000),
+	CORE_DVFS("cpu_lp", 0, 1, KHZ,   294000, 342000, 427000, 475000,  500000,  500000,  500000),
+	CORE_DVFS("cpu_lp", 1, 1, KHZ,   294000, 342000, 427000, 475000,  500000,  500000,  500000),
+	CORE_DVFS("cpu_lp", 2, 1, KHZ,   295000, 370000, 428000, 475000,  513000,  579000,  620000),
 
 	CORE_DVFS("emc",    0, 1, KHZ,   266500, 266500, 266500, 266500,  533000,  533000,  533000),
 	CORE_DVFS("emc",    1, 1, KHZ,   408000, 408000, 408000, 408000,  667000,  667000,  667000),