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authorSeshendra Gadagottu <sgadagottu@nvidia.com>2011-09-02 18:14:40 +0530
committerVarun Colbert <vcolbert@nvidia.com>2011-09-06 16:47:26 -0700
commite654b3633e92c9b2ce26ce8ceaed7baaad071282 (patch)
tree71f5d91338525d5f89faef12982f5d4f50a9cf0d
parent969fe6f1a6b5e28cf6de75937fd100c73e6a99b4 (diff)
tegra: usb: phy: phy ready and phy off callbacks for HSIC
Added phy ready and phy off callbacks to indicate HSIC phy state. BUG 828389 Change-Id: I83e6ca2bb19bb6b35c3d9fa9f659bf1d32563184 Reviewed-on: http://git-master/r/50276 Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/include/mach/usb_phy.h2
-rwxr-xr-xarch/arm/mach-tegra/usb_phy.c12
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/usb_phy.h b/arch/arm/mach-tegra/include/mach/usb_phy.h
index ae6b60d44495..9d28b6e861b2 100644
--- a/arch/arm/mach-tegra/include/mach/usb_phy.h
+++ b/arch/arm/mach-tegra/include/mach/usb_phy.h
@@ -61,6 +61,8 @@ struct tegra_uhsic_config {
u8 elastic_overrun_limit;
int (*postsuspend)(void);
int (*preresume)(void);
+ int (*usb_phy_ready)(void);
+ int (*post_phy_off)(void);
};
enum tegra_usb_phy_port_speed {
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c
index adf7a4f3aad1..15977a3868a0 100755
--- a/arch/arm/mach-tegra/usb_phy.c
+++ b/arch/arm/mach-tegra/usb_phy.c
@@ -1884,6 +1884,8 @@ static int uhsic_phy_power_off(struct tegra_usb_phy *phy, bool is_dpd)
/* keep hsic reset de-asserted for 1 ms */
udelay(1000);
}
+ if (uhsic_config->post_phy_off && uhsic_config->post_phy_off())
+ return -EAGAIN;
return 0;
}
@@ -2246,6 +2248,7 @@ int tegra_usb_phy_bus_connect(struct tegra_usb_phy *phy)
{
unsigned long val;
void __iomem *base = phy->regs;
+ struct tegra_uhsic_config *uhsic_config = phy->config;
if (phy->usb_phy_type == TEGRA_USB_PHY_TYPE_HSIC) {
#ifndef CONFIG_ARCH_TEGRA_2x_SOC
@@ -2273,6 +2276,10 @@ int tegra_usb_phy_bus_connect(struct tegra_usb_phy *phy)
#endif
writel(val, base + UHSIC_PADS_CFG1);
+ if (uhsic_config->usb_phy_ready &&
+ uhsic_config->usb_phy_ready())
+ return -EAGAIN;
+
if (utmi_wait_register(base + UHSIC_STAT_CFG0, UHSIC_CONNECT_DETECT, UHSIC_CONNECT_DETECT) < 0) {
pr_err("%s: timeout waiting for hsic connect detect\n", __func__);
return -ETIMEDOUT;
@@ -2366,6 +2373,7 @@ int tegra_usb_phy_bus_idle(struct tegra_usb_phy *phy)
{
unsigned long val;
void __iomem *base = phy->regs;
+ struct tegra_uhsic_config *uhsic_config = phy->config;
if (phy->usb_phy_type == TEGRA_USB_PHY_TYPE_HSIC) {
#ifndef CONFIG_ARCH_TEGRA_2x_SOC
@@ -2392,6 +2400,10 @@ int tegra_usb_phy_bus_idle(struct tegra_usb_phy *phy)
val |= UHSIC_RPU_STROBE;
#endif
writel(val, base + UHSIC_PADS_CFG1);
+
+ if (uhsic_config->usb_phy_ready &&
+ uhsic_config->usb_phy_ready())
+ return -EAGAIN;
}
return 0;
}