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authorJohn Garry <john.garry@huawei.com>2016-09-06 23:36:13 +0800
committerMartin K. Petersen <martin.petersen@oracle.com>2016-09-14 12:54:17 -0400
commitf1dc358408330f6ffc4cf3fa6353684f4a976f43 (patch)
tree06c1eba0cae1de916ec044b9fd53d0fd0d74318f
parent4fde02ad66dc9ceb0b55daca21ef33b43df30ded (diff)
scsi: hisi_sas: keep CHL_INT2 masked for v2 HW
None of the CHL_INT2 interrupts are serviced in the channel irq ISR, so leave the interrupt source masked. The interrupt mask is initially set in init_reg_v2_hw(). Signed-off-by: John Garry <john.garry@huawei.com> Reviewed-by: Hannes Reinecke <hare@suse.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
-rw-r--r--drivers/scsi/hisi_sas/hisi_sas_v2_hw.c6
1 files changed, 0 insertions, 6 deletions
diff --git a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
index e0c124b6428e..25e7c58612c8 100644
--- a/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
+++ b/drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
@@ -965,14 +965,8 @@ static void start_phys_v2_hw(unsigned long data)
static void phys_init_v2_hw(struct hisi_hba *hisi_hba)
{
- int i;
struct timer_list *timer = &hisi_hba->timer;
- for (i = 0; i < hisi_hba->n_phy; i++) {
- hisi_sas_phy_write32(hisi_hba, i, CHL_INT2_MSK, 0x6a);
- hisi_sas_phy_read32(hisi_hba, i, CHL_INT2_MSK);
- }
-
setup_timer(timer, start_phys_v2_hw, (unsigned long)hisi_hba);
mod_timer(timer, jiffies + HZ);
}