summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorGary King <GKing@nvidia.com>2010-02-03 18:19:17 -0800
committerGerrit Code Review <gerrit2@git-master-01.nvidia.com>2010-02-03 18:19:17 -0800
commit29d8b2237347f87b7760a7c1e98aadc7fdeff08a (patch)
treec158c1177ab25061ee000fd2452e39f221ceb476
parentfdd07e66798da046fd09cfdcfe4fd7e0da80b2da (diff)
parent1813dcb0ee82867705908bc698072bb49c9abbae (diff)
Merge "[ARM] outer cache: add outer_cache sync function" into android-tegra-2.6.29
-rw-r--r--arch/arm/include/asm/cacheflush.h9
-rw-r--r--arch/arm/mm/cache-l2x0.c6
2 files changed, 14 insertions, 1 deletions
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h
index c4fbcc59203b..de24d5190b08 100644
--- a/arch/arm/include/asm/cacheflush.h
+++ b/arch/arm/include/asm/cacheflush.h
@@ -216,6 +216,7 @@ struct outer_cache_fns {
void (*inv_range)(unsigned long, unsigned long);
void (*clean_range)(unsigned long, unsigned long);
void (*flush_range)(unsigned long, unsigned long);
+ void (*sync)(void);
};
/*
@@ -361,7 +362,11 @@ static inline void outer_flush_range(unsigned long start, unsigned long end)
if (outer_cache.flush_range)
outer_cache.flush_range(start, end);
}
-
+static inline void outer_sync(void)
+{
+ if (outer_cache.sync)
+ outer_cache.sync();
+}
#else
static inline void outer_inv_range(unsigned long start, unsigned long end)
@@ -370,6 +375,8 @@ static inline void outer_clean_range(unsigned long start, unsigned long end)
{ }
static inline void outer_flush_range(unsigned long start, unsigned long end)
{ }
+static inline void outer_sync(void)
+{ }
#endif
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index be8eb432e17c..7a3270a5b3a6 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -98,6 +98,11 @@ static void l2x0_flush_range(unsigned long start, unsigned long end)
cache_sync();
}
+static void l2x0_sync(void)
+{
+ cache_sync();
+}
+
void l2x0_deinit()
{
/* FIXME: get num_ways from the cache config */
@@ -164,6 +169,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask)
outer_cache.inv_range = l2x0_inv_range;
outer_cache.clean_range = l2x0_clean_range;
outer_cache.flush_range = l2x0_flush_range;
+ outer_cache.sync = l2x0_sync;
printk(KERN_INFO "L2X0 cache controller enabled\n");
}