tegra: Supporting the uart controller version 1.2.

Updating the capability structure to support the uart controller
version 1.2
Updating the relocation table entry for the uart with version number
as 1.2.

Bug 627427 Ap20 UART FIOF triggers are not same as the AP15.

Change-Id: Ia1f676f1d9401008a3958bc8743252ea2cc61ddc

2 files changed, 13 insertions, 7 deletions

diff --git a/arch/arm/mach-tegra/include/ap20/project_relocation_table.h b/arch/arm/mach-tegra/include/ap20/project_relocation_table.h
index 8328f22c0b61..2276060dd560 100644
--- a/arch/arm/mach-tegra/include/ap20/project_relocation_table.h
+++ b/arch/arm/mach-tegra/include/ap20/project_relocation_table.h
@@ -524,10 +524,10 @@
           0x70001f00, 0x00000008, 0x00741010, 0x70001f08, 0x00000008, \
           0x00321110, 0x70002000, 0x00000200, 0x00331010, 0x70002400, \
           0x00000200, 0x00341110, 0x70002800, 0x00000100, 0x00341110, \
-          0x70002a00, 0x00000100, 0x00351110, 0x70006000, 0x00000040, \
-          0x00351110, 0x70006040, 0x00000040, 0x00361010, 0x70006100, \
-          0x00000100, 0x00351110, 0x70006200, 0x00000100, 0x00351110, \
-          0x70006300, 0x00000100, 0x00351110, 0x70006400, 0x00000100, \
+          0x70002a00, 0x00000100, 0x00351210, 0x70006000, 0x00000040, \
+          0x00351210, 0x70006040, 0x00000040, 0x00361010, 0x70006100, \
+          0x00000100, 0x00351210, 0x70006200, 0x00000100, 0x00351210, \
+          0x70006300, 0x00000100, 0x00351210, 0x70006400, 0x00000100, \
           0x00371210, 0x70008000, 0x00000100, 0x00381010, 0x70008500, \
           0x00000100, 0x00391010, 0x70008a00, 0x00000200, 0x006d1010, \
           0x70009000, 0x00001000, 0x003a1010, 0x7000a000, 0x00000100, \
diff --git a/arch/arm/mach-tegra/nvddk/nvddk_uart.c b/arch/arm/mach-tegra/nvddk/nvddk_uart.c
index fc42f89a5f4f..c3f498b3a26d 100644
--- a/arch/arm/mach-tegra/nvddk/nvddk_uart.c
+++ b/arch/arm/mach-tegra/nvddk/nvddk_uart.c
@@ -470,11 +470,12 @@ UartGetSocCapabilities(
     SocUartCapability *pUartSocCaps)
 {
     NvRmModuleID ModuleId;
-    static SocUartCapability s_SocUartCapsList[2];
+    static SocUartCapability s_SocUartCapsList[3];
     NvRmModuleCapability UartCapsList[] =
     {
         { 1, 0, 0, &s_SocUartCapsList[0] }, // Major.Minor = 1.0
         { 1, 1, 0, &s_SocUartCapsList[1] }, // Major.Minor = 1.1
+        { 1, 2, 0, &s_SocUartCapsList[2] }, // Major.Minor = 1.2
     };
     SocUartCapability *pUartCaps = NULL;
 
@@ -485,16 +486,21 @@ UartGetSocCapabilities(
     s_SocUartCapsList[0].FifoDepth = 16;
 
     s_SocUartCapsList[1].IsEndOfDataIntSupported = NV_TRUE;
-    s_SocUartCapsList[1].FifoDepth = 32;
+    s_SocUartCapsList[1].FifoDepth = 16;
+
+    s_SocUartCapsList[2].IsEndOfDataIntSupported = NV_TRUE;
+    s_SocUartCapsList[2].FifoDepth = 32;
 
     // FIXEME!! HW Bug: The RTS hw flow control is not working when enabling
     // EORD interrupt.
     // As the EORD is more important feature then the Rts hw flow control,
     // disabling this feature.
     s_SocUartCapsList[1].IsRtsHwFlowControlSupported = NV_FALSE;
+    s_SocUartCapsList[2].IsRtsHwFlowControlSupported = NV_FALSE;
 
     // Get the capability from modules files.
-    NV_ASSERT_SUCCESS(NvRmModuleGetCapabilities(hRmDevice, ModuleId, UartCapsList, 2,
+    NV_ASSERT_SUCCESS(NvRmModuleGetCapabilities(hRmDevice, ModuleId,
+                           UartCapsList, NV_ARRAY_SIZE(UartCapsList),
                                     (void **)&pUartCaps));
     pUartSocCaps->IsEndOfDataIntSupported = pUartCaps->IsEndOfDataIntSupported;
     pUartSocCaps->IsRtsHwFlowControlSupported = pUartCaps->IsRtsHwFlowControlSupported;