tegra: NOR: Pass timing register value from platfom data

Get timing register value from platform data
instead of timing structure.

Fix NOR device registration using tegra_nor_device.

Signed-off-by: Manoj Chourasia <mchouraia@nvidia.com>

Change-Id: I4ece8b149df1bc7ad41e8be3dc3e415b18a44072
Reviewed-on: http://git-master/r/56889
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>

5 files changed, 58 insertions, 119 deletions

diff --git a/arch/arm/mach-tegra/board-p1852.c b/arch/arm/mach-tegra/board-p1852.c
index 22ca0cbbb080..9863997fff94 100644
--- a/arch/arm/mach-tegra/board-p1852.c
+++ b/arch/arm/mach-tegra/board-p1852.c
@@ -33,6 +33,7 @@
 #include <linux/gpio.h>
 #include <linux/input.h>
 #include <linux/platform_data/tegra_usb.h>
+#include <linux/platform_data/tegra_nor.h>
 #include <linux/usb/android_composite.h>
 #include <linux/spi/spi.h>
 #include <linux/mtd/partitions.h>
@@ -324,6 +325,31 @@ static void p1852_usb_init(void)
 
 }
 
+static struct tegra_nor_platform_data p1852_nor_data = {
+	.flash = {
+		.map_name = "cfi_probe",
+		.width = 2,
+	},
+	.chip_parms = {
+		/* FIXME: Need to use characterized value */
+		.timing_default = {
+			.timing0 = 0xA0400273,
+			.timing1 = 0x00030402,
+		},
+		.timing_read = {
+			.timing0 = 0xA0400273,
+			.timing1 = 0x00030402,
+		},
+	},
+};
+
+static void p1852_nor_init(void)
+{
+	tegra_nor_device.resource[2].end = TEGRA_NOR_FLASH_BASE + SZ_64M - 1;
+	tegra_nor_device.dev.platform_data = &p1852_nor_data;
+	platform_device_register(&tegra_nor_device);
+}
+
 void __init tegra_tsensor_init(void)
 {
 	tegra3_tsensor_init(NULL);
@@ -342,6 +368,7 @@ static void __init tegra_p1852_init(void)
 	p1852_spi_init();
 	platform_add_devices(p1852_devices, ARRAY_SIZE(p1852_devices));
 	p1852_panel_init();
+	p1852_nor_init();
 }
 
 static void __init tegra_p1852_reserve(void)
diff --git a/arch/arm/mach-tegra/p852/board-p852.c b/arch/arm/mach-tegra/p852/board-p852.c
index 4bc8b9d6d0e0..46c1fdc428fe 100644
--- a/arch/arm/mach-tegra/p852/board-p852.c
+++ b/arch/arm/mach-tegra/p852/board-p852.c
@@ -503,70 +503,23 @@ static struct platform_device *p852_devices[] __initdata = {
 	&tegra_itu656,
 };
 
-#ifdef CONFIG_MTD_NOR_TEGRA
-static struct tegra_nor_chip_parms nor_chip_parms[] = {
-	[0] = {
-	       .timing_default = {
-				  .pg_rdy = 120,
-				  .pg_seq = 35,
-				  .mux = 5,
-				  .hold = 25,
-				  .adv = 50,
-				  .ce = 35,
-				  .we = 50,
-				  .oe = 50,
-				  .wait = 70,
-				  },
-	       .timing_read = {
-			       .pg_rdy = 120,
-			       .pg_seq = 25,
-			       .mux = 5,
-			       .hold = 25,
-			       .adv = 50,
-			       .ce = 35,
-			       .we = 5,
-			       .oe = 120,
-			       .wait = 5,
-			       },
-	       },
-};
-
-static struct flash_platform_data p852_flash = {
-	.map_name = "cfi_probe",
-	.width = 2,
-};
-
-static struct tegra_nor_platform p852_nor_data = {
-	.flash = &p852_flash,
-	.chip_parms = nor_chip_parms,
-	.nr_chip_parms = ARRAY_SIZE(nor_chip_parms),
-};
-
-static struct resource resources_nor[] = {
-	[0] = {
-	       .start = INT_SNOR,
-	       .end = INT_SNOR,
-	       .flags = IORESOURCE_IRQ,
-	       },
-	[1] = {
-	       /* Map the size of flash */
-	       .start = 0xd0000000,
-	       .end = 0xd0000000 + SZ_64M - 1,
-	       .flags = IORESOURCE_MEM,
-	       }
-};
-
-struct platform_device p852_nor_device = {
-	.name = "tegra_nor",
-	.id = -1,
-	.num_resources = ARRAY_SIZE(resources_nor),
-	.resource = resources_nor,
-	.dev = {
-		.platform_data = &p852_nor_data,
-		.coherent_dma_mask = 0xffffffff,
+static struct tegra_nor_platform_data p852_nor_data = {
+	.flash = {
+		.map_name = "cfi_probe",
+		.width = 2,
+	},
+	.chip_parms = {
+		/* FIXME: use characterized clock freq */
+		.timing_default = {
+			.timing0 = 0xA0300243,
+			.timing1 = 0x00040406,
+		},
+		.timing_read = {
+			.timing0 = 0xA0300243,
+			.timing1 = 0x00000A00,
 		},
+	},
 };
-#endif
 
 #ifdef CONFIG_TEGRA_SPI_I2S
 struct spi_board_info tegra_spi_i2s_device __initdata = {
@@ -890,10 +843,12 @@ static void __init p852_flash_init(void)
 {
 	if (p852_sku_peripherals & P852_SKU_NAND_ENABLE)
 		platform_device_register(&p852_nand_device);
-#ifdef CONFIG_MTD_NOR_TEGRA
-	if (p852_sku_peripherals & P852_SKU_NOR_ENABLE)
-		platform_device_register(&p852_nor_device);
-#endif
+
+	if (p852_sku_peripherals & P852_SKU_NOR_ENABLE) {
+		tegra_nor_device.resource[2].end = TEGRA_NOR_FLASH_BASE + SZ_64M - 1;
+		tegra_nor_device.dev.platform_data = &p852_nor_data;
+		platform_device_register(&tegra_nor_device);
+	}
 }
 
 void __init p852_common_init(void)
diff --git a/arch/arm/mach-tegra/p852/board-p852.h b/arch/arm/mach-tegra/p852/board-p852.h
index 6e304e37f0aa..d3b08a8fa5ae 100644
--- a/arch/arm/mach-tegra/p852/board-p852.h
+++ b/arch/arm/mach-tegra/p852/board-p852.h
@@ -31,6 +31,7 @@
 #include <linux/spi/spi.h>
 #include <linux/i2c-tegra.h>
 #include <linux/platform_data/tegra_usb.h>
+#include <linux/platform_data/tegra_nor.h>
 #include <linux/gpio.h>
 
 #include <asm/mach-types.h>
diff --git a/drivers/mtd/maps/tegra_nor.c b/drivers/mtd/maps/tegra_nor.c
index 65299dfee149..47dc38db098c 100644
--- a/drivers/mtd/maps/tegra_nor.c
+++ b/drivers/mtd/maps/tegra_nor.c
@@ -272,7 +272,6 @@ static int tegra_snor_controller_init(struct tegra_nor_info *info)
 	struct tegra_nor_chip_parms *chip_parm = &info->plat->chip_parms;
 	u32 width = info->plat->flash.width;
 	u32 config = 0;
-	unsigned long clk_rate_khz = clk_get_rate(info->clk) / 1000;
 
 	config |= TEGRA_SNOR_CONFIG_DEVICE_MODE(0);
 	config |= TEGRA_SNOR_CONFIG_SNOR_CS(0);
@@ -293,46 +292,13 @@ static int tegra_snor_controller_init(struct tegra_nor_info *info)
 	snor_tegra_writel(info, config, TEGRA_SNOR_CONFIG_REG);
 	info->init_config = config;
 
-#define TIME_TO_CNT(timing) \
-	(((((timing) * (clk_rate_khz)) + 1000000 - 1) / 1000000) - 1)
-	info->timing0_default =
-	    (TEGRA_SNOR_TIMING0_PG_RDY
-	     (TIME_TO_CNT(chip_parm->timing_default.pg_rdy)) |
-	     TEGRA_SNOR_TIMING0_PG_SEQ(TIME_TO_CNT
-				       (chip_parm->timing_default.pg_seq)) |
-	     TEGRA_SNOR_TIMING0_MUX(TIME_TO_CNT(chip_parm->timing_default.mux))
-	     |
-	     TEGRA_SNOR_TIMING0_HOLD(TIME_TO_CNT
-				     (chip_parm->timing_default.hold)) |
-	     TEGRA_SNOR_TIMING0_ADV(TIME_TO_CNT(chip_parm->timing_default.adv))
-	     |
-	     TEGRA_SNOR_TIMING0_CE(TIME_TO_CNT(chip_parm->timing_default.ce)));
-
-	snor_tegra_writel(info, info->timing0_default, TEGRA_SNOR_TIMING0_REG);
-
-	info->timing1_default =
-	    (TEGRA_SNOR_TIMING1_WE(TIME_TO_CNT(chip_parm->timing_default.we)) |
-	     TEGRA_SNOR_TIMING1_OE(TIME_TO_CNT(chip_parm->timing_default.oe)) |
-	     TEGRA_SNOR_TIMING1_WAIT(TIME_TO_CNT
-				     (chip_parm->timing_default.wait)));
+	info->timing0_default = chip_parm->timing_default.timing0;
+	info->timing0_read = chip_parm->timing_read.timing0;
+	info->timing1_default = chip_parm->timing_default.timing1;
+	info->timing1_read = chip_parm->timing_read.timing0;
 
 	snor_tegra_writel(info, info->timing1_default, TEGRA_SNOR_TIMING1_REG);
-
-	info->timing0_read =
-	    (TEGRA_SNOR_TIMING0_PG_RDY
-	     (TIME_TO_CNT(chip_parm->timing_read.pg_rdy)) |
-	     TEGRA_SNOR_TIMING0_PG_SEQ(TIME_TO_CNT
-				       (chip_parm->timing_read.pg_seq)) |
-	     TEGRA_SNOR_TIMING0_MUX(TIME_TO_CNT(chip_parm->timing_read.mux)) |
-	     TEGRA_SNOR_TIMING0_HOLD(TIME_TO_CNT(chip_parm->timing_read.hold)) |
-	     TEGRA_SNOR_TIMING0_ADV(TIME_TO_CNT(chip_parm->timing_read.adv)) |
-	     TEGRA_SNOR_TIMING0_CE(TIME_TO_CNT(chip_parm->timing_read.ce)));
-
-	info->timing1_read =
-	    (TEGRA_SNOR_TIMING1_WE(TIME_TO_CNT(chip_parm->timing_read.we)) |
-	     TEGRA_SNOR_TIMING1_OE(TIME_TO_CNT(chip_parm->timing_read.oe)) |
-	     TEGRA_SNOR_TIMING1_WAIT(TIME_TO_CNT(chip_parm->timing_read.wait)));
-#undef TIME_TO_CNT
+	snor_tegra_writel(info, info->timing0_default, TEGRA_SNOR_TIMING0_REG);
 	return 0;
 }
 
diff --git a/include/linux/platform_data/tegra_nor.h b/include/linux/platform_data/tegra_nor.h
index 419a879342fb..cd8faff2f1cd 100644
--- a/include/linux/platform_data/tegra_nor.h
+++ b/include/linux/platform_data/tegra_nor.h
@@ -22,21 +22,11 @@
 
 #include <asm/mach/flash.h>
 
-struct tegra_nor_chip_timing {
-	uint32_t pg_rdy;
-	uint32_t pg_seq;
-	uint32_t mux;
-	uint32_t hold;
-	uint32_t adv;
-	uint32_t ce;
-	uint32_t we;
-	uint32_t oe;
-	uint32_t wait;
-};
-
 struct tegra_nor_chip_parms {
-	struct tegra_nor_chip_timing timing_default;
-	struct tegra_nor_chip_timing timing_read;
+	struct {
+		uint32_t timing0;
+		uint32_t timing1;
+	} timing_default, timing_read;
 };
 
 struct tegra_nor_platform_data {