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authorColin Cross <ccross@android.com>2011-06-17 16:27:21 -0700
committerDan Willemsen <dwillemsen@nvidia.com>2011-11-30 21:37:10 -0800
commit8332679a3b04db571950bf30cbc44dd4a7838e14 (patch)
treeb8d1ce7b585655cdc4ebb1db0c9612ac4ba58174
parenta972fd8e76bc192aeb4dc1acc4140c6795c66bd6 (diff)
Revert "ARM: tegra: resolve ulpi disconnect issue"
Commit 190f7b3ed5a597d2232e9047b50ac2d7613c3272 was an incorrect merge, revert it. Change-Id: I1c7e09fdbaad6637326facbc0ee06117bfb15e48
-rw-r--r--arch/arm/mach-tegra/usb_phy.c37
1 files changed, 13 insertions, 24 deletions
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c
index 70746eee4e5b..1d042af637e1 100644
--- a/arch/arm/mach-tegra/usb_phy.c
+++ b/arch/arm/mach-tegra/usb_phy.c
@@ -54,6 +54,7 @@
#define USB_WAKE_ON_CNNT_EN_DEV (1 << 3)
#define USB_WAKE_ON_DISCON_EN_DEV (1 << 4)
#define USB_SUSP_CLR (1 << 5)
+#define USB_CLKEN (1 << 6)
#define USB_PHY_CLK_VALID (1 << 7)
#define UTMIP_RESET (1 << 11)
#define UHSIC_RESET (1 << 11)
@@ -292,7 +293,7 @@ static int utmip_pad_power_off(struct tegra_usb_phy *phy)
static int utmi_wait_register(void __iomem *reg, u32 mask, u32 result)
{
- unsigned long timeout = 2000;
+ unsigned long timeout = 2500;
do {
if ((readl(reg) & mask) == result)
return 0;
@@ -353,7 +354,7 @@ static void utmi_phy_clk_enable(struct tegra_usb_phy *phy)
}
if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
- USB_PHY_CLK_VALID))
+ USB_PHY_CLK_VALID) < 0)
pr_err("%s: timeout waiting for phy to stabilize\n", __func__);
}
@@ -375,6 +376,8 @@ static int utmi_phy_power_on(struct tegra_usb_phy *phy)
val = readl(base + UTMIP_TX_CFG0);
val &= ~UTMIP_FS_PREABMLE_J;
+ if (phy->instance == 2)
+ val |= UTMIP_HS_DISCON_DISABLE;
writel(val, base + UTMIP_TX_CFG0);
val = readl(base + UTMIP_HSRX_CFG0);
@@ -606,7 +609,6 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
unsigned long val;
void __iomem *base = phy->regs;
struct tegra_ulpi_config *config = phy->config;
- unsigned long timeout = 2000;
clk_enable(phy->clk);
msleep(1);
@@ -633,15 +635,18 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
val = readl(base + USB_SUSP_CTRL);
val |= USB_SUSP_CLR;
writel(val, base + USB_SUSP_CTRL);
- udelay(100);
+
+ if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID,
+ USB_PHY_CLK_VALID) < 0)
+ pr_err("%s: timeout waiting for phy to stabilize\n", __func__);
+
+ if (utmi_wait_register(base + USB_SUSP_CTRL, USB_CLKEN, USB_CLKEN) < 0)
+ pr_err("%s: timeout waiting for AHB clock\n", __func__);
val = readl(base + USB_SUSP_CTRL);
val &= ~USB_SUSP_CLR;
writel(val, base + USB_SUSP_CTRL);
- if (utmi_wait_register(base + USB_SUSP_CTRL, USB_PHY_CLK_VALID, USB_PHY_CLK_VALID))
- pr_err("%s: timeout waiting for phy to stabilize\n", __func__);
-
val = 0;
writel(val, base + ULPI_TIMING_CTRL_1);
@@ -656,24 +661,8 @@ static int ulpi_phy_power_on(struct tegra_usb_phy *phy)
val |= ULPI_DIR_TRIMMER_LOAD;
writel(val, base + ULPI_TIMING_CTRL_1);
- val = 0;
- val |= ULPI_WAKEUP;
- val |= ULPI_RD_WR;
- writel(val, base + ULPI_VIEWPORT);
-
-
- do {
- if ((readl(base + ULPI_VIEWPORT) & ULPI_WAKEUP))
- udelay(1);
- else
- break;
- timeout--;
- } while (timeout);
- if (!timeout)
- pr_err("%s: timeout on ULPI Wakeup\n", __func__);
-
/* Fix VbusInvalid due to floating VBUS */
- ret = otg_io_write(phy->ulpi, 0xC0, 0x08);
+ ret = otg_io_write(phy->ulpi, 0x40, 0x08);
if (ret) {
pr_err("%s: ulpi write failed\n", __func__);
return ret;