diff options
author | Quan Zhang <spring.zhang@nxp.com> | 2016-09-06 03:34:24 +0800 |
---|---|---|
committer | Leonard Crestez <leonard.crestez@nxp.com> | 2018-08-24 12:41:33 +0300 |
commit | f13a5de126bd300b1d40fb4dc20853b655e4d7be (patch) | |
tree | 5a7330c3e9aad8f55168cb42e281b38a334f35da | |
parent | 6d581674d599fd8bff17c4e10007f00674ea1cd7 (diff) |
MLK-13206 dcp: mx6sl: add missing components in dts
After MX6ULL DCP issue is fixed in commit 7a1cc1f, it introduces a new issue,
MX6SL will meet issue as no dcp clock is defined when initializing:
[ 3.061344] mxs-dcp 20fc000.dcp: can't identify DCP clk: -2
On mx6sl, dcp clock is always on, so the patch use dummy as dcp clock directly.
Signed-off-by: Quan Zhang <spring.zhang@nxp.com>
-rw-r--r-- | Documentation/devicetree/bindings/crypto/fsl-dcp.txt | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sl.dtsi | 4 |
2 files changed, 5 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt b/Documentation/devicetree/bindings/crypto/fsl-dcp.txt index 6949e50f1f16..120792d13669 100644 --- a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt +++ b/Documentation/devicetree/bindings/crypto/fsl-dcp.txt @@ -10,7 +10,7 @@ Required properties: Example: dcp@80028000 { - compatible = "fsl,imx28-dcp", "fsl,imx23-dcp"; + compatible = "fsl,imx6sl-dcp", "fsl,imx28-dcp", "fsl,imx23-dcp"; reg = <0x80028000 0x2000>; interrupts = <52 53>; status = "okay"; diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 0d5a58b38e67..aa31688b4e2f 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -840,6 +840,10 @@ interrupts = <0 99 IRQ_TYPE_LEVEL_HIGH>, <0 100 IRQ_TYPE_LEVEL_HIGH>, <0 101 IRQ_TYPE_LEVEL_HIGH>; + /* DCP clock always on */ + clocks = <&clks IMX6SL_CLK_DUMMY>; + clock-names = "dcp"; + status = "okay"; }; }; |