diff options
| author | Dong Aisheng <aisheng.dong@nxp.com> | 2021-11-30 14:59:23 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2021-11-30 14:59:23 +0800 |
| commit | b4e0c69788c55460f5cc7f1c83d748ce6cf62fdf (patch) | |
| tree | dba03cf30adeefb638e64833e72bf99846ef6e43 | |
| parent | 8529f2a0a81210a877e410151e6322005b874f05 (diff) | |
| parent | 0fc1913eaa5e4f674ee493195a179cd725c19bc2 (diff) | |
Merge remote-tracking branch 'origin/dts/qoriq' into dts/next
* origin/dts/qoriq: (135 commits)
arm64: dts: ls1088a-qds: disable NOR flash as a workaround for boot issue
powerpc/fsl: update ifc node name to be memory-controller
arm64: dts: freescale: update ifc node name to be memory-controller
ARM: dts: update ifc node name to be memory-controller
powerpc/mpc85xx: remove "simple-bus" compatible from ifc node
...
169 files changed, 7427 insertions, 728 deletions
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt index b5cb374dc47d..10a91cc8b997 100644 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,layerscape-dcfg.txt @@ -8,7 +8,7 @@ Required properties: - compatible: Should contain a chip-specific compatible string, Chip-specific strings are of the form "fsl,<chip>-dcfg", The following <chip>s are known to be supported: - ls1012a, ls1021a, ls1043a, ls1046a, ls2080a. + ls1012a, ls1021a, ls1043a, ls1046a, ls2080a, lx2160a - reg : should contain base address and length of DCFG memory-mapped registers diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index d9c5ee21ce2a..1346c9cc0f37 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -898,6 +898,7 @@ properties: - enum: - fsl,ls1021a-moxa-uc-8410a - fsl,ls1021a-qds + - fsl,ls1021a-tsn - fsl,ls1021a-twr - const: fsl,ls1021a diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt index f7d48f23da44..10119d9ef4b1 100644 --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt @@ -44,6 +44,7 @@ Required properties: * "fsl,ls1046a-clockgen" * "fsl,ls1088a-clockgen" * "fsl,ls2080a-clockgen" + * "fsl,lx2160a-clockgen" Chassis-version clock strings include: * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks * "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml index 3592d49235e0..d7103b3e2440 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml @@ -19,6 +19,9 @@ properties: - const: fsl,imx21-i2c - const: fsl,vf610-i2c - items: + - const: fsl,vf610-i2c + - const: fsl,ls1021a-vf610-i2c + - items: - const: fsl,imx35-i2c - const: fsl,imx1-i2c - items: diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ifc.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ifc.yaml new file mode 100644 index 000000000000..3be1db30bf41 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/fsl,ifc.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,ifc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: FSL/NXP Integrated Flash Controller + +maintainers: + - Li Yang <leoyang.li@nxp.com> + +description: | + NXP's integrated flash controller (IFC) is an advanced version of the + enhanced local bus controller which includes similar programming and signal + interfaces with an extended feature set. The IFC provides access to multiple + external memory types, such as NAND flash (SLC and MLC), NOR flash, EPROM, + SRAM and other memories where address and data are shared on a bus. + +properties: + $nodename: + pattern: "^memory-controller@[0-9a-f]+$" + + compatible: + const: fsl,ifc + + "#address-cells": + enum: [2, 3] + description: | + Should be either two or three. The first cell is the chipselect + number, and the remaining cells are the offset into the chipselect. + + "#size-cells": + enum: [1, 2] + description: | + Either one or two, depending on how large each chipselect can be. + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 2 + description: | + IFC may have one or two interrupts. If two interrupt specifiers are + present, the first is the "common" interrupt (CM_EVTER_STAT), and the + second is the NAND interrupt (NAND_EVTER_STAT). If there is only one, + that interrupt reports both types of event. + + little-endian: + type: boolean + description: | + If this property is absent, the big-endian mode will be in use as default + for registers. + + ranges: + description: | + Each range corresponds to a single chipselect, and covers the entire + access window as configured. + +patternProperties: + "^.*@[a-f0-9]+(,[a-f0-9]+)+$": + type: object + description: | + Child device nodes describe the devices connected to IFC such as NOR (e.g. + cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices + like FPGAs, CPLDs, etc. + + required: + - compatible + - reg + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + memory-controller@ffe1e000 { + compatible = "fsl,ifc"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0x0 0xffe1e000 0 0x2000>; + interrupts = <16 2 19 2>; + little-endian; + + /* NOR, NAND Flashes and CPLD on board */ + ranges = <0x0 0x0 0x0 0xee000000 0x02000000>, + <0x1 0x0 0x0 0xffa00000 0x00010000>, + <0x3 0x0 0x0 0xffb00000 0x00020000>; + + flash@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "cfi-flash"; + reg = <0x0 0x0 0x2000000>; + bank-width = <2>; + device-width = <1>; + + partition@0 { + /* 32MB for user data */ + reg = <0x0 0x02000000>; + label = "NOR Data"; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt deleted file mode 100644 index 89427b018ba7..000000000000 --- a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt +++ /dev/null @@ -1,82 +0,0 @@ -Integrated Flash Controller - -Properties: -- name : Should be ifc -- compatible : should contain "fsl,ifc". The version of the integrated - flash controller can be found in the IFC_REV register at - offset zero. - -- #address-cells : Should be either two or three. The first cell is the - chipselect number, and the remaining cells are the - offset into the chipselect. -- #size-cells : Either one or two, depending on how large each chipselect - can be. -- reg : Offset and length of the register set for the device -- interrupts: IFC may have one or two interrupts. If two interrupt - specifiers are present, the first is the "common" - interrupt (CM_EVTER_STAT), and the second is the NAND - interrupt (NAND_EVTER_STAT). If there is only one, - that interrupt reports both types of event. - -- little-endian : If this property is absent, the big-endian mode will - be in use as default for registers. - -- ranges : Each range corresponds to a single chipselect, and covers - the entire access window as configured. - -Child device nodes describe the devices connected to IFC such as NOR (e.g. -cfi-flash) and NAND (fsl,ifc-nand). There might be board specific devices -like FPGAs, CPLDs, etc. - -Example: - - ifc@ffe1e000 { - compatible = "fsl,ifc", "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0x0 0xffe1e000 0 0x2000>; - interrupts = <16 2 19 2>; - little-endian; - - /* NOR, NAND Flashes and CPLD on board */ - ranges = <0x0 0x0 0x0 0xee000000 0x02000000 - 0x1 0x0 0x0 0xffa00000 0x00010000 - 0x3 0x0 0x0 0xffb00000 0x00020000>; - - flash@0,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x2000000>; - bank-width = <2>; - device-width = <1>; - - partition@0 { - /* 32MB for user data */ - reg = <0x0 0x02000000>; - label = "NOR Data"; - }; - }; - - flash@1,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,ifc-nand"; - reg = <0x1 0x0 0x10000>; - - partition@0 { - /* This location must not be altered */ - /* 1MB for u-boot Bootloader Image */ - reg = <0x0 0x00100000>; - label = "NAND U-Boot Image"; - read-only; - }; - }; - - cpld@3,0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "fsl,p1010rdb-cpld"; - reg = <0x3 0x0 0x000001f>; - }; - }; diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt index f36efa73a470..5697fe078072 100644 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt @@ -23,6 +23,7 @@ Required properties: "fsl,ls1012a-pcie" "fsl,ls1028a-pcie" EP mode: + "fsl,ls1028a-pcie-ep", "fsl,ls-pcie-ep" "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep" "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep" "fsl,ls2088a-pcie-ep", "fsl,ls-pcie-ep" @@ -30,8 +31,13 @@ Required properties: - reg: base addresses and lengths of the PCIe controller register blocks. - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property. -- interrupt-names: Must include the following entries: - "intr": The interrupt that is asserted for controller interrupts +- interrupt-names: It could include the following entries: + "aer": For interrupt line reporting aer events when non MSI/MSI-X/INTx mode + is used + "pme": For interrupt line reporting pme events when non MSI/MSI-X/INTx mode + is used + "intr": For interrupt line reporting miscellaneous controller events + ...... - fsl,pcie-scfg: Must include two entries. The first entry must be a link to the SCFG device node The second entry must be '0' or '1' based on physical PCIe controller index. @@ -47,8 +53,9 @@ Example: reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ - interrupt-names = "intr"; + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, /* aer interrupt */ + <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* pme interrupt */ + interrupt-names = "aer", "pme"; fsl,pcie-scfg = <&scfg 0>; #address-cells = <3>; #size-cells = <2>; diff --git a/arch/arm/boot/dts/ls1021a-qds.dts b/arch/arm/boot/dts/ls1021a-qds.dts index 74a67604876c..f1acb97aee69 100644 --- a/arch/arm/boot/dts/ls1021a-qds.dts +++ b/arch/arm/boot/dts/ls1021a-qds.dts @@ -1,49 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright 2013-2014 Freescale Semiconductor, Inc. * Copyright 2018 NXP - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; @@ -67,19 +25,12 @@ clock-frequency = <24576000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p3v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; }; sound { @@ -231,9 +182,9 @@ #address-cells = <2>; #size-cells = <1>; /* NOR, NAND Flashes and FPGA on board */ - ranges = <0x0 0x0 0x0 0x60000000 0x08000000 - 0x2 0x0 0x0 0x7e800000 0x00010000 - 0x3 0x0 0x0 0x7fb00000 0x00000100>; + ranges = <0x0 0x0 0x0 0x60000000 0x08000000>, + <0x2 0x0 0x0 0x7e800000 0x00010000>, + <0x3 0x0 0x0 0x7fb00000 0x00000100>; status = "okay"; nor@0,0 { @@ -254,7 +205,7 @@ fpga: board-control@3,0 { #address-cells = <1>; #size-cells = <1>; - compatible = "simple-bus"; + compatible = "simple-mfd"; reg = <0x3 0x0 0x0000100>; bank-width = <1>; device-width = <1>; @@ -328,6 +279,20 @@ }; }; +&qspi { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <20000000>; + reg = <0>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + }; +}; + &sai2 { status = "okay"; }; diff --git a/arch/arm/boot/dts/ls1021a-tsn.dts b/arch/arm/boot/dts/ls1021a-tsn.dts index 9d8f0c2a8aba..ff0ffb22768b 100644 --- a/arch/arm/boot/dts/ls1021a-tsn.dts +++ b/arch/arm/boot/dts/ls1021a-tsn.dts @@ -8,6 +8,7 @@ / { model = "NXP LS1021A-TSN Board"; + compatible = "fsl,ls1021a-tsn", "fsl,ls1021a"; sys_mclk: clock-mclk { compatible = "fixed-clock"; @@ -136,7 +137,6 @@ /* 3 axis accelerometer */ accelerometer@1e { compatible = "fsl,fxls8471"; - position = <0>; reg = <0x1e>; }; @@ -251,7 +251,7 @@ flash@0 { /* Rev. A uses 64MB flash, Rev. B & C use 32MB flash */ - compatible = "jedec,spi-nor", "s25fl256s1", "s25fl512s"; + compatible = "jedec,spi-nor"; spi-max-frequency = <20000000>; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/ls1021a-twr.dts b/arch/arm/boot/dts/ls1021a-twr.dts index 5edf001f6138..f5c03871b205 100644 --- a/arch/arm/boot/dts/ls1021a-twr.dts +++ b/arch/arm/boot/dts/ls1021a-twr.dts @@ -1,49 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright 2013-2014 Freescale Semiconductor, Inc. * Copyright 2018 NXP - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ /dts-v1/; @@ -65,19 +23,12 @@ clock-frequency = <24576000>; }; - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_3p3v: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "3P3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; + reg_3p3v: regulator { + compatible = "regulator-fixed"; + regulator-name = "3P3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; }; sound { diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi index 4fce81422943..9158450c4b01 100644 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ b/arch/arm/boot/dts/ls1021a.dtsi @@ -1,48 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright 2013-2014 Freescale Semiconductor, Inc. - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ #include <dt-bindings/interrupt-controller/arm-gic.h> @@ -51,7 +9,6 @@ / { #address-cells = <2>; #size-cells = <2>; - compatible = "fsl,ls1021a"; interrupt-parent = <&gic>; aliases { @@ -90,7 +47,7 @@ }; }; - memory { + memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x0>; }; @@ -165,10 +122,11 @@ interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; }; - ifc: ifc@1530000 { - compatible = "fsl,ifc", "simple-bus"; + ifc: memory-controller@1530000 { + compatible = "fsl,ifc"; reg = <0x0 0x1530000 0x0 0x10000>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; }; dcfg: dcfg@1ee0000 { @@ -290,78 +248,45 @@ reg = <0x0 0x1f00000 0x0 0x10000>; interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; fsl,tmu-range = <0xb0000 0x9002c 0x6004e 0x30066>; - fsl,tmu-calibration = <0x00000000 0x00000020 - 0x00000001 0x00000024 - 0x00000002 0x0000002a - 0x00000003 0x00000032 - 0x00000004 0x00000038 - 0x00000005 0x0000003e - 0x00000006 0x00000043 - 0x00000007 0x0000004a - 0x00000008 0x00000050 - 0x00000009 0x00000059 - 0x0000000a 0x0000005f - 0x0000000b 0x00000066 - - 0x00010000 0x00000023 - 0x00010001 0x0000002b - 0x00010002 0x00000033 - 0x00010003 0x0000003a - 0x00010004 0x00000042 - 0x00010005 0x0000004a - 0x00010006 0x00000054 - 0x00010007 0x0000005c - 0x00010008 0x00000065 - 0x00010009 0x0000006f - - 0x00020000 0x00000029 - 0x00020001 0x00000033 - 0x00020002 0x0000003d - 0x00020003 0x00000048 - 0x00020004 0x00000054 - 0x00020005 0x00000060 - 0x00020006 0x0000006c - - 0x00030000 0x00000025 - 0x00030001 0x00000033 - 0x00030002 0x00000043 - 0x00030003 0x00000055>; + fsl,tmu-calibration = <0x00000000 0x00000020>, + <0x00000001 0x00000024>, + <0x00000002 0x0000002a>, + <0x00000003 0x00000032>, + <0x00000004 0x00000038>, + <0x00000005 0x0000003e>, + <0x00000006 0x00000043>, + <0x00000007 0x0000004a>, + <0x00000008 0x00000050>, + <0x00000009 0x00000059>, + <0x0000000a 0x0000005f>, + <0x0000000b 0x00000066>, + + <0x00010000 0x00000023>, + <0x00010001 0x0000002b>, + <0x00010002 0x00000033>, + <0x00010003 0x0000003a>, + <0x00010004 0x00000042>, + <0x00010005 0x0000004a>, + <0x00010006 0x00000054>, + <0x00010007 0x0000005c>, + <0x00010008 0x00000065>, + <0x00010009 0x0000006f>, + + <0x00020000 0x00000029>, + <0x00020001 0x00000033>, + <0x00020002 0x0000003d>, + <0x00020003 0x00000048>, + <0x00020004 0x00000054>, + <0x00020005 0x00000060>, + <0x00020006 0x0000006c>, + + <0x00030000 0x00000025>, + <0x00030001 0x00000033>, + <0x00030002 0x00000043>, + <0x00030003 0x00000055>; #thermal-sensor-cells = <1>; }; - thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <1000>; - polling-delay = <5000>; - - thermal-sensors = <&tmu 0>; - - trips { - cpu_alert: cpu-alert { - temperature = <85000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu_crit: cpu-crit { - temperature = <95000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>, - <&cpu1 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - }; - }; - }; - dspi0: spi@2100000 { compatible = "fsl,ls1021a-v1.0-dspi"; #address-cells = <1>; @@ -389,41 +314,41 @@ }; i2c0: i2c@2180000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,vf610-i2c", "fsl,ls1021a-vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; clocks = <&clockgen 4 1>; - dma-names = "tx", "rx"; - dmas = <&edma0 1 39>, <&edma0 1 38>; + dma-names = "rx", "tx"; + dmas = <&edma0 1 38>, <&edma0 1 39>; + scl-gpios = <&gpio3 23 0>; status = "disabled"; }; i2c1: i2c@2190000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,vf610-i2c", "fsl,ls1021a-vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2190000 0x0 0x10000>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; clocks = <&clockgen 4 1>; - dma-names = "tx", "rx"; - dmas = <&edma0 1 37>, <&edma0 1 36>; + dma-names = "rx", "tx"; + dmas = <&edma0 1 36>, <&edma0 1 37>; + scl-gpios = <&gpio3 23 0>; status = "disabled"; }; i2c2: i2c@21a0000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,vf610-i2c", "fsl,ls1021a-vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x21a0000 0x0 0x10000>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; clocks = <&clockgen 4 1>; - dma-names = "tx", "rx"; - dmas = <&edma0 1 35>, <&edma0 1 34>; + dma-names = "rx", "tx"; + dmas = <&edma0 1 34>, <&edma0 1 35>; + scl-gpios = <&gpio3 23 0>; status = "disabled"; }; @@ -879,23 +804,27 @@ dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; + usb3-lpm-capable; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + snps,host-vbus-glitches; }; pcie@3400000 { compatible = "fsl,ls1021a-pcie"; - reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */ - 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ + reg = <0x00 0x03400000 0x0 0x00010000>, /* controller registers */ + <0x40 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ + interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */ + interrupt-names = "pme", "aer"; fsl,pcie-scfg = <&scfg 0>; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; num-viewport = <6>; bus-range = <0x0 0xff>; - ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ - 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000>, /* downstream I/O */ + <0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ msi-parent = <&msi1>, <&msi2>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; @@ -908,18 +837,20 @@ pcie@3500000 { compatible = "fsl,ls1021a-pcie"; - reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */ - 0x48 0x00000000 0x0 0x00002000>; /* configuration space */ + reg = <0x00 0x03500000 0x0 0x00010000>, /* controller registers */ + <0x48 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */ + interrupt-names = "pme", "aer"; fsl,pcie-scfg = <&scfg 1>; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; num-viewport = <6>; bus-range = <0x0 0xff>; - ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ - 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000>, /* downstream I/O */ + <0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ msi-parent = <&msi1>, <&msi2>; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; @@ -992,6 +923,7 @@ <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "qdma-error", "qdma-queue0", "qdma-queue1"; + #dma-cells = <2>; dma-channels = <8>; block-number = <1>; block-offset = <0x1000>; @@ -1005,6 +937,7 @@ compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1+"; reg = <0x0 0x1ee2140 0x0 0x8>; #fsl,rcpm-wakeup-cells = <2>; + #power-domain-cells = <0>; }; ftm_alarm0: timer0@29d0000 { @@ -1016,4 +949,37 @@ big-endian; }; }; + + thermal-zones { + cpu_thermal: cpu-thermal { + polling-delay-passive = <1000>; + polling-delay = <5000>; + + thermal-sensors = <&tmu 0>; + + trips { + cpu_alert: cpu-alert { + temperature = <85000>; + hysteresis = <2000>; + type = "passive"; + }; + cpu_crit: cpu-crit { + temperature = <95000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert>; + cooling-device = + <&cpu0 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT + THERMAL_NO_LIMIT>; + }; + }; + }; + }; }; diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index aced1c0046fc..5ec5df38651e 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -1,4 +1,15 @@ # SPDX-License-Identifier: GPL-2.0 + +# required for overlay support +DTC_FLAGS_fsl-ls1028a-qds := -@ +DTC_FLAGS_fsl-ls1028a-qds-13bb := -@ +DTC_FLAGS_fsl-ls1028a-qds-65bb := -@ +DTC_FLAGS_fsl-ls1028a-qds-7777 := -@ +DTC_FLAGS_fsl-ls1028a-qds-85bb := -@ +DTC_FLAGS_fsl-ls1028a-qds-899b := -@ +DTC_FLAGS_fsl-ls1028a-qds-9999 := -@ + +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-2g5rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frdm.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-frwy.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-oxalis.dtb @@ -11,17 +22,36 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var2.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var3-ads2.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-kontron-sl28-var4.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-13bb.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-65bb.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-7777.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-85bb.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-899b.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-9999.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-rdb.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-rdb-dpdk.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-sdk.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb-usdpaa.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-frwy.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-frwy-sdk.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-frwy-usdpaa.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds-sdk.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-sdk.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-usdpaa.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-shared-mac9-only.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-usdpaa-shared-mac10.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb-usdpaa-shared.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-ten64.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-rdb.dtb +dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2081a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2080a-simu.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts new file mode 100644 index 000000000000..ce6bb86f49b4 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-2g5rdb.dts @@ -0,0 +1,91 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree file for NXP LS1012A 2G5RDB Board. + * + * Copyright 2017 NXP + * + * Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com> + */ +/dts-v1/; + +#include "fsl-ls1012a.dtsi" + +/ { + model = "LS1012A 2G5RDB Board"; + compatible = "fsl,ls1012a-rdb", "fsl,ls1012a"; + + aliases { + ethernet0 = &pfe_mac0; + ethernet1 = &pfe_mac1; + mmc0 = &esdhc0; + mmc1 = &esdhc1; + }; +}; + +&duart0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&qspi { + num-cs = <2>; + bus-num = <0>; + status = "okay"; + + qflash0: s25fs512s@0 { + compatible = "spansion,m25p80"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <20000000>; + m25p,fast-read; + reg = <0>; + }; +}; + +&sata { + status = "okay"; +}; + +&pfe { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii-2500"; + phy-handle = <&sgmii_phy1>; + }; + + pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii-2500"; + phy-handle = <&sgmii_phy2>; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + + sgmii_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x1>; + }; + + sgmii_phy2: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x2>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts index 2517528f684f..afac39692765 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts @@ -14,6 +14,11 @@ model = "LS1012A Freedom Board"; compatible = "fsl,ls1012a-frdm", "fsl,ls1012a"; + aliases { + ethernet0 = &pfe_mac0; + ethernet1 = &pfe_mac1; + }; + sys_mclk: clock-mclk { compatible = "fixed-clock"; #clock-cells = <0>; @@ -110,6 +115,45 @@ }; }; +&pfe { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; + phy-handle = <&sgmii_phy1>; + }; + + pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; + phy-handle = <&sgmii_phy2>; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + + sgmii_phy1: ethernet-phy@2 { + reg = <0x2>; + }; + + sgmii_phy2: ethernet-phy@1 { + reg = <0x1>; + }; + }; +}; + &sai2 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts index e8562585d4ac..18974f7c8c65 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts @@ -14,6 +14,60 @@ / { model = "LS1012A FRWY Board"; compatible = "fsl,ls1012a-frwy", "fsl,ls1012a"; + + aliases { + ethernet0 = &pfe_mac0; + ethernet1 = &pfe_mac1; + mmc0 = &esdhc0; + mmc1 = &esdhc1; + }; + + sys_mclk: clock-mclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "1P8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + sound { + compatible = "simple-audio-card"; + simple-audio-card,format = "i2s"; + simple-audio-card,widgets = + "Microphone", "Microphone Jack", + "Headphone", "Headphone Jack", + "Speaker", "Speaker Ext", + "Line", "Line In Jack"; + simple-audio-card,routing = + "MIC_IN", "Microphone Jack", + "Microphone Jack", "Mic Bias", + "LINE_IN", "Line In Jack", + "Headphone Jack", "HP_OUT", + "Speaker Ext", "LINE_OUT"; + + simple-audio-card,cpu { + sound-dai = <&sai2>; + frame-master; + bitclock-master; + }; + + simple-audio-card,codec { + sound-dai = <&codec>; + frame-master; + bitclock-master; + system-clock-frequency = <25000000>; + }; + }; +}; + +&pcie1 { + status = "okay"; }; &duart0 { @@ -22,6 +76,74 @@ &i2c0 { status = "okay"; + + codec: sgtl5000@a { + compatible = "fsl,sgtl5000"; + #sound-dai-cells = <0>; + reg = <0xa>; + VDDA-supply = <®_1p8v>; + VDDIO-supply = <®_1p8v>; + clocks = <&sys_mclk>; + }; +}; + +&qspi { + num-cs = <1>; + bus-num = <0>; + status = "okay"; + + qflash0: w25q16dw@0 { + compatible = "spansion,m25p80"; + #address-cells = <1>; + #size-cells = <1>; + m25p,fast-read; + spi-max-frequency = <20000000>; + reg = <0>; + }; +}; + +&pfe { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ + fsl,gemac-bus-id = <0x0>; /* BUS_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; + phy-handle = <&sgmii_phy1>; + }; + + pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; + phy-handle = <&sgmii_phy2>; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + + sgmii_phy1: ethernet-phy@2 { + reg = <0x2>; + }; + + sgmii_phy2: ethernet-phy@1 { + reg = <0x1>; + }; + }; +}; + +&sai2 { + status = "okay"; }; &pcie1 { diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts index e22c5e77fecd..ee9cc566928f 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts @@ -16,6 +16,8 @@ aliases { mmc0 = &esdhc0; mmc1 = &esdhc1; + ethernet0 = &pfe_mac0; + ethernet1 = &pfe_mac1; }; sys_mclk: clock-mclk { @@ -148,6 +150,47 @@ }; }; +&pfe { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ + fsl,mdio-mux-val = <0x2>; + phy-mode = "sgmii-2500"; + phy-handle = <&sgmii_phy1>; + }; + + pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ + fsl,mdio-mux-val = <0x3>; + phy-mode = "sgmii-2500"; + phy-handle = <&sgmii_phy2>; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + + sgmii_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x1>; + }; + + sgmii_phy2: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x2>; + }; + }; +}; + &sai2 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts index 79f155dedb2d..778c0ef6bc90 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts @@ -17,6 +17,8 @@ aliases { mmc0 = &esdhc0; mmc1 = &esdhc1; + ethernet0 = &pfe_mac0; + ethernet1 = &pfe_mac1; }; }; @@ -95,11 +97,49 @@ spi-max-frequency = <50000000>; m25p,fast-read; reg = <0>; - spi-rx-bus-width = <2>; - spi-tx-bus-width = <2>; + spi-rx-bus-width = <1>; + spi-tx-bus-width = <1>; }; }; &sata { status = "okay"; }; + +&pfe { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + pfe_mac0: ethernet@0 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x0>; /* GEM_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "sgmii"; + phy-handle = <&sgmii_phy>; + }; + + pfe_mac1: ethernet@1 { + compatible = "fsl,pfe-gemac-port"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; /* GEM_ID */ + fsl,mdio-mux-val = <0x0>; + phy-mode = "rgmii-id"; + phy-handle = <&rgmii_phy>; + }; + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + + sgmii_phy: ethernet-phy@2 { + reg = <0x2>; + }; + + rgmii_phy: ethernet-phy@1 { + reg = <0x1>; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index 50a72cda4727..9a815fcea6e3 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -282,7 +282,7 @@ dcfg: dcfg@1ee0000 { compatible = "fsl,ls1012a-dcfg", "syscon"; - reg = <0x0 0x1ee0000 0x0 0x10000>; + reg = <0x0 0x1ee0000 0x0 0x1000>; big-endian; }; @@ -343,13 +343,14 @@ }; i2c0: i2c@2180000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,vf610-i2c", "fsl,ls1012a-vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; + scl-gpios = <&gpio0 13 0>; status = "disabled"; }; @@ -484,13 +485,15 @@ }; usb0: usb@2f00000 { - compatible = "snps,dwc3"; + compatible = "fsl,ls1012a-dwc3", "snps,dwc3"; reg = <0x0 0x2f00000 0x0 0x10000>; interrupts = <0 60 0x4>; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + snps,host-vbus-glitches; + dma-coherent; }; sata: sata@3200000 { @@ -542,6 +545,7 @@ <0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>; + big-endian; status = "disabled"; }; @@ -560,6 +564,35 @@ }; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + pfe_reserved: packetbuffer@83400000 { + reg = <0 0x83400000 0 0xc00000>; + }; + }; + + pfe: pfe@4000000 { + compatible = "fsl,pfe"; + reg = <0x0 0x04000000 0x0 0xc00000>, /* AXI 16M */ + <0x0 0x83400000 0x0 0xc00000>; /* PFE DDR 12M */ + reg-names = "pfe", "pfe-ddr"; + fsl,pfe-num-interfaces = <0x2>; + interrupts = <0 172 0x4>, /* HIF interrupt */ + <0 173 0x4>, /*HIF_NOCPY interrupt */ + <0 174 0x4>; /* WoL interrupt */ + interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol"; + memory-region = <&pfe_reserved>; + fsl,pfe-scfg = <&scfg 0>; + fsl,rcpm-wakeup = <&rcpm 0xf0000020>; + clocks = <&clockgen 4 0>; + clock-names = "pfe"; + + status = "okay"; + }; + firmware { optee { compatible = "linaro,optee-tz"; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-13bb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-13bb.dts new file mode 100644 index 000000000000..f748a2c12a70 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-13bb.dts @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree fragment for LS1028A QDS board, serdes 13bb + * + * Copyright 2019-2021 NXP + * + * Requires a LS1028A QDS board with lane B rework. + * Requires a SCH-30841 card with lane A of connector rewired to PHY lane C. + * Set-up is a SCH-30842 card in slot 1 and SCH-30841 in slot 2. + */ + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&mdio_slot1>; + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + slot1_sgmii: ethernet-phy@2 { + /* AQR112 */ + reg = <0x2>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + }; + }; + + fragment@1 { + target = <&enetc_port0>; + + __overlay__ { + phy-handle = <&slot1_sgmii>; + phy-mode = "usxgmii"; + managed = "in-band-status"; + status = "okay"; + }; + }; + + fragment@2 { + target = <&mdio_slot2>; + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + /* 4 ports on AQR412 */ + slot2_qxgmii0: ethernet-phy@0 { + reg = <0x0>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + + slot2_qxgmii1: ethernet-phy@1 { + reg = <0x1>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + + slot2_qxgmii2: ethernet-phy@2 { + reg = <0x2>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + + slot2_qxgmii3: ethernet-phy@3 { + reg = <0x3>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + }; + }; + + fragment@3 { + target = <&mscc_felix_ports>; + + __overlay__ { + port@0 { + status = "okay"; + phy-handle = <&slot2_qxgmii0>; + phy-mode = "usxgmii"; + managed = "in-band-status"; + }; + + port@1 { + status = "okay"; + phy-handle = <&slot2_qxgmii1>; + phy-mode = "usxgmii"; + managed = "in-band-status"; + }; + + port@2 { + status = "okay"; + phy-handle = <&slot2_qxgmii2>; + phy-mode = "usxgmii"; + managed = "in-band-status"; + }; + + port@3 { + status = "okay"; + phy-handle = <&slot2_qxgmii3>; + phy-mode = "usxgmii"; + managed = "in-band-status"; + }; + }; + }; + + fragment@4 { + target = <&mscc_felix>; + + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-65bb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-65bb.dts new file mode 100644 index 000000000000..8ffb707a1576 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-65bb.dts @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree fragment for LS1028A QDS board, serdes 69xx + * + * Copyright 2019-2021 NXP + * + * Requires a LS1028A QDS board with lane B rework. + * Requires a SCH-30842 card in slot 1 and a SCH-28021 card in slot 2. + */ + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&mdio_slot1>; + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + slot1_sgmii: ethernet-phy@2 { + /* AQR112 */ + reg = <0x2>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + }; + }; + + fragment@1 { + target = <&enetc_port0>; + + __overlay__ { + phy-handle = <&slot1_sgmii>; + phy-mode = "2500base-x"; + managed = "in-band-status"; + status = "okay"; + }; + }; + + fragment@2 { + target = <&mdio_slot2>; + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + /* 4 ports on VSC8514 */ + slot2_qsgmii0: ethernet-phy@8 { + reg = <0x8>; + }; + + slot2_qsgmii1: ethernet-phy@9 { + reg = <0x9>; + }; + + slot2_qsgmii2: ethernet-phy@a { + reg = <0xa>; + }; + + slot2_qsgmii3: ethernet-phy@b { + reg = <0xb>; + }; + }; + }; + + fragment@3 { + target = <&mscc_felix_ports>; + + __overlay__ { + port@0 { + status = "okay"; + phy-handle = <&slot2_qsgmii0>; + phy-mode = "qsgmii"; + managed = "in-band-status"; + }; + + port@1 { + status = "okay"; + phy-handle = <&slot2_qsgmii1>; + phy-mode = "qsgmii"; + managed = "in-band-status"; + }; + + port@2 { + status = "okay"; + phy-handle = <&slot2_qsgmii2>; + phy-mode = "qsgmii"; + managed = "in-band-status"; + }; + + port@3 { + status = "okay"; + phy-handle = <&slot2_qsgmii3>; + phy-mode = "qsgmii"; + managed = "in-band-status"; + }; + }; + }; + + fragment@4 { + target = <&mscc_felix>; + + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dts new file mode 100644 index 000000000000..eb6a1e674f10 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dts @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree fragment for LS1028A QDS board, serdes 7777 + * + * Copyright 2019-2021 NXP + * + * Requires a LS1028A QDS board without lane B rework. + * Requires a SCH-30841 card without lane A/C rewire and with a FW with muxing + * disabled, plugged in slot 1. + */ + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&mdio_slot1>; + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + /* 4 ports on AQR412 */ + slot1_sxgmii0: ethernet-phy@0 { + reg = <0x0>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + + slot1_sxgmii1: ethernet-phy@1 { + reg = <0x1>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + + slot1_sxgmii2: ethernet-phy@2 { + reg = <0x2>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + + slot1_sxgmii3: ethernet-phy@3 { + reg = <0x3>; + compatible = "ethernet-phy-ieee802.3-c45"; + }; + }; + }; + + fragment@1 { + target = <&mscc_felix_ports>; + + __overlay__ { + port@0 { + status = "okay"; + phy-handle = <&slot1_sxgmii0>; + phy-mode = "2500base-x"; + }; + + port@1 { + status = "okay"; + phy-handle = <&slot1_sxgmii1>; + phy-mode = "2500base-x"; + }; + + port@2 { + status = "okay"; + phy-handle = <&slot1_sxgmii2>; + phy-mode = "2500base-x"; + }; + + port@3 { + status = "okay"; + phy-handle = <&slot1_sxgmii3>; + phy-mode = "2500base-x"; + }; + }; + }; + + fragment@2 { + target = <&mscc_felix>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-85bb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-85bb.dts new file mode 100644 index 000000000000..8e90c3088ba1 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-85bb.dts @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree fragment for LS1028A QDS board, serdes 85bb + * + * Copyright 2019-2021 NXP + * + * Requires a LS1028A QDS board with lane B rework. + * Requires a SCH-24801 card in slot 1 and a SCH-28021 card in slot 2. + */ + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&mdio_slot1>; + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + slot1_sgmii: ethernet-phy@1c { + /* 1st port on VSC8234 */ + reg = <0x1c>; + }; + }; + }; + + fragment@1 { + target = <&enetc_port0>; + + __overlay__ { + phy-handle = <&slot1_sgmii>; + phy-mode = "sgmii"; + managed = "in-band-status"; + status = "okay"; + }; + }; + + fragment@2 { + target = <&mdio_slot2>; + + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + /* 4 ports on VSC8514 */ + slot2_qsgmii0: ethernet-phy@8 { + reg = <0x8>; + }; + + slot2_qsgmii1: ethernet-phy@9 { + reg = <0x9>; + }; + + slot2_qsgmii2: ethernet-phy@a { + reg = <0xa>; + }; + + slot2_qsgmii3: ethernet-phy@b { + reg = <0xb>; + }; + }; + }; + + fragment@3 { + target = <&mscc_felix_ports>; + + __overlay__ { + port@0 { + status = "okay"; + phy-handle = <&slot2_qsgmii0>; + phy-mode = "qsgmii"; + managed = "in-band-status"; + }; + + port@1 { + status = "okay"; + phy-handle = <&slot2_qsgmii1>; + phy-mode = "qsgmii"; + managed = "in-band-status"; + }; + + port@2 { + status = "okay"; + phy-handle = <&slot2_qsgmii2>; + phy-mode = "qsgmii"; + managed = "in-band-status"; + }; + + port@3 { + status = "okay"; + phy-handle = <&slot2_qsgmii3>; + phy-mode = "qsgmii"; + managed = "in-band-status"; + }; + }; + }; + + fragment@4 { + target = <&mscc_felix>; + + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-899b.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-899b.dts new file mode 100644 index 000000000000..5d0a094e6c44 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-899b.dts @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree fragment for LS1028A QDS board, serdes 85xx + * + * Copyright 2019-2021 NXP + * + * Requires a LS1028A QDS board without lane B rework. + * Requires a SCH-24801 card in slot 1. + */ + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&mdio_slot1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + /* VSC8234 */ + slot1_sgmii0: ethernet-phy@1c { + reg = <0x1c>; + }; + + slot1_sgmii1: ethernet-phy@1d { + reg = <0x1d>; + }; + + slot1_sgmii2: ethernet-phy@1e { + reg = <0x1e>; + }; + + slot1_sgmii3: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + }; + + fragment@1 { + target = <&enetc_port0>; + __overlay__ { + phy-handle = <&slot1_sgmii0>; + phy-mode = "sgmii"; + managed = "in-band-status"; + status = "okay"; + }; + }; + + fragment@2 { + target = <&mscc_felix_ports>; + __overlay__ { + port@1 { + status = "okay"; + phy-handle = <&slot1_sgmii1>; + phy-mode = "sgmii"; + managed = "in-band-status"; + }; + + port@2 { + status = "okay"; + phy-handle = <&slot1_sgmii2>; + phy-mode = "sgmii"; + managed = "in-band-status"; + }; + }; + }; + + fragment@3 { + target = <&mscc_felix>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dts new file mode 100644 index 000000000000..1ef743c48e84 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dts @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree fragment for LS1028A QDS board, serdes 85xx + * + * Copyright 2019-2021 NXP + * + * Requires a LS1028A QDS board without lane B rework. + * Requires a SCH-24801 card in slot 1. + */ + +/dts-v1/; +/plugin/; + +/ { + fragment@0 { + target = <&mdio_slot1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + + /* VSC8234 */ + slot1_sgmii0: ethernet-phy@1c { + reg = <0x1c>; + }; + + slot1_sgmii1: ethernet-phy@1d { + reg = <0x1d>; + }; + + slot1_sgmii2: ethernet-phy@1e { + reg = <0x1e>; + }; + + slot1_sgmii3: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + }; + + fragment@1 { + target = <&mscc_felix_ports>; + __overlay__ { + port@0 { + status = "okay"; + phy-handle = <&slot1_sgmii0>; + phy-mode = "sgmii"; + managed = "in-band-status"; + }; + + port@1 { + status = "okay"; + phy-handle = <&slot1_sgmii1>; + phy-mode = "sgmii"; + managed = "in-band-status"; + }; + + port@2 { + status = "okay"; + phy-handle = <&slot1_sgmii2>; + phy-mode = "sgmii"; + managed = "in-band-status"; + }; + + port@3 { + status = "okay"; + phy-handle = <&slot1_sgmii3>; + phy-mode = "sgmii"; + managed = "in-band-status"; + }; + }; + }; + + fragment@2 { + target = <&mscc_felix>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts index bfd14b64567e..cc88e188e0e7 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts @@ -25,7 +25,7 @@ serial1 = &duart1; mmc0 = &esdhc; mmc1 = &esdhc1; - rtc1 = &ftm_alarm0; + rtc1 = &ftm_alarm1; }; chosen { @@ -211,6 +211,16 @@ status = "okay"; }; +&enetc_port1 { + phy-handle = <&qds_phy1>; + phy-connection-type = "rgmii-id"; + status = "okay"; +}; + +&enetc_port2 { + status = "okay"; +}; + &esdhc { status = "okay"; }; @@ -234,6 +244,15 @@ }; }; +&ftm_alarm1 { + status = "okay"; +}; + +&hdptx0 { + lane-mapping = <0x4e>; + status = "okay"; +}; + &i2c0 { status = "okay"; @@ -272,11 +291,6 @@ vcc-supply = <&sb_3v3>; }; - rtc@51 { - compatible = "nxp,pcf2129"; - reg = <0x51>; - }; - eeprom@56 { compatible = "atmel,24c512"; reg = <0x56>; @@ -318,16 +332,28 @@ }; -&enetc_port1 { - phy-handle = <&qds_phy1>; - phy-connection-type = "rgmii-id"; +&i2c1 { status = "okay"; + + rtc@51 { + compatible = "nxp,pcf2129"; + reg = <0x51>; + }; }; &lpuart0 { status = "okay"; }; +&lpuart1 { + status = "okay"; +}; + +&mscc_felix_port4 { + ethernet = <&enetc_port2>; + status = "okay"; +}; + &sai1 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb-dpdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb-dpdk.dts new file mode 100644 index 000000000000..ac9044386ccb --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb-dpdk.dts @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * NXP LS1028A RDB Board device tree file for DPDK + * + * Copyright 2018-2020 NXP + */ + +/dts-v1/; +#include "fsl-ls1028a-rdb.dts" + +&enetc_port0 { + /delete-property/ phy-handle; + /delete-property/ phy-connection-type; + /delete-node/ mdio; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +/delete-node/ &enetc_mdio_pf3; + +/* l2switch ports */ +&mscc_felix_port0 { + /delete-property/ phy-handle; +}; + +&mscc_felix_port1 { + /delete-property/ phy-handle; +}; + +&mscc_felix_port2 { + /delete-property/ phy-handle; +}; + +&mscc_felix_port3 { + /delete-property/ phy-handle; +}; + +&mscc_felix_port5 { + status = "okay"; +}; + +&enetc_port3 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts index d7b527272500..9fe9b6c2b45e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts @@ -21,7 +21,7 @@ serial1 = &duart1; mmc0 = &esdhc; mmc1 = &esdhc1; - rtc1 = &ftm_alarm0; + rtc1 = &ftm_alarm1; }; chosen { @@ -102,6 +102,52 @@ }; }; +&duart0 { + status = "okay"; +}; + +&duart1 { + status = "okay"; +}; + +&enetc_mdio_pf3 { + /* VSC8514 QSGMII quad PHY */ + qsgmii_phy0: ethernet-phy@10 { + reg = <0x10>; + }; + + qsgmii_phy1: ethernet-phy@11 { + reg = <0x11>; + }; + + qsgmii_phy2: ethernet-phy@12 { + reg = <0x12>; + }; + + qsgmii_phy3: ethernet-phy@13 { + reg = <0x13>; + }; +}; + +&enetc_port0 { + phy-handle = <&sgmii_phy0>; + phy-connection-type = "sgmii"; + managed = "in-band-status"; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + sgmii_phy0: ethernet-phy@2 { + reg = <0x2>; + }; + }; +}; + +&enetc_port2 { + status = "okay"; +}; + &esdhc { sd-uhs-sdr104; sd-uhs-sdr50; @@ -132,6 +178,15 @@ }; }; +&ftm_alarm1 { + status = "okay"; +}; + +&hdptx0 { + lane_mapping = <0x4e>; + status = "okay"; +}; + &i2c0 { status = "okay"; @@ -188,52 +243,6 @@ }; }; -&duart0 { - status = "okay"; -}; - -&duart1 { - status = "okay"; -}; - -&enetc_mdio_pf3 { - /* VSC8514 QSGMII quad PHY */ - qsgmii_phy0: ethernet-phy@10 { - reg = <0x10>; - }; - - qsgmii_phy1: ethernet-phy@11 { - reg = <0x11>; - }; - - qsgmii_phy2: ethernet-phy@12 { - reg = <0x12>; - }; - - qsgmii_phy3: ethernet-phy@13 { - reg = <0x13>; - }; -}; - -&enetc_port0 { - phy-handle = <&sgmii_phy0>; - phy-connection-type = "sgmii"; - managed = "in-band-status"; - status = "okay"; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - sgmii_phy0: ethernet-phy@2 { - reg = <0x2>; - }; - }; -}; - -&enetc_port2 { - status = "okay"; -}; - &mscc_felix { status = "okay"; }; @@ -279,6 +288,10 @@ status = "okay"; }; +&pwm0 { + status = "okay"; +}; + &sai4 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index 06b36cc65865..503b8a331e0b 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -66,6 +66,13 @@ }; }; + rtc_clk: rtc-clk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <32768>; + clock-output-names = "rtc_clk"; + }; + sysclk: sysclk { compatible = "fixed-clock"; #clock-cells = <0>; @@ -592,6 +599,7 @@ snps,dis_rxdet_inp3_quirk; snps,quirk-frame-length-adjustment = <0x20>; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + dma-coherent; }; usb1: usb@3110000 { @@ -602,6 +610,7 @@ snps,dis_rxdet_inp3_quirk; snps,quirk-frame-length-adjustment = <0x20>; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + dma-coherent; }; sata: sata@3200000 { @@ -642,6 +651,18 @@ status = "disabled"; }; + pcie_ep1: pcie_ep@3400000 { + compatible = "fsl,ls1028a-pcie-ep","fsl,ls-pcie-ep"; + reg = <0x00 0x03400000 0x0 0x00100000 + 0x80 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ + interrupt-names = "pme"; + num-ib-windows = <6>; + num-ob-windows = <8>; + status = "disabled"; + }; + pcie2: pcie@3500000 { compatible = "fsl,ls1028a-pcie"; reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */ @@ -669,6 +690,18 @@ status = "disabled"; }; + pcie_ep2: pcie_ep@3500000 { + compatible = "fsl,ls1028a-pcie-ep","fsl,ls-pcie-ep"; + reg = <0x00 0x03500000 0x0 0x00100000 + 0x88 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ + interrupt-names = "pme"; + num-ib-windows = <6>; + num-ob-windows = <8>; + status = "disabled"; + }; + smmu: iommu@5000000 { compatible = "arm,mmu-500"; reg = <0 0x5000000 0 0x800000>; @@ -800,6 +833,16 @@ clock-names = "wdog_clk", "apb_pclk"; }; + gpu@f0c0000 { + compatible = "fsl,ls1028a-gpu"; + reg = <0x0 0x0f0c0000 0x0 0x10000>, + <0x0 0x80000000 0x0 0x80000000>, + <0x0 0x0 0x0 0x3000000>; + reg-names = "base", "phys_baseaddr", + "contiguous_mem"; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>; + }; + sai1: audio-controller@f100000 { #sound-dai-cells = <0>; compatible = "fsl,vf610-sai"; @@ -1049,7 +1092,7 @@ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; - ports { + mscc_felix_ports: ports { #address-cells = <1>; #size-cells = <0>; @@ -1124,6 +1167,94 @@ reg = <0x01 0xf0800000 0x0 0x10000>; }; + pwm0: pwm@2800000 { + compatible = "fsl,vf610-ftm-pwm"; + #pwm-cells = <3>; + reg = <0x0 0x2800000 0x0 0x10000>; + clock-names = "ftm_sys", "ftm_ext", + "ftm_fix", "ftm_cnt_clk_en"; + clocks = <&clockgen 4 1>, <&clockgen 4 1>, + <&rtc_clk>, <&clockgen 4 1>; + status = "disabled"; + }; + + pwm1: pwm@2810000 { + compatible = "fsl,vf610-ftm-pwm"; + #pwm-cells = <3>; + reg = <0x0 0x2810000 0x0 0x10000>; + clock-names = "ftm_sys", "ftm_ext", + "ftm_fix", "ftm_cnt_clk_en"; + clocks = <&clockgen 4 1>, <&clockgen 4 1>, + <&rtc_clk>, <&clockgen 4 1>; + status = "disabled"; + }; + + pwm2: pwm@2820000 { + compatible = "fsl,vf610-ftm-pwm"; + #pwm-cells = <3>; + reg = <0x0 0x2820000 0x0 0x10000>; + clock-names = "ftm_sys", "ftm_ext", + "ftm_fix", "ftm_cnt_clk_en"; + clocks = <&clockgen 4 1>, <&clockgen 4 1>, + <&rtc_clk>, <&clockgen 4 1>; + status = "disabled"; + }; + + pwm3: pwm@2830000 { + compatible = "fsl,vf610-ftm-pwm"; + #pwm-cells = <3>; + reg = <0x0 0x2830000 0x0 0x10000>; + clock-names = "ftm_sys", "ftm_ext", + "ftm_fix", "ftm_cnt_clk_en"; + clocks = <&clockgen 4 1>, <&clockgen 4 1>, + <&rtc_clk>, <&clockgen 4 1>; + status = "disabled"; + }; + + pwm4: pwm@2840000 { + compatible = "fsl,vf610-ftm-pwm"; + #pwm-cells = <3>; + reg = <0x0 0x2840000 0x0 0x10000>; + clock-names = "ftm_sys", "ftm_ext", + "ftm_fix", "ftm_cnt_clk_en"; + clocks = <&clockgen 4 1>, <&clockgen 4 1>, + <&rtc_clk>, <&clockgen 4 1>; + status = "disabled"; + }; + + pwm5: pwm@2850000 { + compatible = "fsl,vf610-ftm-pwm"; + #pwm-cells = <3>; + reg = <0x0 0x2850000 0x0 0x10000>; + clock-names = "ftm_sys", "ftm_ext", + "ftm_fix", "ftm_cnt_clk_en"; + clocks = <&clockgen 4 1>, <&clockgen 4 1>, + <&rtc_clk>, <&clockgen 4 1>; + status = "disabled"; + }; + + pwm6: pwm@2860000 { + compatible = "fsl,vf610-ftm-pwm"; + #pwm-cells = <3>; + reg = <0x0 0x2860000 0x0 0x10000>; + clock-names = "ftm_sys", "ftm_ext", + "ftm_fix", "ftm_cnt_clk_en"; + clocks = <&clockgen 4 1>, <&clockgen 4 1>, + <&rtc_clk>, <&clockgen 4 1>; + status = "disabled"; + }; + + pwm7: pwm@2870000 { + compatible = "fsl,vf610-ftm-pwm"; + #pwm-cells = <3>; + reg = <0x0 0x2870000 0x0 0x10000>; + clock-names = "ftm_sys", "ftm_ext", + "ftm_fix", "ftm_cnt_clk_en"; + clocks = <&clockgen 4 1>, <&clockgen 4 1>, + <&rtc_clk>, <&clockgen 4 1>; + status = "disabled"; + }; + rcpm: power-controller@1e34040 { compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+"; reg = <0x0 0x1e34040 0x0 0x1c>; @@ -1136,6 +1267,15 @@ reg = <0x0 0x2800000 0x0 0x10000>; fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + ftm_alarm1: timer@2810000 { + compatible = "fsl,ls1028a-ftm-alarm"; + reg = <0x0 0x2810000 0x0 0x10000>; + fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; }; }; @@ -1155,7 +1295,23 @@ port { dp0_out: endpoint { + remote-endpoint = <&dp1_out>; + }; + }; + }; + + hdptx0: display@f200000 { + compatible = "cdn,ls1028a-dp"; + reg = <0x0 0xf200000 0x0 0xfffff>; + interrupts = <0 221 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clockgen 2 2>, <&clockgen 2 2>, <&clockgen 2 2>, + <&clockgen 2 2>, <&clockgen 2 2>, <&dpclk>; + clock-names = "clk_core", "pclk", "sclk", + "cclk", "clk_vif", "clk_pxl"; + port { + dp1_out: endpoint { + remote-endpoint = <&dp0_out>; }; }; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts new file mode 100644 index 000000000000..43bafb51515e --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds-sdk.dts @@ -0,0 +1,263 @@ +/* + * Device Tree Include file for Freescale Layerscape-1043A family SoC. + * + * Copyright 2014-2015 Freescale Semiconductor, Inc. + * + * Mingkai Hu <Mingkai.hu@freescale.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPLv2 or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "fsl-ls1043a-qds.dts" +#include "qoriq-qman-portals-sdk.dtsi" +#include "qoriq-bman-portals-sdk.dtsi" + +&bman_fbpr { + compatible = "fsl,bman-fbpr"; + alloc-ranges = <0 0 0x10000 0>; +}; +&qman_fqd { + compatible = "fsl,qman-fqd"; + alloc-ranges = <0 0 0x10000 0>; +}; +&qman_pfdr { + compatible = "fsl,qman-pfdr"; + alloc-ranges = <0 0 0x10000 0>; +}; + +&soc { +/delete-property/ dma-coherent; + +#include "qoriq-dpaa-eth.dtsi" +#include "qoriq-fman3-0-6oh.dtsi" + +pcie@3400000 { + /delete-property/ iommu-map; + dma-coherent; +}; + +pcie@3500000 { + /delete-property/ iommu-map; + dma-coherent; +}; + +pcie@3600000 { + /delete-property/ iommu-map; + dma-coherent; +}; + +/delete-node/ iommu@9000000; +}; + +&fman0 { + compatible = "fsl,fman", "simple-bus"; + dma-coherent; +}; + +&clockgen { + dma-coherent; +}; + +&scfg { + dma-coherent; +}; + +&crypto { + dma-coherent; +}; + +&dcfg { + dma-coherent; +}; + +&ifc { + dma-coherent; +}; + +&qspi { + dma-coherent; +}; + +&esdhc { + dma-coherent; +}; + +&ddr { + dma-coherent; +}; + +&tmu { + dma-coherent; +}; + +&qman { + dma-coherent; +}; + +&bman { + dma-coherent; +}; + +&bportals { + dma-coherent; +}; + +&qportals { + dma-coherent; +}; + +&dspi0 { + dma-coherent; +}; + +&dspi1 { + dma-coherent; +}; + +&i2c0 { + dma-coherent; +}; + +&i2c1 { + dma-coherent; +}; + +&i2c2 { + dma-coherent; +}; + +&i2c3 { + dma-coherent; +}; + +&duart0 { + dma-coherent; +}; + +&duart1 { + dma-coherent; +}; + +&duart2 { + dma-coherent; +}; + +&duart3 { + dma-coherent; +}; + +&gpio1 { + dma-coherent; +}; + +&gpio2 { + dma-coherent; +}; + +&gpio3 { + dma-coherent; +}; + +&gpio4 { + dma-coherent; +}; + +&uqe { + dma-coherent; +}; + +&lpuart0 { + dma-coherent; +}; + +&lpuart1 { + dma-coherent; +}; + +&lpuart2 { + dma-coherent; +}; + +&lpuart3 { + dma-coherent; +}; + +&lpuart4 { + dma-coherent; +}; + +&lpuart5 { + dma-coherent; +}; + +&ftm_alarm0 { + dma-coherent; +}; + +&wdog0 { + dma-coherent; +}; + +&edma0 { + dma-coherent; +}; + +&qdma { + dma-coherent; +}; + +&msi1 { + dma-coherent; +}; + +&msi2 { + dma-coherent; +}; + +&msi3 { + dma-coherent; +}; + +&ptp_timer0 { + dma-coherent; +}; + +&fsldpaa { + dma-coherent; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts index fea167d222cf..24898f26abf8 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts @@ -3,7 +3,7 @@ * Device Tree Include file for Freescale Layerscape-1043A family SoC. * * Copyright 2014-2015 Freescale Semiconductor, Inc. - * Copyright 2018 NXP + * Copyright 2018-2019 NXP * * Mingkai Hu <Mingkai.hu@freescale.com> */ @@ -24,6 +24,22 @@ serial1 = &duart1; serial2 = &duart2; serial3 = &duart3; + sgmii-riser-s1-p1 = &sgmii_phy_s1_p1; + sgmii-riser-s2-p1 = &sgmii_phy_s2_p1; + sgmii-riser-s3-p1 = &sgmii_phy_s3_p1; + sgmii-riser-s4-p1 = &sgmii_phy_s4_p1; + qsgmii-s1-p1 = &qsgmii_phy_s1_p1; + qsgmii-s1-p2 = &qsgmii_phy_s1_p2; + qsgmii-s1-p3 = &qsgmii_phy_s1_p3; + qsgmii-s1-p4 = &qsgmii_phy_s1_p4; + qsgmii-s2-p1 = &qsgmii_phy_s2_p1; + qsgmii-s2-p2 = &qsgmii_phy_s2_p2; + qsgmii-s2-p3 = &qsgmii_phy_s2_p3; + qsgmii-s2-p4 = &qsgmii_phy_s2_p4; + emi1-slot1 = &ls1043mdio_s1; + emi1-slot2 = &ls1043mdio_s2; + emi1-slot3 = &ls1043mdio_s3; + emi1-slot4 = &ls1043mdio_s4; }; chosen { @@ -62,8 +78,11 @@ }; fpga: board-control@2,0 { - compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis"; + compatible = "fsl,ls1043aqds-fpga", "fsl,fpga-qixis", "simple-mfd"; reg = <0x2 0x0 0x0000100>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 2 0 0x100>; }; }; @@ -153,3 +172,153 @@ }; #include "fsl-ls1043-post.dtsi" + +&fman0 { + ethernet@e0000 { + phy-handle = <&qsgmii_phy_s2_p1>; + phy-connection-type = "sgmii"; + }; + + ethernet@e2000 { + phy-handle = <&qsgmii_phy_s2_p2>; + phy-connection-type = "sgmii"; + }; + + ethernet@e4000 { + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii"; + }; + + ethernet@e6000 { + phy-handle = <&rgmii_phy2>; + phy-connection-type = "rgmii"; + }; + + ethernet@e8000 { + phy-handle = <&qsgmii_phy_s2_p3>; + phy-connection-type = "sgmii"; + }; + + ethernet@ea000 { + phy-handle = <&qsgmii_phy_s2_p4>; + phy-connection-type = "sgmii"; + }; + + ethernet@f0000 { /* DTSEC9/10GEC1 */ + fixed-link = <1 1 10000 0 0>; + phy-connection-type = "xgmii"; + }; +}; + +&fpga { + mdio-mux-emi1 { + compatible = "mdio-mux-mmioreg", "mdio-mux"; + mdio-parent-bus = <&mdio0>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x54 1>; /* BRDCFG4 */ + mux-mask = <0xe0>; /* EMI1 */ + + /* On-board RGMII1 PHY */ + ls1043mdio0: mdio@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + rgmii_phy1: ethernet-phy@1 { /* MAC3 */ + reg = <0x1>; + }; + }; + + /* On-board RGMII2 PHY */ + ls1043mdio1: mdio@1 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + rgmii_phy2: ethernet-phy@2 { /* MAC4 */ + reg = <0x2>; + }; + }; + + /* Slot 1 */ + ls1043mdio_s1: mdio@2 { + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + qsgmii_phy_s1_p1: ethernet-phy@4 { + reg = <0x4>; + }; + + qsgmii_phy_s1_p2: ethernet-phy@5 { + reg = <0x5>; + }; + + qsgmii_phy_s1_p3: ethernet-phy@6 { + reg = <0x6>; + }; + + qsgmii_phy_s1_p4: ethernet-phy@7 { + reg = <0x7>; + }; + + sgmii_phy_s1_p1: ethernet-phy@1c { + reg = <0x1c>; + }; + }; + + /* Slot 2 */ + ls1043mdio_s2: mdio@3 { + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + qsgmii_phy_s2_p1: ethernet-phy@8 { + reg = <0x8>; + }; + + qsgmii_phy_s2_p2: ethernet-phy@9 { + reg = <0x9>; + }; + + qsgmii_phy_s2_p3: ethernet-phy@a { + reg = <0xa>; + }; + + qsgmii_phy_s2_p4: ethernet-phy@b { + reg = <0xb>; + }; + + sgmii_phy_s2_p1: ethernet-phy@1c { + reg = <0x1c>; + }; + }; + + /* Slot 3 */ + ls1043mdio_s3: mdio@4 { + reg = <0x80>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + sgmii_phy_s3_p1: ethernet-phy@1c { + reg = <0x1c>; + }; + }; + + /* Slot 4 */ + ls1043mdio_s4: mdio@5 { + reg = <0xa0>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + sgmii_phy_s4_p1: ethernet-phy@1c { + reg = <0x1c>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts new file mode 100644 index 000000000000..210bc9f25c47 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-sdk.dts @@ -0,0 +1,262 @@ +/* + * Device Tree Include file for Freescale Layerscape-1043A family SoC. + * + * Copyright 2014-2015 Freescale Semiconductor, Inc. + * + * Mingkai Hu <Mingkai.hu@freescale.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPLv2 or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "fsl-ls1043a-rdb.dts" +#include "qoriq-qman-portals-sdk.dtsi" +#include "qoriq-bman-portals-sdk.dtsi" + +&bman_fbpr { + compatible = "fsl,bman-fbpr"; + alloc-ranges = <0 0 0x10000 0>; +}; +&qman_fqd { + compatible = "fsl,qman-fqd"; + alloc-ranges = <0 0 0x10000 0>; +}; +&qman_pfdr { + compatible = "fsl,qman-pfdr"; + alloc-ranges = <0 0 0x10000 0>; +}; + +&soc { +/delete-property/ dma-coherent; + +#include "qoriq-dpaa-eth.dtsi" +#include "qoriq-fman3-0-6oh.dtsi" + +pcie@3400000 { + /delete-property/ iommu-map; + dma-coherent; +}; + +pcie@3500000 { + /delete-property/ iommu-map; + dma-coherent; +}; + +pcie@3600000 { + /delete-property/ iommu-map; + dma-coherent; +}; + +/delete-node/ iommu@9000000; +}; + +&fman0 { + compatible = "fsl,fman", "simple-bus"; +}; + +&clockgen { + dma-coherent; +}; + +&scfg { + dma-coherent; +}; + +&crypto { + dma-coherent; +}; + +&dcfg { + dma-coherent; +}; + +&ifc { + dma-coherent; +}; + +&qspi { + dma-coherent; +}; + +&esdhc { + dma-coherent; +}; + +&ddr { + dma-coherent; +}; + +&tmu { + dma-coherent; +}; + +&qman { + dma-coherent; +}; + +&bman { + dma-coherent; +}; + +&bportals { + dma-coherent; +}; + +&qportals { + dma-coherent; +}; + +&dspi0 { + dma-coherent; +}; + +&dspi1 { + dma-coherent; +}; + +&i2c0 { + dma-coherent; +}; + +&i2c1 { + dma-coherent; +}; + +&i2c2 { + dma-coherent; +}; + +&i2c3 { + dma-coherent; +}; + +&duart0 { + dma-coherent; +}; + +&duart1 { + dma-coherent; +}; + +&duart2 { + dma-coherent; +}; + +&duart3 { + dma-coherent; +}; + +&gpio1 { + dma-coherent; +}; + +&gpio2 { + dma-coherent; +}; + +&gpio3 { + dma-coherent; +}; + +&gpio4 { + dma-coherent; +}; + +&lpuart0 { + dma-coherent; +}; + +&lpuart1 { + dma-coherent; +}; + +&lpuart2 { + dma-coherent; +}; + +&lpuart3 { + dma-coherent; +}; + +&lpuart4 { + dma-coherent; +}; + +&lpuart5 { + dma-coherent; +}; + +&ftm_alarm0 { + dma-coherent; +}; + +&wdog0 { + dma-coherent; +}; + +&edma0 { + dma-coherent; +}; + +&qdma { + dma-coherent; +}; + +&msi1 { + dma-coherent; +}; + +&msi2 { + dma-coherent; +}; + +&msi3 { + dma-coherent; +}; + +&fman0 { + dma-coherent; +}; + +&ptp_timer0 { + dma-coherent; +}; + +&fsldpaa { + dma-coherent; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts new file mode 100644 index 000000000000..7beb9985add2 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb-usdpaa.dts @@ -0,0 +1,140 @@ +/* + * Device Tree Include file for Freescale Layerscape-1043A family SoC. + * + * Copyright (C) 2014-2015, Freescale Semiconductor + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include "fsl-ls1043a-rdb-sdk.dts" + +&soc { + bp7: buffer-pool@7 { + compatible = "fsl,p4080-bpool", "fsl,bpool"; + fsl,bpid = <7>; + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>; + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; + dma-coherent; + }; + + bp8: buffer-pool@8 { + compatible = "fsl,p4080-bpool", "fsl,bpool"; + fsl,bpid = <8>; + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + dma-coherent; + }; + + bp9: buffer-pool@9 { + compatible = "fsl,p4080-bpool", "fsl,bpool"; + fsl,bpid = <9>; + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + dma-coherent; + }; + + fsl,dpaa { + compatible = "fsl,ls1043a", "fsl,dpaa", "simple-bus"; + dma-coherent; + + ethernet@0 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>; + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>; + }; + + ethernet@1 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>; + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>; + }; + + ethernet@2 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>; + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>; + }; + + ethernet@3 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>; + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>; + }; + + ethernet@4 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>; + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>; + }; + + ethernet@5 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x60 1 0x61 1>; + fsl,qman-frame-queues-tx = <0x80 1 0x81 1>; + }; + + ethernet@8 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>; + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>; + + }; + dpa-fman0-oh@2 { + compatible = "fsl,dpa-oh"; + /* Define frame queues for the OH port*/ + /* <OH Rx error, OH Rx default> */ + fsl,qman-frame-queues-oh = <0x5a 1 0x5b 1>; + fsl,fman-oh-port = <&fman0_oh2>; + }; + }; + + pcie@3400000 { + /delete-property/ iommu-map; + }; + + pcie@3500000 { + /delete-property/ iommu-map; + }; + + pcie@3600000 { + /delete-property/ iommu-map; + }; + + /delete-node/ iommu@9000000; +}; +/ { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* For legacy usdpaa based use-cases, update the size and + alignment parameters. e.g. to allocate 256 MB memory: + size = <0 0x10000000>; + alignment = <0 0x10000000>; + */ + usdpaa_mem: usdpaa_mem { + compatible = "fsl,usdpaa-mem"; + alloc-ranges = <0 0 0x10000 0>; + size = <0 0x1000>; + alignment = <0 0x1000>; + }; + }; +}; + +&fman0 { + fman0_oh2: port@83000 { + cell-index = <1>; + compatible = "fsl,fman-port-oh"; + reg = <0x83000 0x1000>; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts index 3516af4726a5..91917fcb21a1 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts @@ -38,6 +38,10 @@ compatible = "adi,adt7461"; reg = <0x4c>; }; + rtc@51 { + compatible = "nxp,pcf85263"; + reg = <0x51>; + }; eeprom@52 { compatible = "atmel,24c512"; reg = <0x52>; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index 01b01e320411..8288d735bd4e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -300,6 +300,8 @@ #address-cells = <2>; #size-cells = <2>; ranges; + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>; + dma-coherent; clockgen: clocking@1ee1000 { compatible = "fsl,ls1043a-clockgen"; @@ -308,6 +310,49 @@ clocks = <&sysclk>; }; + smmu: iommu@9000000 { + compatible = "arm,mmu-500"; + reg = <0 0x9000000 0 0x400000>; + dma-coherent; + stream-match-mask = <0x7f00>; + #global-interrupts = <2>; + #iommu-cells = <1>; + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>; + }; + scfg: scfg@1570000 { compatible = "fsl,ls1043a-scfg", "syscon"; reg = <0x0 0x1570000 0x0 0x10000>; @@ -385,12 +430,12 @@ dcfg: dcfg@1ee0000 { compatible = "fsl,ls1043a-dcfg", "syscon"; - reg = <0x0 0x1ee0000 0x0 0x10000>; + reg = <0x0 0x1ee0000 0x0 0x1000>; big-endian; }; - ifc: ifc@1530000 { - compatible = "fsl,ifc", "simple-bus"; + ifc: memory-controller@1530000 { + compatible = "fsl,ifc"; reg = <0x0 0x1530000 0x0 0x10000>; interrupts = <0 43 0x4>; }; @@ -528,7 +573,7 @@ }; i2c0: i2c@2180000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,vf610-i2c", "fsl,ls1043a-vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; @@ -539,6 +584,7 @@ dmas = <&edma0 1 39>, <&edma0 1 38>; dma-names = "tx", "rx"; + scl-gpios = <&gpio4 12 0>; status = "disabled"; }; @@ -802,48 +848,65 @@ QORIQ_CLK_PLL_DIV(1)>; }; - usb0: usb@2f00000 { - compatible = "snps,dwc3"; - reg = <0x0 0x2f00000 0x0 0x10000>; - interrupts = <0 60 0x4>; - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - status = "disabled"; - }; + aux_bus: aux_bus { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>; + + usb0: usb@2f00000 { + compatible = "fsl,ls1043a-dwc3", "snps,dwc3"; + reg = <0x0 0x2f00000 0x0 0x10000>; + interrupts = <0 60 0x4>; + dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + usb3-lpm-capable; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + snps,host-vbus-glitches; + dma-coherent; + status = "disabled"; + }; - usb1: usb@3000000 { - compatible = "snps,dwc3"; - reg = <0x0 0x3000000 0x0 0x10000>; - interrupts = <0 61 0x4>; - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - status = "disabled"; - }; + usb1: usb@3000000 { + compatible = "fsl,ls1043a-dwc3", "snps,dwc3"; + reg = <0x0 0x3000000 0x0 0x10000>; + interrupts = <0 61 0x4>; + dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + usb3-lpm-capable; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + snps,host-vbus-glitches; + dma-coherent; + status = "disabled"; + }; - usb2: usb@3100000 { - compatible = "snps,dwc3"; - reg = <0x0 0x3100000 0x0 0x10000>; - interrupts = <0 63 0x4>; - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - status = "disabled"; - }; + usb2: usb@3100000 { + compatible = "fsl,ls1043a-dwc3", "snps,dwc3"; + reg = <0x0 0x3100000 0x0 0x10000>; + interrupts = <0 63 0x4>; + dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + usb3-lpm-capable; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + snps,host-vbus-glitches; + dma-coherent; + status = "disabled"; + }; - sata: sata@3200000 { - compatible = "fsl,ls1043a-ahci"; - reg = <0x0 0x3200000 0x0 0x10000>, - <0x0 0x20140520 0x0 0x4>; - reg-names = "ahci", "sata-ecc"; - interrupts = <0 69 0x4>; - clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(1)>; - dma-coherent; + sata: sata@3200000 { + compatible = "fsl,ls1043a-ahci"; + reg = <0x0 0x3200000 0x0 0x10000>, + <0x0 0x20140520 0x0 0x4>; + reg-names = "ahci", "sata-ecc"; + interrupts = <0 69 0x4>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(1)>; + dma-coherent; + }; }; msi1: msi-controller1@1571000 { @@ -872,13 +935,13 @@ reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */ <0x40 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <0 118 0x4>, /* controller interrupt */ - <0 117 0x4>; /* PME interrupt */ - interrupt-names = "intr", "pme"; + interrupts = <0 117 0x4>, + <0 118 0x4>; + interrupt-names = "pme", "aer"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; - dma-coherent; + iommu-map = <0 &smmu 0 1>; /* update by bootloader */ num-viewport = <6>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ @@ -890,6 +953,8 @@ <0000 0 0 2 &gic 0 111 0x4>, <0000 0 0 3 &gic 0 112 0x4>, <0000 0 0 4 &gic 0 113 0x4>; + fsl,pcie-scfg = <&scfg 0>; + big-endian; status = "disabled"; }; @@ -898,13 +963,13 @@ reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */ <0x48 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <0 128 0x4>, - <0 127 0x4>; - interrupt-names = "intr", "pme"; + interrupts = <0 127 0x4>, + <0 128 0x4>; + interrupt-names = "pme", "aer"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; - dma-coherent; + iommu-map = <0 &smmu 0 1>; /* update by bootloader */ num-viewport = <6>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ @@ -916,6 +981,8 @@ <0000 0 0 2 &gic 0 121 0x4>, <0000 0 0 3 &gic 0 122 0x4>, <0000 0 0 4 &gic 0 123 0x4>; + fsl,pcie-scfg = <&scfg 1>; + big-endian; status = "disabled"; }; @@ -924,13 +991,13 @@ reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */ <0x50 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <0 162 0x4>, - <0 161 0x4>; - interrupt-names = "intr", "pme"; + interrupts = <0 161 0x4>, + <0 162 0x4>; + interrupt-names = "pme", "aer"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; - dma-coherent; + iommu-map = <0 &smmu 0 1>; /* update by bootloader */ num-viewport = <6>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */ @@ -942,6 +1009,8 @@ <0000 0 0 2 &gic 0 155 0x4>, <0000 0 0 3 &gic 0 156 0x4>, <0000 0 0 4 &gic 0 157 0x4>; + fsl,pcie-scfg = <&scfg 2>; + big-endian; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts new file mode 100644 index 000000000000..8c0e8aaddc2f --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-sdk.dts @@ -0,0 +1,241 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Freescale Layerscape-1046A family SoC. + * + * Copyright 2019 NXP. + * + */ + +#include "fsl-ls1046a-frwy.dts" +#include "qoriq-qman-portals-sdk.dtsi" +#include "qoriq-bman-portals-sdk.dtsi" + +&bman_fbpr { + compatible = "fsl,bman-fbpr"; + alloc-ranges = <0 0 0x10000 0>; +}; +&qman_fqd { + compatible = "fsl,qman-fqd"; + alloc-ranges = <0 0 0x10000 0>; +}; +&qman_pfdr { + compatible = "fsl,qman-pfdr"; + alloc-ranges = <0 0 0x10000 0>; +}; + +&soc { +/delete-property/ dma-coherent; + +#include "qoriq-dpaa-eth.dtsi" +#include "qoriq-fman3-0-6oh.dtsi" + + pcie@3400000 { + /delete-property/ iommu-map; + }; + + pcie@3500000 { + /delete-property/ iommu-map; + }; + + pcie@3600000 { + /delete-property/ iommu-map; + }; + + /delete-node/ iommu@9000000; +}; + +&fsldpaa { + ethernet@1 { + status = "disabled"; + }; + ethernet@2 { + status = "disabled"; + }; + ethernet@3 { + status = "disabled"; + }; + ethernet@6 { + status = "disabled"; + }; + ethernet@9 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet7>; + dma-coherent; + }; +}; + +&fman0 { + compatible = "fsl,fman", "simple-bus"; +}; + +&clockgen { + dma-coherent; +}; + +&scfg { + dma-coherent; +}; + +&crypto { + dma-coherent; +}; + +&dcfg { + dma-coherent; +}; + +&ifc { + dma-coherent; +}; + +&qspi { + dma-coherent; +}; + +&esdhc { + dma-coherent; +}; + +&ddr { + dma-coherent; +}; + +&tmu { + dma-coherent; +}; + +&qman { + dma-coherent; +}; + +&bman { + dma-coherent; +}; + +&bportals { + dma-coherent; +}; + +&qportals { + dma-coherent; +}; + +&dspi { + dma-coherent; +}; + +&i2c0 { + dma-coherent; +}; + +&i2c1 { + dma-coherent; +}; + +&i2c2 { + dma-coherent; +}; + +&i2c3 { + dma-coherent; +}; + +&duart0 { + dma-coherent; +}; + +&duart1 { + dma-coherent; +}; + +&duart2 { + dma-coherent; +}; + +&duart3 { + dma-coherent; +}; + +&gpio0 { + dma-coherent; +}; + +&gpio1 { + dma-coherent; +}; + +&gpio2 { + dma-coherent; +}; + +&gpio3 { + dma-coherent; +}; + +&lpuart0 { + dma-coherent; +}; + +&lpuart1 { + dma-coherent; +}; + +&lpuart2 { + dma-coherent; +}; + +&lpuart3 { + dma-coherent; +}; + +&lpuart4 { + dma-coherent; +}; + +&lpuart5 { + dma-coherent; +}; + +&ftm_alarm0 { + dma-coherent; +}; + +&wdog0 { + dma-coherent; +}; + +&edma0 { + dma-coherent; +}; + +&sata { + dma-coherent; +}; + +&qdma { + dma-coherent; +}; + +&msi1 { + dma-coherent; +}; + +&msi2 { + dma-coherent; +}; + +&msi3 { + dma-coherent; +}; + +&fman0 { + dma-coherent; +}; + +&ptp_timer0 { + dma-coherent; +}; + +&fsldpaa { + dma-coherent; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts new file mode 100644 index 000000000000..bd4f884eb945 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-frwy-usdpaa.dts @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree Include file for Freescale Layerscape-1046A family SoC. + * + * Copyright 2019 NXP. + * + */ + +#include "fsl-ls1046a-frwy-sdk.dts" + +&soc { + bp7: buffer-pool@7 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <7>; + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>; + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; + dma-coherent; + }; + + bp8: buffer-pool@8 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <8>; + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + dma-coherent; + }; + + bp9: buffer-pool@9 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <9>; + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + dma-coherent; + }; + + fsl,dpaa { + compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus"; + dma-coherent; + + ethernet@0 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x50 1 0x51 1>; + fsl,qman-frame-queues-tx = <0x70 1 0x71 1>; + }; + + ethernet@4 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x52 1 0x53 1>; + fsl,qman-frame-queues-tx = <0x72 1 0x73 1>; + }; + + ethernet@5 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>; + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>; + }; + + ethernet@9 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>; + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>; + }; + + dpa-fman0-oh@2 { + compatible = "fsl,dpa-oh"; + /* Define frame queues for the OH port*/ + /* <OH Rx error, OH Rx default> */ + fsl,qman-frame-queues-oh = <0x60 1 0x61 1>; + fsl,fman-oh-port = <&fman0_oh2>; + }; + }; + + pcie@3400000 { + /delete-property/ iommu-map; + }; + + pcie@3500000 { + /delete-property/ iommu-map; + }; + + pcie@3600000 { + /delete-property/ iommu-map; + }; + + /delete-node/ iommu@9000000; +}; +/ { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + /* For legacy usdpaa based use-cases, update the size and + alignment parameters. e.g. to allocate 256 MB memory: + size = <0 0x10000000>; + alignment = <0 0x10000000>; + */ + + usdpaa_mem: usdpaa_mem { + compatible = "fsl,usdpaa-mem"; + alloc-ranges = <0 0 0x10000 0>; + size = <0 0x1000>; + alignment = <0 0x1000>; + }; + }; +}; + +&fman0 { + fman0_oh2: port@83000 { + cell-index = <1>; + compatible = "fsl,fman-port-oh"; + reg = <0x83000 0x1000>; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts new file mode 100644 index 000000000000..d5de7ea92c5b --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds-sdk.dts @@ -0,0 +1,264 @@ +/* + * Device Tree Include file for Freescale Layerscape-1046A family SoC. + * + * Copyright 2014-2015 Freescale Semiconductor, Inc. + * + * Mingkai Hu <Mingkai.hu@freescale.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPLv2 or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "fsl-ls1046a-qds.dts" +#include "qoriq-qman-portals-sdk.dtsi" +#include "qoriq-bman-portals-sdk.dtsi" + +&bman_fbpr { + compatible = "fsl,bman-fbpr"; + alloc-ranges = <0 0 0x10000 0>; +}; +&qman_fqd { + compatible = "fsl,qman-fqd"; + alloc-ranges = <0 0 0x10000 0>; +}; +&qman_pfdr { + compatible = "fsl,qman-pfdr"; + alloc-ranges = <0 0 0x10000 0>; +}; + +&soc { +/delete-property/ dma-coherent; + +#include "qoriq-dpaa-eth.dtsi" +#include "qoriq-fman3-0-6oh.dtsi" + +pcie@3400000 { + /delete-property/ iommu-map; +}; + +pcie@3500000 { + /delete-property/ iommu-map; +}; + +pcie@3600000 { + /delete-property/ iommu-map; +}; + +/delete-node/ iommu@9000000; +}; + +&fsldpaa { + ethernet@9 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet7>; + dma-coherent; + }; +}; + +&fman0 { + compatible = "fsl,fman", "simple-bus"; + dma-coherent; +}; + +&clockgen { + dma-coherent; +}; + +&scfg { + dma-coherent; +}; + +&crypto { + dma-coherent; +}; + +&dcfg { + dma-coherent; +}; + +&ifc { + dma-coherent; +}; + +&qspi { + dma-coherent; +}; + +&esdhc { + dma-coherent; +}; + +&ddr { + dma-coherent; +}; + +&tmu { + dma-coherent; +}; + +&qman { + dma-coherent; +}; + +&bman { + dma-coherent; +}; + +&bportals { + dma-coherent; +}; + +&qportals { + dma-coherent; +}; + +&dspi { + dma-coherent; +}; + +&i2c0 { + dma-coherent; +}; + +&i2c1 { + dma-coherent; +}; + +&i2c2 { + dma-coherent; +}; + +&i2c3 { + dma-coherent; +}; + +&duart0 { + dma-coherent; +}; + +&duart1 { + dma-coherent; +}; + +&duart2 { + dma-coherent; +}; + +&duart3 { + dma-coherent; +}; + +&gpio0 { + dma-coherent; +}; + +&gpio1 { + dma-coherent; +}; + +&gpio2 { + dma-coherent; +}; + +&gpio3 { + dma-coherent; +}; + +&lpuart0 { + dma-coherent; +}; + +&lpuart1 { + dma-coherent; +}; + +&lpuart2 { + dma-coherent; +}; + +&lpuart3 { + dma-coherent; +}; + +&lpuart4 { + dma-coherent; +}; + +&lpuart5 { + dma-coherent; +}; + +&ftm_alarm0 { + dma-coherent; +}; + +&wdog0 { + dma-coherent; +}; + +&edma0 { + dma-coherent; +}; + +&sata { + dma-coherent; +}; + +&qdma { + dma-coherent; +}; + +&msi1 { + dma-coherent; +}; + +&msi2 { + dma-coherent; +}; + +&msi3 { + dma-coherent; +}; + +&ptp_timer0 { + dma-coherent; +}; + +&fsldpaa { + dma-coherent; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts index eec62c63dafe..a9089966a5bb 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts @@ -3,7 +3,7 @@ * Device Tree Include file for Freescale Layerscape-1046A family SoC. * * Copyright 2016 Freescale Semiconductor, Inc. - * Copyright 2018 NXP + * Copyright 2018-2019 NXP * * Shaohui Xie <Shaohui.Xie@nxp.com> */ @@ -25,6 +25,20 @@ serial1 = &duart1; serial2 = &duart2; serial3 = &duart3; + + emi1-slot1 = &ls1046mdio_s1; + emi1-slot2 = &ls1046mdio_s2; + emi1-slot4 = &ls1046mdio_s4; + + sgmii-s1-p1 = &sgmii_phy_s1_p1; + sgmii-s1-p2 = &sgmii_phy_s1_p2; + sgmii-s1-p3 = &sgmii_phy_s1_p3; + sgmii-s1-p4 = &sgmii_phy_s1_p4; + sgmii-s4-p1 = &sgmii_phy_s4_p1; + qsgmii-s2-p1 = &qsgmii_phy_s2_p1; + qsgmii-s2-p2 = &qsgmii_phy_s2_p2; + qsgmii-s2-p3 = &qsgmii_phy_s2_p3; + qsgmii-s2-p4 = &qsgmii_phy_s2_p4; }; chosen { @@ -153,8 +167,9 @@ }; fpga: board-control@2,0 { - compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis"; + compatible = "fsl,ls1046aqds-fpga", "fsl,fpga-qixis", "simple-mfd"; reg = <0x2 0x0 0x0000100>; + ranges = <0 2 0 0x100>; }; }; @@ -169,7 +184,7 @@ compatible = "spansion,m25p80"; #address-cells = <1>; #size-cells = <1>; - spi-max-frequency = <20000000>; + spi-max-frequency = <50000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <4>; reg = <0>; @@ -177,3 +192,140 @@ }; #include "fsl-ls1046-post.dtsi" + +&fman0 { + ethernet@e0000 { + phy-handle = <&qsgmii_phy_s2_p1>; + phy-connection-type = "sgmii"; + }; + + ethernet@e2000 { + phy-handle = <&sgmii_phy_s4_p1>; + phy-connection-type = "sgmii"; + }; + + ethernet@e4000 { + phy-handle = <&rgmii_phy1>; + phy-connection-type = "rgmii"; + }; + + ethernet@e6000 { + phy-handle = <&rgmii_phy2>; + phy-connection-type = "rgmii"; + }; + + ethernet@e8000 { + phy-handle = <&sgmii_phy_s1_p3>; + phy-connection-type = "sgmii"; + }; + + ethernet@ea000 { + phy-handle = <&sgmii_phy_s1_p4>; + phy-connection-type = "sgmii"; + }; + + ethernet@f0000 { /* DTSEC9/10GEC1 */ + phy-handle = <&sgmii_phy_s1_p1>; + phy-connection-type = "xgmii"; + }; + + ethernet@f2000 { /* DTSEC10/10GEC2 */ + phy-handle = <&sgmii_phy_s1_p2>; + phy-connection-type = "xgmii"; + }; +}; + +&fpga { + #address-cells = <1>; + #size-cells = <1>; + mdio-mux-emi1 { + compatible = "mdio-mux-mmioreg", "mdio-mux"; + mdio-parent-bus = <&mdio0>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x54 1>; /* BRDCFG4 */ + mux-mask = <0xe0>; /* EMI1 */ + + /* On-board RGMII1 PHY */ + ls1046mdio0: mdio@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + rgmii_phy1: ethernet-phy@1 { /* MAC3 */ + reg = <0x1>; + }; + }; + + /* On-board RGMII2 PHY */ + ls1046mdio1: mdio@1 { + reg = <0x20>; + #address-cells = <1>; + #size-cells = <0>; + + rgmii_phy2: ethernet-phy@2 { /* MAC4 */ + reg = <0x2>; + }; + }; + + /* Slot 1 */ + ls1046mdio_s1: mdio@2 { + reg = <0x40>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + sgmii_phy_s1_p1: ethernet-phy@1c { + reg = <0x1c>; + }; + + sgmii_phy_s1_p2: ethernet-phy@1d { + reg = <0x1d>; + }; + + sgmii_phy_s1_p3: ethernet-phy@1e { + reg = <0x1e>; + }; + + sgmii_phy_s1_p4: ethernet-phy@1f { + reg = <0x1f>; + }; + }; + + /* Slot 2 */ + ls1046mdio_s2: mdio@3 { + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + qsgmii_phy_s2_p1: ethernet-phy@8 { + reg = <0x8>; + }; + + qsgmii_phy_s2_p2: ethernet-phy@9 { + reg = <0x9>; + }; + + qsgmii_phy_s2_p3: ethernet-phy@a { + reg = <0xa>; + }; + + qsgmii_phy_s2_p4: ethernet-phy@b { + reg = <0xb>; + }; + }; + + /* Slot 4 */ + ls1046mdio_s4: mdio@5 { + reg = <0x80>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + + sgmii_phy_s4_p1: ethernet-phy@1c { + reg = <0x1c>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts new file mode 100644 index 000000000000..d9ae081b4f3b --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-sdk.dts @@ -0,0 +1,273 @@ +/* + * Device Tree Include file for Freescale Layerscape-1046A family SoC. + * + * Copyright 2014-2015 Freescale Semiconductor, Inc. + * + * Mingkai Hu <Mingkai.hu@freescale.com> + * + * This file is dual-licensed: you can use it either under the terms + * of the GPLv2 or the X11 license, at your option. Note that this dual + * licensing only applies to this file, and not this project as a + * whole. + * + * a) This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of the + * License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * Or, alternatively, + * + * b) Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, + * copy, modify, merge, publish, distribute, sublicense, and/or + * sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following + * conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR + * OTHER DEALINGS IN THE SOFTWARE. + */ + +#include "fsl-ls1046a-rdb.dts" +#include "qoriq-qman-portals-sdk.dtsi" +#include "qoriq-bman-portals-sdk.dtsi" + +&bman_fbpr { + compatible = "fsl,bman-fbpr"; + alloc-ranges = <0 0 0x10000 0>; +}; +&qman_fqd { + compatible = "fsl,qman-fqd"; + alloc-ranges = <0 0 0x10000 0>; +}; +&qman_pfdr { + compatible = "fsl,qman-pfdr"; + alloc-ranges = <0 0 0x10000 0>; +}; + +&soc { +/delete-property/ dma-coherent; + +#include "qoriq-dpaa-eth.dtsi" +#include "qoriq-fman3-0-6oh.dtsi" + +pcie@3400000 { + /delete-property/ iommu-map; +}; + +pcie@3500000 { + /delete-property/ iommu-map; +}; + +pcie@3600000 { + /delete-property/ iommu-map; +}; + +/delete-node/ iommu@9000000; +}; + +&fsldpaa { + ethernet@0 { + status = "disabled"; + }; + ethernet@1 { + status = "disabled"; + }; + ethernet@9 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet7>; + dma-coherent; + }; +}; + +&fman0 { + compatible = "fsl,fman", "simple-bus"; +}; + +&clockgen { + dma-coherent; +}; + +&scfg { + dma-coherent; +}; + +&crypto { + dma-coherent; +}; + +&dcfg { + dma-coherent; +}; + +&ifc { + dma-coherent; +}; + +&qspi { + dma-coherent; +}; + +&esdhc { + dma-coherent; +}; + +&ddr { + dma-coherent; +}; + +&tmu { + dma-coherent; +}; + +&qman { + dma-coherent; +}; + +&bman { + dma-coherent; +}; + +&bportals { + dma-coherent; +}; + +&qportals { + dma-coherent; +}; + +&dspi { + dma-coherent; +}; + +&i2c0 { + dma-coherent; +}; + +&i2c1 { + dma-coherent; +}; + +&i2c2 { + dma-coherent; +}; + +&i2c3 { + dma-coherent; +}; + +&duart0 { + dma-coherent; +}; + +&duart1 { + dma-coherent; +}; + +&duart2 { + dma-coherent; +}; + +&duart3 { + dma-coherent; +}; + +&gpio0 { + dma-coherent; +}; + +&gpio1 { + dma-coherent; +}; + +&gpio2 { + dma-coherent; +}; + +&gpio3 { + dma-coherent; +}; + +&lpuart0 { + dma-coherent; +}; + +&lpuart1 { + dma-coherent; +}; + +&lpuart2 { + dma-coherent; +}; + +&lpuart3 { + dma-coherent; +}; + +&lpuart4 { + dma-coherent; +}; + +&lpuart5 { + dma-coherent; +}; + +&ftm_alarm0 { + dma-coherent; +}; + +&wdog0 { + dma-coherent; +}; + +&edma0 { + dma-coherent; +}; + +&sata { + dma-coherent; +}; + +&qdma { + dma-coherent; +}; + +&msi1 { + dma-coherent; +}; + +&msi2 { + dma-coherent; +}; + +&msi3 { + dma-coherent; +}; + +&fman0 { + dma-coherent; +}; + +&ptp_timer0 { + dma-coherent; +}; + +&fsldpaa { + dma-coherent; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-shared-mac9-only.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-shared-mac9-only.dts new file mode 100644 index 000000000000..7f29a2b84916 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-shared-mac9-only.dts @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2019-2021 NXP + * Device Tree file to support Shared Mac interface for 1046A family SoC. + * This file is for MAC9 as shared and rest of the interfaces are assigned to Linux Kernel only + */ + +#include "fsl-ls1046a-rdb-sdk.dts" + +&bportals { + bman-bpids@0 { + compatible = "fsl,bpid-range"; + fsl,bpid-range = <16 48>; + }; +}; + +&soc { + chosen { + name = "chosen"; + dpaa-extended-args { + fman0-extd-args { + + cell-index = <0>; + compatible = "fsl,fman-extended-args"; + dma-aid-mode = "port"; + + fman0_rxt0-extd-args { + cell-index = <0>; + compatible = "fsl,fman-port-10g-rx-extended-args"; + /* Define Virtual storage profile */ + /* <number of profiles, default profile id> */ + vsp-window = <2 0>; + }; + }; + }; + }; + + bp7: buffer-pool@7 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <7>; + fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0xdeadbeef>; + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; + dma-coherent; + }; + + bp8: buffer-pool@8 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <8>; + fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0xabbaf00d>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + dma-coherent; + }; + + bp9: buffer-pool@9 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <9>; + fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0xfeedabba>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + dma-coherent; + }; + + fsl,dpaa { + compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus"; + dma-coherent; + + ethernet@8 { + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1 0x8a 1>; + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1 0x84 1>; + }; + + + dpa-fman0-oh@2 { + compatible = "fsl,dpa-oh"; + /* Define frame queues for the OH port*/ + /* <OH Rx error, OH Rx default> */ + fsl,qman-frame-queues-oh = <0x60 1 0x61 1>; + fsl,fman-oh-port = <&fman0_oh2>; + }; + }; +}; +/ { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* For legacy usdpaa based use-cases, update the size and + alignment parameters. e.g. to allocate 256 MB memory: + size = <0 0x10000000>; + alignment = <0 0x10000000>; + */ + usdpaa_mem: usdpaa_mem { + compatible = "fsl,usdpaa-mem"; + alloc-ranges = <0 0 0x10000 0>; + size = <0 0x1000>; + alignment = <0 0x1000>; + }; + }; +}; + +&fman0 { + fman0_oh2: port@83000 { + cell-index = <1>; + compatible = "fsl,fman-port-oh"; + reg = <0x83000 0x1000>; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa-shared-mac10.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa-shared-mac10.dts new file mode 100644 index 000000000000..bfb48d038cd2 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa-shared-mac10.dts @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2019-2021 NXP + * Device Tree file to support Shared Mac interface for 1046A family SoC. + * This file is for MAC10 as shared and rest of the interfaces are for Userspace-DPDK + */ + +#include "fsl-ls1046a-rdb-sdk.dts" + +&bportals { + bman-bpids@0 { + compatible = "fsl,bpid-range"; + fsl,bpid-range = <16 48>; + }; +}; + +&soc { + chosen { + name = "chosen"; + dpaa-extended-args { + fman0-extd-args { + + cell-index = <0>; + compatible = "fsl,fman-extended-args"; + dma-aid-mode = "port"; + + fman0_rxt1-extd-args { + cell-index = <1>; + compatible = "fsl,fman-port-10g-rx-extended-args"; + /* Define Virtual storage profile */ + /* <number of profiles, default profile id> */ + vsp-window = <2 0>; + }; + }; + }; + }; + + bp7: buffer-pool@7 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <7>; + fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0xdeadbeef>; + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; + dma-coherent; + }; + + bp8: buffer-pool@8 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <8>; + fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0xabbaf00d>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + dma-coherent; + }; + + bp9: buffer-pool@9 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <9>; + fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0xfeedabba>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + dma-coherent; + }; + + fsl,dpaa { + compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus"; + dma-coherent; + + ethernet@2 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>; + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>; + }; + + ethernet@3 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>; + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>; + }; + + ethernet@4 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>; + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>; + }; + + ethernet@5 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x5a 1 0x5b 1>; + fsl,qman-frame-queues-tx = <0x7a 1 0x7b 1>; + }; + + ethernet@8 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>; + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>; + }; + + ethernet@9 { + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x5e 1 0x5f 1 0x8b 1>; + fsl,qman-frame-queues-tx = <0x7e 1 0x7f 1 0x85 1>; + }; + + dpa-fman0-oh@2 { + compatible = "fsl,dpa-oh"; + /* Define frame queues for the OH port*/ + /* <OH Rx error, OH Rx default> */ + fsl,qman-frame-queues-oh = <0x60 1 0x61 1>; + fsl,fman-oh-port = <&fman0_oh2>; + }; + }; +}; +/ { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* For legacy usdpaa based use-cases, update the size and + alignment parameters. e.g. to allocate 256 MB memory: + size = <0 0x10000000>; + alignment = <0 0x10000000>; + */ + usdpaa_mem: usdpaa_mem { + compatible = "fsl,usdpaa-mem"; + alloc-ranges = <0 0 0x10000 0>; + size = <0 0x1000>; + alignment = <0 0x1000>; + }; + }; +}; + +&fman0 { + fman0_oh2: port@83000 { + cell-index = <1>; + compatible = "fsl,fman-port-oh"; + reg = <0x83000 0x1000>; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa-shared.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa-shared.dts new file mode 100644 index 000000000000..be9662553cc1 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa-shared.dts @@ -0,0 +1,189 @@ +/* + * Device Tree file to support Shared Mac interface for 1046A family SoC. + * + * Copyright 2019-2021 NXP + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include "fsl-ls1046a-rdb-sdk.dts" + +&bportals { + bman-bpids@0 { + compatible = "fsl,bpid-range"; + fsl,bpid-range = <16 48>; + }; +}; + +&soc { + bp7: buffer-pool@7 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <7>; + fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0xdeadbeef>; + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; + dma-coherent; + }; + + bp8: buffer-pool@8 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <8>; + fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0xabbaf00d>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + dma-coherent; + }; + + bp9: buffer-pool@9 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <9>; + fsl,bpool-ethernet-cfg = <0 16 0 1728 0 0xfeedabba>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + dma-coherent; + }; + + fsl,dpaa { + compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus"; + dma-coherent; + + ethernet@2 { + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x54 1 0x55 1 0x86 1>; + fsl,qman-frame-queues-tx = <0x74 1 0x75 1 0x80 1>; + }; + + ethernet@3 { + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x56 1 0x57 1 0x87 1>; + fsl,qman-frame-queues-tx = <0x76 1 0x77 1 0x81 1>; + }; + + ethernet@4 { + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x58 1 0x59 1 0x88 1>; + fsl,qman-frame-queues-tx = <0x78 1 0x79 1 0x82 1>; + }; + + ethernet@5 { + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x5a 1 0x5b 1 0x89 1>; + fsl,qman-frame-queues-tx = <0x7a 1 0x7b 1 0x83 1>; + }; + + ethernet@8 { + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1 0x8a 1>; + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1 0x84 1>; + }; + + ethernet@9 { + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x5e 1 0x5f 1 0x8b 1>; + fsl,qman-frame-queues-tx = <0x7e 1 0x7f 1 0x85 1>; + }; + + dpa-fman0-oh@2 { + compatible = "fsl,dpa-oh"; + /* Define frame queues for the OH port*/ + /* <OH Rx error, OH Rx default> */ + fsl,qman-frame-queues-oh = <0x60 1 0x61 1>; + fsl,fman-oh-port = <&fman0_oh2>; + }; + }; +}; +/ { + chosen { + name = "chosen"; + dpaa-extended-args { + fman0-extd-args { + + cell-index = <0>; + compatible = "fsl,fman-extended-args"; + dma-aid-mode = "port"; + + fman0_rx2-extd-args { + cell-index = <2>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + /* Define Virtual storage profile */ + /* <number of profiles, default profile id> */ + vsp-window = <2 0>; + }; + fman0_rx3-extd-args { + cell-index = <3>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + /* Define Virtual storage profile */ + /* <number of profiles, default profile id> */ + vsp-window = <2 0>; + }; + fman0_rx4-extd-args { + cell-index = <4>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + /* Define Virtual storage profile */ + /* <number of profiles, default profile id> */ + vsp-window = <2 0>; + }; + fman0_rx5-extd-args { + cell-index = <5>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + /* Define Virtual storage profile */ + /* <number of profiles, default profile id> */ + vsp-window = <2 0>; + }; + fman0_rx6-extd-args { + cell-index = <6>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + /* Define Virtual storage profile */ + /* <number of profiles, default profile id> */ + vsp-window = <2 0>; + }; + fman0_rx7-extd-args { + cell-index = <7>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + /* Define Virtual storage profile */ + /* <number of profiles, default profile id> */ + vsp-window = <2 0>; + }; + fman0_rxt0-extd-args { + cell-index = <0>; + compatible = "fsl,fman-port-10g-rx-extended-args"; + /* Define Virtual storage profile */ + /* <number of profiles, default profile id> */ + vsp-window = <2 0>; + }; + fman0_rxt1-extd-args { + cell-index = <1>; + compatible = "fsl,fman-port-10g-rx-extended-args"; + /* Define Virtual storage profile */ + /* <number of profiles, default profile id> */ + vsp-window = <2 0>; + }; + }; + }; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* For legacy usdpaa based use-cases, update the size and + alignment parameters. e.g. to allocate 256 MB memory: + size = <0 0x10000000>; + alignment = <0 0x10000000>; + */ + usdpaa_mem: usdpaa_mem { + compatible = "fsl,usdpaa-mem"; + alloc-ranges = <0 0 0x10000 0>; + size = <0 0x1000>; + alignment = <0 0x1000>; + }; + }; +}; + +&fman0 { + fman0_oh2: port@83000 { + cell-index = <1>; + compatible = "fsl,fman-port-oh"; + reg = <0x83000 0x1000>; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts new file mode 100644 index 000000000000..343c9d81a83f --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb-usdpaa.dts @@ -0,0 +1,133 @@ +/* + * Device Tree Include file for Freescale Layerscape-1046A family SoC. + * + * Copyright (C) 2016, Freescale Semiconductor + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include "fsl-ls1046a-rdb-sdk.dts" + +&soc { + bp7: buffer-pool@7 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <7>; + fsl,bpool-ethernet-cfg = <0 0 0 192 0 0xdeadbeef>; + fsl,bpool-thresholds = <0x400 0xc00 0x0 0x0>; + dma-coherent; + }; + + bp8: buffer-pool@8 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <8>; + fsl,bpool-ethernet-cfg = <0 0 0 576 0 0xabbaf00d>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + dma-coherent; + }; + + bp9: buffer-pool@9 { + compatible = "fsl,ls1046a-bpool", "fsl,bpool"; + fsl,bpid = <9>; + fsl,bpool-ethernet-cfg = <0 0 0 2048 0 0xfeedabba>; + fsl,bpool-thresholds = <0x100 0x300 0x0 0x0>; + dma-coherent; + }; + + fsl,dpaa { + compatible = "fsl,ls1046a", "fsl,dpaa", "simple-bus"; + dma-coherent; + + ethernet@2 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x54 1 0x55 1>; + fsl,qman-frame-queues-tx = <0x74 1 0x75 1>; + }; + + ethernet@3 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x56 1 0x57 1>; + fsl,qman-frame-queues-tx = <0x76 1 0x77 1>; + }; + + ethernet@4 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x58 1 0x59 1>; + fsl,qman-frame-queues-tx = <0x78 1 0x79 1>; + }; + + ethernet@5 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x5a 1 0x5b 1>; + fsl,qman-frame-queues-tx = <0x7a 1 0x7b 1>; + }; + + ethernet@8 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x5c 1 0x5d 1>; + fsl,qman-frame-queues-tx = <0x7c 1 0x7d 1>; + }; + + ethernet@9 { + compatible = "fsl,dpa-ethernet-init"; + fsl,bman-buffer-pools = <&bp7 &bp8 &bp9>; + fsl,qman-frame-queues-rx = <0x5e 1 0x5f 1>; + fsl,qman-frame-queues-tx = <0x7e 1 0x7f 1>; + }; + + dpa-fman0-oh@2 { + compatible = "fsl,dpa-oh"; + /* Define frame queues for the OH port*/ + /* <OH Rx error, OH Rx default> */ + fsl,qman-frame-queues-oh = <0x60 1 0x61 1>; + fsl,fman-oh-port = <&fman0_oh2>; + }; + }; + + pcie@3400000 { + /delete-property/ iommu-map; + }; + + pcie@3500000 { + /delete-property/ iommu-map; + }; + + pcie@3600000 { + /delete-property/ iommu-map; + }; + + /delete-node/ iommu@9000000; +}; +/ { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* For legacy usdpaa based use-cases, update the size and + alignment parameters. e.g. to allocate 256 MB memory: + size = <0 0x10000000>; + alignment = <0 0x10000000>; + */ + usdpaa_mem: usdpaa_mem { + compatible = "fsl,usdpaa-mem"; + alloc-ranges = <0 0 0x10000 0>; + size = <0 0x1000>; + alignment = <0 0x1000>; + }; + }; +}; + +&fman0 { + fman0_oh2: port@83000 { + cell-index = <1>; + compatible = "fsl,fman-port-oh"; + reg = <0x83000 0x1000>; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts index 7025aad8ae89..4361f296f480 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts @@ -104,7 +104,7 @@ #address-cells = <1>; #size-cells = <1>; spi-max-frequency = <50000000>; - spi-rx-bus-width = <4>; + spi-rx-bus-width = <1>; spi-tx-bus-width = <1>; reg = <0>; }; @@ -114,7 +114,7 @@ #address-cells = <1>; #size-cells = <1>; spi-max-frequency = <50000000>; - spi-rx-bus-width = <4>; + spi-rx-bus-width = <1>; spi-tx-bus-width = <1>; reg = <1>; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 687fea6d8afa..b29ff00698ab 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -272,6 +272,8 @@ #address-cells = <2>; #size-cells = <2>; ranges; + dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>; + dma-coherent; ddr: memory-controller@1080000 { compatible = "fsl,qoriq-memory-controller"; @@ -280,8 +282,8 @@ big-endian; }; - ifc: ifc@1530000 { - compatible = "fsl,ifc", "simple-bus"; + ifc: memory-controller@1530000 { + compatible = "fsl,ifc"; reg = <0x0 0x1530000 0x0 0x10000>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; @@ -314,6 +316,49 @@ bus-width = <4>; }; + smmu: iommu@9000000 { + compatible = "arm,mmu-500"; + reg = <0 0x9000000 0 0x400000>; + dma-coherent; + stream-match-mask = <0x7f00>; + #global-interrupts = <2>; + #iommu-cells = <1>; + interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>; + }; + scfg: scfg@1570000 { compatible = "fsl,ls1046a-scfg", "syscon"; reg = <0x0 0x1570000 0x0 0x10000>; @@ -492,7 +537,7 @@ }; i2c0: i2c@2180000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,vf610-i2c", "fsl,ls1046a-vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; @@ -502,6 +547,7 @@ dmas = <&edma0 1 39>, <&edma0 1 38>; dma-names = "tx", "rx"; + scl-gpios = <&gpio3 12 0>; status = "disabled"; }; @@ -528,13 +574,14 @@ }; i2c3: i2c@21b0000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,vf610-i2c", "fsl,ls1046a-vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x21b0000 0x0 0x10000>; interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>; + scl-gpios = <&gpio3 12 0>; status = "disabled"; }; @@ -701,44 +748,61 @@ QORIQ_CLK_PLL_DIV(2)>; }; - usb0: usb@2f00000 { - compatible = "snps,dwc3"; - reg = <0x0 0x2f00000 0x0 0x10000>; - interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - }; - - usb1: usb@3000000 { - compatible = "snps,dwc3"; - reg = <0x0 0x3000000 0x0 0x10000>; - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - }; - - usb2: usb@3100000 { - compatible = "snps,dwc3"; - reg = <0x0 0x3100000 0x0 0x10000>; - interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - }; - - sata: sata@3200000 { - compatible = "fsl,ls1046a-ahci"; - reg = <0x0 0x3200000 0x0 0x10000>, - <0x0 0x20140520 0x0 0x4>; - reg-names = "ahci", "sata-ecc"; - interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(2)>; + aux_bus: aux_bus { + #address-cells = <2>; + #size-cells = <2>; + compatible = "simple-bus"; + ranges; + dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>; + + usb0: usb@2f00000 { + compatible = "fsl,ls1046a-dwc3", "snps,dwc3"; + reg = <0x0 0x2f00000 0x0 0x10000>; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + usb3-lpm-capable; + snps,host-vbus-glitches; + dma-coherent; + }; + + usb1: usb@3000000 { + compatible = "fsl,ls1046a-dwc3", "snps,dwc3"; + reg = <0x0 0x3000000 0x0 0x10000>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + usb3-lpm-capable; + snps,host-vbus-glitches; + dma-coherent; + }; + + usb2: usb@3100000 { + compatible = "fsl,ls1046a-dwc3", "snps,dwc3"; + reg = <0x0 0x3100000 0x0 0x10000>; + interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; + dr_mode = "host"; + snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + usb3-lpm-capable; + snps,host-vbus-glitches; + dma-coherent; + }; + + sata: sata@3200000 { + compatible = "fsl,ls1046a-ahci"; + reg = <0x0 0x3200000 0x0 0x10000>, + <0x0 0x20140520 0x0 0x4>; + reg-names = "ahci", "sata-ecc"; + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(2)>; + }; }; msi1: msi-controller@1580000 { @@ -783,6 +847,7 @@ #size-cells = <2>; device_type = "pci"; dma-coherent; + iommu-map = <0 &smmu 0 1>; /* update by bootloader */ num-viewport = <8>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ @@ -794,6 +859,7 @@ <0000 0 0 2 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + big-endian; status = "disabled"; }; @@ -802,8 +868,11 @@ reg = <0x00 0x03400000 0x0 0x00100000>, <0x40 0x00000000 0x8 0x00000000>; reg-names = "regs", "addr_space"; + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ + interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <8>; + big-endian; status = "disabled"; }; @@ -819,6 +888,7 @@ #size-cells = <2>; device_type = "pci"; dma-coherent; + iommu-map = <0 &smmu 0 1>; /* update by bootloader */ num-viewport = <8>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ @@ -830,6 +900,7 @@ <0000 0 0 2 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; + big-endian; status = "disabled"; }; @@ -838,8 +909,11 @@ reg = <0x00 0x03500000 0x0 0x00100000>, <0x48 0x00000000 0x8 0x00000000>; reg-names = "regs", "addr_space"; + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ + interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <8>; + big-endian; status = "disabled"; }; @@ -855,6 +929,7 @@ #size-cells = <2>; device_type = "pci"; dma-coherent; + iommu-map = <0 &smmu 0 1>; /* update by bootloader */ num-viewport = <8>; bus-range = <0x0 0xff>; ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */ @@ -866,6 +941,7 @@ <0000 0 0 2 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; + big-endian; status = "disabled"; }; @@ -874,8 +950,11 @@ reg = <0x00 0x03600000 0x0 0x00100000>, <0x50 0x00000000 0x8 0x00000000>; reg-names = "regs", "addr_space"; + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ + interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <8>; + big-endian; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts index 41d8b15f25a5..881f1eed8170 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-qds.dts @@ -113,12 +113,13 @@ 3 0 0x5 0x20000000 0x00010000>; status = "okay"; + /* not working, disabled to workaround boot issue nor@0,0 { compatible = "cfi-flash"; reg = <0x0 0x0 0x8000000>; bank-width = <2>; device-width = <1>; - }; + };*/ nand@2,0 { compatible = "fsl,ifc-nand"; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts index 1bfbce69cc8b..8070ac262b26 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a-rdb.dts @@ -223,7 +223,7 @@ #address-cells = <1>; #size-cells = <1>; spi-max-frequency = <50000000>; - spi-rx-bus-width = <4>; + spi-rx-bus-width = <1>; spi-tx-bus-width = <1>; reg = <0>; }; @@ -233,7 +233,7 @@ #address-cells = <1>; #size-cells = <1>; spi-max-frequency = <50000000>; - spi-rx-bus-width = <4>; + spi-rx-bus-width = <1>; spi-tx-bus-width = <1>; reg = <1>; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index f85e437f80b7..3b5b597c023d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -206,6 +206,19 @@ clock-output-names = "sysclk"; }; + rstcr: syscon@1e60000 { + compatible = "fsl,ls1088a-rstcr", "syscon"; + reg = <0x0 0x1e60000 0x0 0x4>; + }; + + reboot { + compatible = "syscon-reboot"; + regmap = <&rstcr>; + offset = <0x0>; + mask = <0x02>; + }; + + soc { compatible = "simple-bus"; #address-cells = <2>; @@ -384,8 +397,8 @@ #interrupt-cells = <2>; }; - ifc: ifc@2240000 { - compatible = "fsl,ifc", "simple-bus"; + ifc: memory-controller@2240000 { + compatible = "fsl,ifc"; reg = <0x0 0x2240000 0x0 0x20000>; interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; little-endian; @@ -395,13 +408,14 @@ }; i2c0: i2c@2000000 { - compatible = "fsl,vf610-i2c"; + compatible = "fsl,vf610-i2c", "fsl,ls1088a-vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2000000 0x0 0x10000>; interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(8)>; + scl-gpios = <&gpio3 30 0>; status = "disabled"; }; @@ -468,23 +482,28 @@ }; usb0: usb@3100000 { - compatible = "snps,dwc3"; + compatible = "fsl,ls1088a-dwc3", "snps,dwc3"; reg = <0x0 0x3100000 0x0 0x10000>; interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + snps,host-vbus-glitches; + dma-coherent; status = "disabled"; }; usb1: usb@3110000 { - compatible = "snps,dwc3"; + compatible = "fsl,ls1088a-dwc3", "snps,dwc3"; reg = <0x0 0x3110000 0x0 0x10000>; interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + snps,host-vbus-glitches; + dma-coherent; status = "disabled"; }; @@ -570,9 +589,12 @@ reg = <0x00 0x03400000 0x0 0x00100000>, <0x20 0x00000000 0x8 0x00000000>; reg-names = "regs", "addr_space"; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ + interrupt-names = "pme"; num-ib-windows = <24>; num-ob-windows = <256>; max-functions = /bits/ 8 <2>; + big-endian; status = "disabled"; }; @@ -607,8 +629,11 @@ reg = <0x00 0x03500000 0x0 0x00100000>, <0x28 0x00000000 0x8 0x00000000>; reg-names = "regs", "addr_space"; + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ + interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <6>; + big-endian; status = "disabled"; }; @@ -643,8 +668,11 @@ reg = <0x00 0x03600000 0x0 0x00100000>, <0x30 0x00000000 0x8 0x00000000>; reg-names = "regs", "addr_space"; + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ + interrupt-names = "pme"; num-ib-windows = <6>; num-ob-windows = <6>; + big-endian; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts index f6c3ee78ace0..30d3398afb2d 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts @@ -23,3 +23,72 @@ stdout-path = "serial0:115200n8"; }; }; + +/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */ +&dpmac9 { + phy-handle = <&mdio0_phy12>; + phy-connection-type = "sgmii"; +}; + +&dpmac10 { + phy-handle = <&mdio0_phy13>; + phy-connection-type = "sgmii"; +}; + +&dpmac11 { + phy-handle = <&mdio0_phy14>; + phy-connection-type = "sgmii"; +}; + +&dpmac12 { + phy-handle = <&mdio0_phy15>; + phy-connection-type = "sgmii"; +}; + +&ifc { + boardctrl: board-control@3,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,tetra-fpga", "fsl,fpga-qixis", "simple-mfd"; + reg = <3 0 0x300>; /* TODO check address */ + ranges = <0 3 0 0x300>; + + mdio_mux_emi1 { + compatible = "mdio-mux-mmioreg", "mdio-mux"; + mdio-parent-bus = <&emdio1>; + reg = <0x54 1>; /* BRDCFG4 */ + mux-mask = <0xe0>; /* EMI1_MDIO */ + + #address-cells=<1>; + #size-cells = <0>; + + /* Child MDIO buses, one for each riser card: + * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0. + * VSC8234 PHYs on the riser cards. + */ + + mdio_mux3: mdio@60 { + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + mdio0_phy12: mdio_phy0@1c { + reg = <0x1c>; + }; + + mdio0_phy13: mdio_phy1@1d { + reg = <0x1d>; + }; + + mdio0_phy14: mdio_phy2@1e { + reg = <0x1e>; + }; + + mdio0_phy15: mdio_phy3@1f { + reg = <0x1f>; + }; + }; + }; + }; +}; + diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts index 44894356059c..1c8c99a74071 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts @@ -23,3 +23,71 @@ stdout-path = "serial1:115200n8"; }; }; + +&dpmac5 { + phy-handle = <&mdio2_phy1>; + phy-connection-type = "10gbase-r"; +}; + +&dpmac6 { + phy-handle = <&mdio2_phy2>; + phy-connection-type = "10gbase-r"; +}; + +&dpmac7 { + phy-handle = <&mdio2_phy3>; + phy-connection-type = "10gbase-r"; +}; + +&dpmac8 { + phy-handle = <&mdio2_phy4>; + phy-connection-type = "10gbase-r"; +}; + +&emdio1 { + status = "disabled"; + + /* CS4340 PHYs */ + mdio1_phy1: emdio1_phy@1 { + reg = <0x10>; + }; + + mdio1_phy2: emdio1_phy@2 { + reg = <0x11>; + }; + + mdio1_phy3: emdio1_phy@3 { + reg = <0x12>; + }; + + mdio1_phy4: emdio1_phy@4 { + reg = <0x13>; + }; +}; + +&emdio2 { + /* AQR405 PHYs */ + mdio2_phy1: emdio2_phy@1 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 1 0x4>; /* Level high type */ + reg = <0x0>; + }; + + mdio2_phy2: emdio2_phy@2 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 2 0x4>; /* Level high type */ + reg = <0x1>; + }; + + mdio2_phy3: emdio2_phy@3 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 4 0x4>; /* Level high type */ + reg = <0x2>; + }; + + mdio2_phy4: emdio2_phy@4 { + compatible = "ethernet-phy-ieee802.3-c45"; + interrupts = <0 5 0x4>; /* Level high type */ + reg = <0x3>; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi index 6f6667b70028..a7c65a026dfa 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi @@ -150,3 +150,15 @@ ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000 /* downstream I/O */ 0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ }; + +&timer { + fsl,erratum-a008585; +}; + +&usb0 { + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; +}; + +&usb1 { + snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts new file mode 100644 index 000000000000..908b9aff0489 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-ls2081a-rdb.dts @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device Tree file for NXP LS2081A RDB Board. + * + * Copyright 2017 NXP + * + * Priyanka Jain <priyanka.jain@nxp.com> + * + */ + +/dts-v1/; + +#include "fsl-ls2088a.dtsi" + +/ { + model = "NXP Layerscape 2081A RDB Board"; + compatible = "fsl,ls2081a-rdb", "fsl,ls2081a"; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + }; + + chosen { + stdout-path = "serial1:115200n8"; + }; +}; + +&dspi { + status = "okay"; + + n25q512a: flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <3000000>; + reg = <0>; + }; +}; + +&esdhc { + status = "okay"; +}; + +&ifc { + status = "disabled"; +}; + +&i2c0 { + status = "okay"; + + pca9547: mux@75 { + compatible = "nxp,pca9547"; + reg = <0x75>; + #address-cells = <1>; + #size-cells = <0>; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x01>; + rtc@51 { + compatible = "nxp,pcf2129"; + reg = <0x51>; + }; + }; + + i2c@2 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x02>; + + ina220@40 { + compatible = "ti,ina220"; + reg = <0x40>; + shunt-resistor = <500>; + }; + }; + + i2c@3 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x3>; + + adt7481@4c { + compatible = "adi,adt7461"; + reg = <0x4c>; + }; + }; + }; +}; + +&qspi { + status = "okay"; + + s25fs512s0: flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + spi-max-frequency = <20000000>; + reg = <0>; + }; + + s25fs512s1: flash@1 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + spi-max-frequency = <20000000>; + reg = <1>; + }; +}; + +&sata0 { + status = "okay"; +}; + +&sata1 { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts index 7c17b1bd4529..2f48a7b4ce8e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a-qds.dts @@ -22,3 +22,71 @@ stdout-path = "serial0:115200n8"; }; }; + +/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */ +&dpmac9 { + phy-handle = <&mdio0_phy12>; + phy-connection-type = "sgmii"; +}; + +&dpmac10 { + phy-handle = <&mdio0_phy13>; + phy-connection-type = "sgmii"; +}; + +&dpmac11 { + phy-handle = <&mdio0_phy14>; + phy-connection-type = "sgmii"; +}; + +&dpmac12 { + phy-handle = <&mdio0_phy15>; + phy-connection-type = "sgmii"; +}; + +&ifc { + boardctrl: board-control@3,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,tetra-fpga", "fsl,fpga-qixis", "simple-mfd"; + reg = <3 0 0x300>; /* TODO check address */ + ranges = <0 3 0 0x300>; + + mdio_mux_emi1 { + compatible = "mdio-mux-mmioreg", "mdio-mux"; + mdio-parent-bus = <&emdio1>; + reg = <0x54 1>; /* BRDCFG4 */ + mux-mask = <0xe0>; /* EMI1_MDIO */ + + #address-cells=<1>; + #size-cells = <0>; + + /* Child MDIO buses, one for each riser card: + * reg = 0x0, 0x20, 0x40, 0x60, 0x80, 0xa0. + * VSC8234 PHYs on the riser cards. + */ + + mdio_mux3: mdio@60 { + reg = <0x60>; + #address-cells = <1>; + #size-cells = <0>; + + mdio0_phy12: mdio_phy0@1c { + reg = <0x1c>; + }; + + mdio0_phy13: mdio_phy1@1d { + reg = <0x1d>; + }; + + mdio0_phy14: mdio_phy2@1e { + reg = <0x1e>; + }; + + mdio0_phy15: mdio_phy3@1f { + reg = <0x1f>; + }; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi index 4b71c4fcb35f..a752f06a2e74 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi @@ -49,6 +49,8 @@ reg = <0x75>; #address-cells = <1>; #size-cells = <0>; + idle-state = <0>; + i2c@1 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi index 801ba9612d36..69387eac194f 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi @@ -239,13 +239,12 @@ }; }; - timer { + timer: timer { compatible = "arm,armv8-timer"; interrupts = <1 13 4>, /* Physical Secure PPI, active-low */ <1 14 4>, /* Physical Non-Secure PPI, active-low */ <1 11 4>, /* Virtual PPI, active-low */ <1 10 4>; /* Hypervisor PPI, active-low */ - fsl,erratum-a008585; }; pmu { @@ -390,9 +389,9 @@ compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xc000000 0x0 0x1000>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>, + QORIQ_CLK_PLL_DIV(32)>, <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>; + QORIQ_CLK_PLL_DIV(32)>; clock-names = "wdog_clk", "apb_pclk"; }; @@ -400,9 +399,9 @@ compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xc010000 0x0 0x1000>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>, + QORIQ_CLK_PLL_DIV(32)>, <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>; + QORIQ_CLK_PLL_DIV(32)>; clock-names = "wdog_clk", "apb_pclk"; }; @@ -410,9 +409,9 @@ compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xc100000 0x0 0x1000>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>, + QORIQ_CLK_PLL_DIV(32)>, <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>; + QORIQ_CLK_PLL_DIV(32)>; clock-names = "wdog_clk", "apb_pclk"; }; @@ -420,9 +419,9 @@ compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xc110000 0x0 0x1000>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>, + QORIQ_CLK_PLL_DIV(32)>, <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>; + QORIQ_CLK_PLL_DIV(32)>; clock-names = "wdog_clk", "apb_pclk"; }; @@ -430,9 +429,9 @@ compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xc200000 0x0 0x1000>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>, + QORIQ_CLK_PLL_DIV(32)>, <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>; + QORIQ_CLK_PLL_DIV(32)>; clock-names = "wdog_clk", "apb_pclk"; }; @@ -440,9 +439,9 @@ compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xc210000 0x0 0x1000>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>, + QORIQ_CLK_PLL_DIV(32)>, <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>; + QORIQ_CLK_PLL_DIV(32)>; clock-names = "wdog_clk", "apb_pclk"; }; @@ -450,9 +449,9 @@ compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xc300000 0x0 0x1000>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>, + QORIQ_CLK_PLL_DIV(32)>, <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>; + QORIQ_CLK_PLL_DIV(32)>; clock-names = "wdog_clk", "apb_pclk"; }; @@ -460,9 +459,9 @@ compatible = "arm,sp805-wdt", "arm,primecell"; reg = <0x0 0xc310000 0x0 0x1000>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>, + QORIQ_CLK_PLL_DIV(32)>, <&clockgen QORIQ_CLK_PLATFORM_PLL - QORIQ_CLK_PLL_DIV(4)>; + QORIQ_CLK_PLL_DIV(32)>; clock-names = "wdog_clk", "apb_pclk"; }; @@ -990,7 +989,7 @@ i2c0: i2c@2000000 { status = "disabled"; - compatible = "fsl,vf610-i2c"; + compatible = "fsl,vf610-i2c", "fsl,ls208xa-vf610-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2000000 0x0 0x10000>; @@ -998,6 +997,7 @@ clock-names = "i2c"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; + scl-gpios = <&gpio3 10 0>; }; i2c1: i2c@2010000 { @@ -1036,8 +1036,8 @@ QORIQ_CLK_PLL_DIV(4)>; }; - ifc: ifc@2240000 { - compatible = "fsl,ifc", "simple-bus"; + ifc: memory-controller@2240000 { + compatible = "fsl,ifc"; reg = <0x0 0x2240000 0x0 0x20000>; interrupts = <0 21 0x4>; /* Level high type */ little-endian; @@ -1068,8 +1068,8 @@ pcie1: pcie@3400000 { compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie"; reg-names = "regs", "config"; - interrupts = <0 108 0x4>; /* Level high type */ - interrupt-names = "intr"; + interrupts = <0 108 0x4>; /* aer interrupt */ + interrupt-names = "aer"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; @@ -1090,8 +1090,8 @@ pcie2: pcie@3500000 { compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie"; reg-names = "regs", "config"; - interrupts = <0 113 0x4>; /* Level high type */ - interrupt-names = "intr"; + interrupts = <0 113 0x4>; /* aer interrupt */ + interrupt-names = "aer"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; @@ -1112,8 +1112,8 @@ pcie3: pcie@3600000 { compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie"; reg-names = "regs", "config"; - interrupts = <0 118 0x4>; /* Level high type */ - interrupt-names = "intr"; + interrupts = <0 118 0x4>; /* aer interrupt */ + interrupt-names = "aer"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; @@ -1134,8 +1134,8 @@ pcie4: pcie@3700000 { compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie"; reg-names = "regs", "config"; - interrupts = <0 123 0x4>; /* Level high type */ - interrupt-names = "intr"; + interrupts = <0 123 0x4>; /* aer interrupt */ + interrupt-names = "aer"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; @@ -1175,24 +1175,26 @@ usb0: usb@3100000 { status = "disabled"; - compatible = "snps,dwc3"; + compatible = "fsl,ls2088a-dwc3", "snps,dwc3"; reg = <0x0 0x3100000 0x0 0x10000>; interrupts = <0 80 0x4>; /* Level high type */ dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + snps,host-vbus-glitches; }; usb1: usb@3110000 { status = "disabled"; - compatible = "snps,dwc3"; + compatible = "fsl,ls2088a-dwc3", "snps,dwc3"; reg = <0x0 0x3110000 0x0 0x10000>; interrupts = <0 81 0x4>; /* Level high type */ dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + snps,host-vbus-glitches; }; ccn@4000000 { diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts index d858d9c8b583..2ecfa90f5e28 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts @@ -31,6 +31,130 @@ regulator-boot-on; regulator-always-on; }; + + mdio-mux-1 { + compatible = "mdio-mux-multiplexer"; + mux-controls = <&mux 0>; + mdio-parent-bus = <&emdio1>; + #address-cells=<1>; + #size-cells = <0>; + + mdio@0 { /* On-board PHY #1 RGMI1*/ + reg = <0x00>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@8 { /* On-board PHY #2 RGMI2*/ + reg = <0x8>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@18 { /* Slot #1 */ + reg = <0x18>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@19 { /* Slot #2 */ + reg = <0x19>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@1a { /* Slot #3 */ + reg = <0x1a>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@1b { /* Slot #4 */ + reg = <0x1b>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@1c { /* Slot #5 */ + reg = <0x1c>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@1d { /* Slot #6 */ + reg = <0x1d>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@1e { /* Slot #7 */ + reg = <0x1e>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@1f { /* Slot #8 */ + reg = <0x1f>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; + + mdio-mux-2 { + compatible = "mdio-mux-multiplexer"; + mux-controls = <&mux 1>; + mdio-parent-bus = <&emdio2>; + #address-cells=<1>; + #size-cells = <0>; + + mdio@0 { /* Slot #1 (secondary EMI) */ + reg = <0x00>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@1 { /* Slot #2 (secondary EMI) */ + reg = <0x01>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@2 { /* Slot #3 (secondary EMI) */ + reg = <0x02>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@3 { /* Slot #4 (secondary EMI) */ + reg = <0x03>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@4 { /* Slot #5 (secondary EMI) */ + reg = <0x04>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@5 { /* Slot #6 (secondary EMI) */ + reg = <0x05>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@6 { /* Slot #7 (secondary EMI) */ + reg = <0x06>; + #address-cells = <1>; + #size-cells = <0>; + }; + + mdio@7 { /* Slot #8 (secondary EMI) */ + reg = <0x07>; + #address-cells = <1>; + #size-cells = <0>; + }; + }; }; &can0 { @@ -81,6 +205,14 @@ }; }; +&emdio1 { + status = "okay"; +}; + +&emdio2 { + status = "okay"; +}; + &esdhc0 { status = "okay"; }; @@ -107,6 +239,19 @@ &i2c0 { status = "okay"; + fpga@66 { + compatible = "fsl,lx2160aqds-fpga", "fsl,fpga-qixis-i2c", + "simple-mfd"; + reg = <0x66>; + + mux: mux-controller { + compatible = "reg-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x54 0xf8>, /* 0: reg 0x54, bits 7:3 */ + <0x54 0x07>; /* 1: reg 0x54, bit 2:0 */ + }; + }; + i2c-mux@77 { compatible = "nxp,pca9547"; reg = <0x77>; @@ -156,6 +301,10 @@ }; }; +&optee { + status = "okay"; +}; + &sata0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts index 028ff8074b9d..0c44b3cbef77 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts @@ -49,6 +49,14 @@ managed = "in-band-status"; }; +&dpmac5 { + phy-handle = <&inphi_phy>; +}; + +&dpmac6 { + phy-handle = <&inphi_phy>; +}; + &dpmac17 { phy-handle = <&rgmii_phy1>; phy-connection-type = "rgmii-id"; @@ -109,6 +117,15 @@ }; }; +&emdio2 { + status = "okay"; + + inphi_phy: ethernet-phy@0 { + compatible = "ethernet-phy-id0210.7440"; + reg = <0x0>; + }; +}; + &esdhc0 { sd-uhs-sdr104; sd-uhs-sdr50; @@ -202,6 +219,10 @@ }; }; +&optee { + status = "okay"; +}; + &pcs_mdio3 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index c4b1a59ba424..a6b33b221be9 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -719,7 +719,7 @@ clock-names = "i2c"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(16)>; - scl-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>; status = "disabled"; }; @@ -768,7 +768,7 @@ clock-names = "i2c"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(16)>; - scl-gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>; + scl-gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>; status = "disabled"; }; @@ -1018,24 +1018,30 @@ }; usb0: usb@3100000 { - compatible = "snps,dwc3"; + compatible = "fsl,lx2160a-dwc3", "snps,dwc3"; reg = <0x0 0x3100000 0x0 0x10000>; interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; + usb3-lpm-capable; snps,dis_rxdet_inp3_quirk; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + snps,host-vbus-glitches; + dma-coherent; status = "disabled"; }; usb1: usb@3110000 { - compatible = "snps,dwc3"; + compatible = "fsl,lx2160a-dwc3", "snps,dwc3"; reg = <0x0 0x3110000 0x0 0x10000>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; + usb3-lpm-capable; snps,dis_rxdet_inp3_quirk; snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; + snps,host-vbus-glitches; + dma-coherent; status = "disabled"; }; @@ -1088,10 +1094,10 @@ }; pcie1: pcie@3400000 { - compatible = "fsl,lx2160a-pcie"; - reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */ - <0x80 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "csr_axi_slave", "config_axi_slave"; + compatible = "fsl,ls2088a-pcie"; + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ + 0x80 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */ <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ @@ -1100,26 +1106,36 @@ #size-cells = <2>; device_type = "pci"; dma-coherent; - apio-wins = <8>; - ppio-wins = <8>; + num-viewport = <8>; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ msi-parent = <&its>; + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; - iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */ + status = "disabled"; + }; + + pcie_ep1: pcie_ep@3400000 { + compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"; + reg = <0x00 0x03400000 0x0 0x00100000 + 0x80 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <8>; + num-ib-windows = <8>; status = "disabled"; }; pcie2: pcie@3500000 { - compatible = "fsl,lx2160a-pcie"; - reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */ - <0x88 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "csr_axi_slave", "config_axi_slave"; + compatible = "fsl,ls2088a-pcie"; + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ + 0x88 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */ <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ @@ -1128,26 +1144,36 @@ #size-cells = <2>; device_type = "pci"; dma-coherent; - apio-wins = <8>; - ppio-wins = <8>; + num-viewport = <8>; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ msi-parent = <&its>; + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; - iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */ + status = "disabled"; + }; + + pcie_ep2: pcie_ep@3500000 { + compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"; + reg = <0x00 0x03500000 0x0 0x00100000 + 0x88 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <8>; + num-ib-windows = <8>; status = "disabled"; }; pcie3: pcie@3600000 { - compatible = "fsl,lx2160a-pcie"; - reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */ - <0x90 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "csr_axi_slave", "config_axi_slave"; + compatible = "fsl,ls2088a-pcie"; + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ + 0x90 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ @@ -1156,26 +1182,36 @@ #size-cells = <2>; device_type = "pci"; dma-coherent; - apio-wins = <256>; - ppio-wins = <24>; + num-viewport = <256>; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x90 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ msi-parent = <&its>; + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 2 &gic 0 0 GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic 0 0 GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic 0 0 GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; - iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */ + status = "disabled"; + }; + + pcie_ep3: pcie_ep@3600000 { + compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"; + reg = <0x00 0x03600000 0x0 0x00100000 + 0x90 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <256>; + num-ib-windows = <24>; status = "disabled"; }; pcie4: pcie@3700000 { - compatible = "fsl,lx2160a-pcie"; - reg = <0x00 0x03700000 0x0 0x00100000>, /* controller registers */ - <0x98 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "csr_axi_slave", "config_axi_slave"; + compatible = "fsl,ls2088a-pcie"; + reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */ + 0x98 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ @@ -1184,26 +1220,36 @@ #size-cells = <2>; device_type = "pci"; dma-coherent; - apio-wins = <8>; - ppio-wins = <8>; + num-viewport = <8>; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0x98 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ msi-parent = <&its>; + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 2 &gic 0 0 GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic 0 0 GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic 0 0 GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */ + status = "disabled"; + }; + + pcie_ep4: pcie_ep@3700000 { + compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"; + reg = <0x00 0x03700000 0x0 0x00100000 + 0x98 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <8>; + num-ib-windows = <8>; status = "disabled"; }; pcie5: pcie@3800000 { - compatible = "fsl,lx2160a-pcie"; - reg = <0x00 0x03800000 0x0 0x00100000>, /* controller registers */ - <0xa0 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "csr_axi_slave", "config_axi_slave"; + compatible = "fsl,ls2088a-pcie"; + reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */ + 0xa0 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ @@ -1212,26 +1258,36 @@ #size-cells = <2>; device_type = "pci"; dma-coherent; - apio-wins = <256>; - ppio-wins = <24>; + num-viewport = <256>; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0xa0 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ msi-parent = <&its>; + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 2 &gic 0 0 GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic 0 0 GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic 0 0 GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; - iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */ + status = "disabled"; + }; + + pcie_ep5: pcie_ep@3800000 { + compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"; + reg = <0x00 0x03800000 0x0 0x00100000 + 0xa0 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <256>; + num-ib-windows = <24>; status = "disabled"; }; pcie6: pcie@3900000 { - compatible = "fsl,lx2160a-pcie"; - reg = <0x00 0x03900000 0x0 0x00100000>, /* controller registers */ - <0xa8 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "csr_axi_slave", "config_axi_slave"; + compatible = "fsl,ls2088a-pcie"; + reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */ + 0xa8 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* AER interrupt */ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ @@ -1240,18 +1296,28 @@ #size-cells = <2>; device_type = "pci"; dma-coherent; - apio-wins = <8>; - ppio-wins = <8>; + num-viewport = <8>; bus-range = <0x0 0xff>; - ranges = <0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + ranges = <0x81000000 0x0 0x00000000 0xa8 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ msi-parent = <&its>; + iommu-map = <0 &smmu 0 1>; /* This is fixed-up by u-boot */ #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 2 &gic 0 0 GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 3 &gic 0 0 GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, <0000 0 0 4 &gic 0 0 GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */ + status = "disabled"; + }; + + pcie_ep6: pcie_ep@3900000 { + compatible = "fsl,lx2160ar2-pcie-ep", "fsl,ls-pcie-ep"; + reg = <0x00 0x03900000 0x0 0x00100000 + 0xa8 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <8>; + num-ib-windows = <8>; status = "disabled"; }; @@ -1751,4 +1817,12 @@ }; }; }; + + firmware { + optee: optee { + compatible = "linaro,optee-tz"; + method = "smc"; + status = "disabled"; + }; + }; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts index e1defee1ad27..a1644ceed154 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts @@ -167,6 +167,14 @@ }; }; +&can0 { + status = "okay"; +}; + +&can1 { + status = "okay"; +}; + &crypto { status = "okay"; }; @@ -226,10 +234,17 @@ }; &esdhc0 { + sd-uhs-sdr104; + sd-uhs-sdr50; + sd-uhs-sdr25; + sd-uhs-sdr12; status = "okay"; }; &esdhc1 { + mmc-hs200-1_8v; + mmc-hs400-1_8v; + bus-width = <8>; status = "okay"; }; @@ -302,11 +317,17 @@ rtc@51 { compatible = "nxp,pcf2129"; reg = <0x51>; + /* IRQ_RTC_B -> IRQ11_B(CPLD) -> IRQ11(CPU), active low */ + interrupts-extended = <&extirq 11 IRQ_TYPE_LEVEL_LOW>; }; }; }; }; +&optee { + status = "okay"; +}; + &sata0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/freescale/qoriq-bman-portals-sdk.dtsi b/arch/arm64/boot/dts/freescale/qoriq-bman-portals-sdk.dtsi new file mode 100644 index 000000000000..0a68ec4c0026 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/qoriq-bman-portals-sdk.dtsi @@ -0,0 +1,55 @@ +/* + * QorIQ BMan SDK Portals device tree nodes + * + * Copyright 2011-2016 Freescale Semiconductor Inc. + * Copyright 2017 NXP + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +&bportals { + bman-portal@0 { + cell-index = <0>; + }; + + bman-portal@10000 { + cell-index = <1>; + }; + + bman-portal@20000 { + cell-index = <2>; + }; + + bman-portal@30000 { + cell-index = <3>; + }; + + bman-portal@40000 { + cell-index = <4>; + }; + + bman-portal@50000 { + cell-index = <5>; + }; + + bman-portal@60000 { + cell-index = <6>; + }; + + bman-portal@70000 { + cell-index = <7>; + }; + + bman-portal@80000 { + cell-index = <8>; + }; + + bman-portal@90000 { + cell-index = <9>; + }; + + bman-bpids@0 { + compatible = "fsl,bpid-range"; + fsl,bpid-range = <32 32>; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi new file mode 100644 index 000000000000..d3ae39944bf4 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/qoriq-dpaa-eth.dtsi @@ -0,0 +1,72 @@ +/* + * QorIQ FMan v3 10g port #1 device tree stub [ controller @ offset 0x400000 ] + * + * Copyright 2012 - 2015 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +fsldpaa: fsl,dpaa { + compatible = "fsl,ls1043a-dpaa", "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + dma-coherent; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + dma-coherent; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + dma-coherent; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + dma-coherent; + }; + ethernet@4 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet4>; + dma-coherent; + }; + ethernet@5 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet5>; + dma-coherent; + }; + ethernet@8 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet6>; + dma-coherent; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi index dbd2fc3ba790..7886b94cc616 100644 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-0.dtsi @@ -9,19 +9,20 @@ fman@1a00000 { fman0_rx_0x10: port@90000 { cell-index = <0x10>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx"; reg = <0x90000 0x1000>; fsl,fman-10g-port; }; fman0_tx_0x30: port@b0000 { cell-index = <0x30>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx"; reg = <0xb0000 0x1000>; fsl,fman-10g-port; + fsl,qman-channel-id = <0x800>; }; - ethernet@f0000 { + mac9: ethernet@f0000 { cell-index = <0x8>; compatible = "fsl,fman-memac"; reg = <0xf0000 0x1000>; @@ -29,7 +30,7 @@ fman@1a00000 { pcsphy-handle = <&pcsphy6>; }; - mdio@f1000 { + mdio9: mdio@f1000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi index 6fc5d2560057..89b9d14b8436 100644 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-10g-1.dtsi @@ -9,19 +9,20 @@ fman@1a00000 { fman0_rx_0x11: port@91000 { cell-index = <0x11>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx"; reg = <0x91000 0x1000>; fsl,fman-10g-port; }; fman0_tx_0x31: port@b1000 { cell-index = <0x31>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx"; reg = <0xb1000 0x1000>; fsl,fman-10g-port; + fsl,qman-channel-id = <0x801>; }; - ethernet@f2000 { + mac10: ethernet@f2000 { cell-index = <0x9>; compatible = "fsl,fman-memac"; reg = <0xf2000 0x1000>; @@ -29,7 +30,7 @@ fman@1a00000 { pcsphy-handle = <&pcsphy7>; }; - mdio@f3000 { + mdio10: mdio@f3000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,fman-memac-mdio", "fsl,fman-xmdio"; diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi index 4e02276fcf99..60ed4473ef84 100644 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-0.dtsi @@ -9,14 +9,15 @@ fman@1a00000 { fman0_rx_0x08: port@88000 { cell-index = <0x8>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; reg = <0x88000 0x1000>; }; fman0_tx_0x28: port@a8000 { cell-index = <0x28>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; reg = <0xa8000 0x1000>; + fsl,qman-channel-id = <0x802>; }; ethernet@e0000 { diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi index 0312fa43fa77..69de2c1ff0c0 100644 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-1.dtsi @@ -9,14 +9,15 @@ fman@1a00000 { fman0_rx_0x09: port@89000 { cell-index = <0x9>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; reg = <0x89000 0x1000>; }; fman0_tx_0x29: port@a9000 { cell-index = <0x29>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; reg = <0xa9000 0x1000>; + fsl,qman-channel-id = <0x803>; }; ethernet@e2000 { diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi index af2df07971dd..981bbfcaaa29 100644 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-2.dtsi @@ -9,14 +9,15 @@ fman@1a00000 { fman0_rx_0x0a: port@8a000 { cell-index = <0xa>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; reg = <0x8a000 0x1000>; }; fman0_tx_0x2a: port@aa000 { cell-index = <0x2a>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; reg = <0xaa000 0x1000>; + fsl,qman-channel-id = <0x804>; }; ethernet@e4000 { diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi index 4ac98dc8b227..956b1b9df696 100644 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-3.dtsi @@ -9,14 +9,15 @@ fman@1a00000 { fman0_rx_0x0b: port@8b000 { cell-index = <0xb>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; reg = <0x8b000 0x1000>; }; fman0_tx_0x2b: port@ab000 { cell-index = <0x2b>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; reg = <0xab000 0x1000>; + fsl,qman-channel-id = <0x805>; }; ethernet@e6000 { diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi index bd932d8b0160..52899ce69580 100644 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-4.dtsi @@ -9,14 +9,15 @@ fman@1a00000 { fman0_rx_0x0c: port@8c000 { cell-index = <0xc>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; reg = <0x8c000 0x1000>; }; fman0_tx_0x2c: port@ac000 { cell-index = <0x2c>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; reg = <0xac000 0x1000>; + fsl,qman-channel-id = <0x806>; }; ethernet@e8000 { diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi index 7de1c5203f3e..fe8c4c29bb5c 100644 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-1g-5.dtsi @@ -9,14 +9,15 @@ fman@1a00000 { fman0_rx_0x0d: port@8d000 { cell-index = <0xd>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-1g-rx"; reg = <0x8d000 0x1000>; }; fman0_tx_0x2d: port@ad000 { cell-index = <0x2d>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-1g-tx"; reg = <0xad000 0x1000>; + fsl,qman-channel-id = <0x807>; }; ethernet@ea000 { diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi new file mode 100644 index 000000000000..2d0df20db55e --- /dev/null +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0-6oh.dtsi @@ -0,0 +1,47 @@ +/* + * QorIQ FMan v3 OH ports device tree + * + * Copyright 2012-2015 Freescale Semiconductor Inc. + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +fman@1a00000 { + + fman0_oh1: port@82000 { + cell-index = <0>; + compatible = "fsl,fman-port-oh"; + reg = <0x82000 0x1000>; + }; + + fman0_oh2: port@83000 { + cell-index = <1>; + compatible = "fsl,fman-port-oh"; + reg = <0x83000 0x1000>; + }; + + fman0_oh3: port@84000 { + cell-index = <2>; + compatible = "fsl,fman-port-oh"; + reg = <0x84000 0x1000>; + }; + + fman0_oh4: port@85000 { + cell-index = <3>; + compatible = "fsl,fman-port-oh"; + reg = <0x85000 0x1000>; + }; + + fman0_oh5: port@86000 { + cell-index = <4>; + compatible = "fsl,fman-port-oh"; + reg = <0x86000 0x1000>; + }; + + fman0_oh6: port@87000 { + cell-index = <5>; + compatible = "fsl,fman-port-oh"; + reg = <0x87000 0x1000>; + }; + +}; diff --git a/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi b/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi index ae1c2abaaf36..99cd3c75a0a1 100644 --- a/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi +++ b/arch/arm64/boot/dts/freescale/qoriq-fman3-0.dtsi @@ -23,45 +23,95 @@ fman0: fman@1a00000 { ptimer-handle = <&ptp_timer0>; dma-coherent; + cc { + compatible = "fsl,fman-cc"; + }; + muram@0 { compatible = "fsl,fman-muram"; reg = <0x0 0x60000>; }; + bmi@80000 { + compatible = "fsl,fman-bmi"; + reg = <0x80000 0x400>; + }; + + qmi@80400 { + compatible = "fsl,fman-qmi"; + reg = <0x80400 0x400>; + }; + fman0_oh_0x2: port@82000 { cell-index = <0x2>; compatible = "fsl,fman-v3-port-oh"; reg = <0x82000 0x1000>; + fsl,qman-channel-id = <0x809>; }; fman0_oh_0x3: port@83000 { cell-index = <0x3>; compatible = "fsl,fman-v3-port-oh"; reg = <0x83000 0x1000>; + fsl,qman-channel-id = <0x80a>; }; fman0_oh_0x4: port@84000 { cell-index = <0x4>; compatible = "fsl,fman-v3-port-oh"; reg = <0x84000 0x1000>; + fsl,qman-channel-id = <0x80b>; }; fman0_oh_0x5: port@85000 { cell-index = <0x5>; compatible = "fsl,fman-v3-port-oh"; reg = <0x85000 0x1000>; + fsl,qman-channel-id = <0x80c>; }; fman0_oh_0x6: port@86000 { cell-index = <0x6>; compatible = "fsl,fman-v3-port-oh"; reg = <0x86000 0x1000>; + fsl,qman-channel-id = <0x80d>; }; fman0_oh_0x7: port@87000 { cell-index = <0x7>; compatible = "fsl,fman-v3-port-oh"; reg = <0x87000 0x1000>; + fsl,qman-channel-id = <0x80e>; + }; + + policer@c0000 { + compatible = "fsl,fman-policer"; + reg = <0xc0000 0x1000>; + }; + + keygen@c1000 { + compatible = "fsl,fman-keygen"; + reg = <0xc1000 0x1000>; + }; + + dma@c2000 { + compatible = "fsl,fman-dma"; + reg = <0xc2000 0x1000>; + }; + + fpm@c3000 { + compatible = "fsl,fman-fpm"; + reg = <0xc3000 0x1000>; + }; + + parser@c7000 { + compatible = "fsl,fman-parser"; + reg = <0xc7000 0x1000>; + }; + + vsps@dc000 { + compatible = "fsl,fman-vsps"; + reg = <0xdc000 0x1000>; }; mdio0: mdio@fc000 { @@ -80,7 +130,7 @@ fman0: fman@1a00000 { }; ptp_timer0: ptp-timer@1afe000 { - compatible = "fsl,fman-ptp-timer"; + compatible = "fsl,fman-ptp-timer", "fsl,fman-rtc"; reg = <0x0 0x1afe000 0x0 0x1000>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clockgen QORIQ_CLK_FMAN 0>; diff --git a/arch/arm64/boot/dts/freescale/qoriq-qman-portals-sdk.dtsi b/arch/arm64/boot/dts/freescale/qoriq-qman-portals-sdk.dtsi new file mode 100644 index 000000000000..d3abfaf6efde --- /dev/null +++ b/arch/arm64/boot/dts/freescale/qoriq-qman-portals-sdk.dtsi @@ -0,0 +1,38 @@ +/* + * QorIQ QMan SDK Portals device tree nodes + * + * Copyright 2011-2016 Freescale Semiconductor Inc. + * Copyright 2017 NXP + * + * SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) + */ + +&qportals { + qman-fqids@0 { + compatible = "fsl,fqid-range"; + fsl,fqid-range = <256 256>; + }; + + qman-fqids@1 { + compatible = "fsl,fqid-range"; + fsl,fqid-range = <32768 32768>; + }; + + qman-pools@0 { + compatible = "fsl,pool-channel-range"; + fsl,pool-channel-range = <0x401 0xf>; + }; + + qman-cgrids@0 { + compatible = "fsl,cgrid-range"; + fsl,cgrid-range = <0 256>; + }; + + qman-ceetm@0 { + compatible = "fsl,qman-ceetm"; + fsl,ceetm-lfqid-range = <0xf00000 0x1000>; + fsl,ceetm-sp-range = <0 16>; + fsl,ceetm-lni-range = <0 8>; + fsl,ceetm-channel-range = <0 32>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/b4420qds-sdk.dts b/arch/powerpc/boot/dts/fsl/b4420qds-sdk.dts new file mode 100644 index 000000000000..974838fdf86b --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/b4420qds-sdk.dts @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +/include/ "b4420qds.dts" diff --git a/arch/powerpc/boot/dts/fsl/b4860qds-sdk.dts b/arch/powerpc/boot/dts/fsl/b4860qds-sdk.dts new file mode 100644 index 000000000000..d708f9b85997 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/b4860qds-sdk.dts @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +/include/ "b4860qds.dts" diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi index 4f044b41a776..fb3200b006ad 100644 --- a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi @@ -50,7 +50,7 @@ &ifc { #address-cells = <2>; #size-cells = <1>; - compatible = "fsl,ifc", "simple-bus"; + compatible = "fsl,ifc"; interrupts = <25 2 0 0>; }; diff --git a/arch/powerpc/boot/dts/fsl/bsc9131rdb.dts b/arch/powerpc/boot/dts/fsl/bsc9131rdb.dts index 8da984251abc..0ba86a6dce1b 100644 --- a/arch/powerpc/boot/dts/fsl/bsc9131rdb.dts +++ b/arch/powerpc/boot/dts/fsl/bsc9131rdb.dts @@ -15,7 +15,7 @@ device_type = "memory"; }; - board_ifc: ifc: ifc@ff71e000 { + board_ifc: ifc: memory-controller@ff71e000 { /* NAND Flash on board */ ranges = <0x0 0x0 0x0 0xff800000 0x00004000>; reg = <0x0 0xff71e000 0x0 0x2000>; diff --git a/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi b/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi index 2a677fd323eb..5c53cee8755f 100644 --- a/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi @@ -35,7 +35,7 @@ &ifc { #address-cells = <2>; #size-cells = <1>; - compatible = "fsl,ifc", "simple-bus"; + compatible = "fsl,ifc"; interrupts = <16 2 0 0 20 2 0 0>; }; diff --git a/arch/powerpc/boot/dts/fsl/bsc9132qds.dts b/arch/powerpc/boot/dts/fsl/bsc9132qds.dts index 7cb2158dfe58..ce642e879a1b 100644 --- a/arch/powerpc/boot/dts/fsl/bsc9132qds.dts +++ b/arch/powerpc/boot/dts/fsl/bsc9132qds.dts @@ -15,7 +15,7 @@ device_type = "memory"; }; - ifc: ifc@ff71e000 { + ifc: memory-controller@ff71e000 { /* NOR, NAND Flash on board */ ranges = <0x0 0x0 0x0 0x88000000 0x08000000 0x1 0x0 0x0 0xff800000 0x00010000>; diff --git a/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi b/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi index b8e0edd1ac69..4da451e000d9 100644 --- a/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi @@ -35,7 +35,7 @@ &ifc { #address-cells = <2>; #size-cells = <1>; - compatible = "fsl,ifc", "simple-bus"; + compatible = "fsl,ifc"; /* FIXME: Test whether interrupts are split */ interrupts = <16 2 0 0 20 2 0 0>; }; diff --git a/arch/powerpc/boot/dts/fsl/c293pcie.dts b/arch/powerpc/boot/dts/fsl/c293pcie.dts index 5e905e0857cf..e2fdac2ed420 100644 --- a/arch/powerpc/boot/dts/fsl/c293pcie.dts +++ b/arch/powerpc/boot/dts/fsl/c293pcie.dts @@ -42,7 +42,7 @@ device_type = "memory"; }; - ifc: ifc@fffe1e000 { + ifc: memory-controller@fffe1e000 { reg = <0xf 0xffe1e000 0 0x2000>; ranges = <0x0 0x0 0xf 0xec000000 0x04000000 0x1 0x0 0xf 0xff800000 0x00010000 diff --git a/arch/powerpc/boot/dts/fsl/c293si-post.dtsi b/arch/powerpc/boot/dts/fsl/c293si-post.dtsi index bec0fc36849d..ee3b45806ee3 100644 --- a/arch/powerpc/boot/dts/fsl/c293si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/c293si-post.dtsi @@ -35,7 +35,7 @@ &ifc { #address-cells = <2>; #size-cells = <1>; - compatible = "fsl,ifc", "simple-bus"; + compatible = "fsl,ifc"; interrupts = <19 2 0 0>; }; diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi index 41935709ebe8..fba40a1bccc0 100644 --- a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi @@ -199,6 +199,10 @@ /include/ "pq3-dma-0.dtsi" /include/ "pq3-etsec1-0.dtsi" + enet0: ethernet@24000 { + fsl,wake-on-filer; + fsl,pmc-handle = <&etsec1_clk>; + }; /include/ "pq3-etsec1-timer-0.dtsi" usb@22000 { @@ -222,9 +226,10 @@ }; /include/ "pq3-etsec1-2.dtsi" - - ethernet@26000 { + enet2: ethernet@26000 { cell-index = <1>; + fsl,wake-on-filer; + fsl,pmc-handle = <&etsec3_clk>; }; usb@2b000 { @@ -249,4 +254,9 @@ reg = <0xe0000 0x1000>; fsl,has-rstcr; }; + +/include/ "pq3-power.dtsi" + power@e0070 { + compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc"; + }; }; diff --git a/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi index b68eb119faef..ea7416af7ee3 100644 --- a/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi @@ -188,4 +188,6 @@ reg = <0xe0000 0x1000>; fsl,has-rstcr; }; + +/include/ "pq3-power.dtsi" }; diff --git a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi index 579d76cb8e32..dddb7374508d 100644 --- a/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/mpc8548si-post.dtsi @@ -156,4 +156,6 @@ reg = <0xe0000 0x1000>; fsl,has-rstcr; }; + +/include/ "pq3-power.dtsi" }; diff --git a/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi index 49294cf36b4e..40a6cff77032 100644 --- a/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/mpc8572si-post.dtsi @@ -193,4 +193,6 @@ reg = <0xe0000 0x1000>; fsl,has-rstcr; }; + +/include/ "pq3-power.dtsi" }; diff --git a/arch/powerpc/boot/dts/fsl/p1010rdb-pb.dts b/arch/powerpc/boot/dts/fsl/p1010rdb-pb.dts index 3a94acbb3c03..ce3346d77858 100644 --- a/arch/powerpc/boot/dts/fsl/p1010rdb-pb.dts +++ b/arch/powerpc/boot/dts/fsl/p1010rdb-pb.dts @@ -29,3 +29,19 @@ }; /include/ "p1010si-post.dtsi" + +&pci0 { + pcie@0 { + interrupt-map = < + /* IDSEL 0x0 */ + /* + *irq[4:5] are active-high + *irq[6:7] are active-low + */ + 0000 0x0 0x0 0x1 &mpic 0x4 0x2 0x0 0x0 + 0000 0x0 0x0 0x2 &mpic 0x5 0x2 0x0 0x0 + 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 + 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 + >; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/p1010rdb-pb_36b.dts b/arch/powerpc/boot/dts/fsl/p1010rdb-pb_36b.dts index 4cf255fedc96..83590354f9a0 100644 --- a/arch/powerpc/boot/dts/fsl/p1010rdb-pb_36b.dts +++ b/arch/powerpc/boot/dts/fsl/p1010rdb-pb_36b.dts @@ -56,3 +56,19 @@ }; /include/ "p1010si-post.dtsi" + +&pci0 { + pcie@0 { + interrupt-map = < + /* IDSEL 0x0 */ + /* + *irq[4:5] are active-high + *irq[6:7] are active-low + */ + 0000 0x0 0x0 0x1 &mpic 0x4 0x2 0x0 0x0 + 0000 0x0 0x0 0x2 &mpic 0x5 0x2 0x0 0x0 + 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 + 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 + >; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/p1010rdb.dtsi b/arch/powerpc/boot/dts/fsl/p1010rdb.dtsi index 2ca9cee2ddeb..ef49a7d6c69d 100644 --- a/arch/powerpc/boot/dts/fsl/p1010rdb.dtsi +++ b/arch/powerpc/boot/dts/fsl/p1010rdb.dtsi @@ -215,19 +215,3 @@ phy-connection-type = "sgmii"; }; }; - -&pci0 { - pcie@0 { - interrupt-map = < - /* IDSEL 0x0 */ - /* - *irq[4:5] are active-high - *irq[6:7] are active-low - */ - 0000 0x0 0x0 0x1 &mpic 0x4 0x2 0x0 0x0 - 0000 0x0 0x0 0x2 &mpic 0x5 0x2 0x0 0x0 - 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 - 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 - >; - }; -}; diff --git a/arch/powerpc/boot/dts/fsl/p1010rdb_32b.dtsi b/arch/powerpc/boot/dts/fsl/p1010rdb_32b.dtsi index fdc19aab2f70..583a6cd05079 100644 --- a/arch/powerpc/boot/dts/fsl/p1010rdb_32b.dtsi +++ b/arch/powerpc/boot/dts/fsl/p1010rdb_32b.dtsi @@ -36,7 +36,7 @@ memory { device_type = "memory"; }; -board_ifc: ifc: ifc@ffe1e000 { +board_ifc: ifc: memory-controller@ffe1e000 { /* NOR, NAND Flashes and CPLD on board */ ranges = <0x0 0x0 0x0 0xee000000 0x02000000 0x1 0x0 0x0 0xff800000 0x00010000 diff --git a/arch/powerpc/boot/dts/fsl/p1010rdb_36b.dtsi b/arch/powerpc/boot/dts/fsl/p1010rdb_36b.dtsi index de2fceed4f79..4d41efe0038f 100644 --- a/arch/powerpc/boot/dts/fsl/p1010rdb_36b.dtsi +++ b/arch/powerpc/boot/dts/fsl/p1010rdb_36b.dtsi @@ -36,7 +36,7 @@ memory { device_type = "memory"; }; -board_ifc: ifc: ifc@fffe1e000 { +board_ifc: ifc: memory-controller@fffe1e000 { /* NOR, NAND Flashes and CPLD on board */ ranges = <0x0 0x0 0xf 0xee000000 0x02000000 0x1 0x0 0xf 0xff800000 0x00010000 diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi index ccda0a91abf0..2d2550729dcc 100644 --- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi @@ -35,7 +35,7 @@ &ifc { #address-cells = <2>; #size-cells = <1>; - compatible = "fsl,ifc", "simple-bus"; + compatible = "fsl,ifc"; interrupts = <16 2 0 0 19 2 0 0>; }; @@ -183,9 +183,23 @@ /include/ "pq3-etsec2-1.dtsi" /include/ "pq3-etsec2-2.dtsi" + enet0: ethernet@b0000 { + fsl,pmc-handle = <&etsec1_clk>; + }; + + enet1: ethernet@b1000 { + fsl,pmc-handle = <&etsec2_clk>; + }; + + enet2: ethernet@b2000 { + fsl,pmc-handle = <&etsec3_clk>; + }; + global-utilities@e0000 { compatible = "fsl,p1010-guts"; reg = <0xe0000 0x1000>; fsl,has-rstcr; }; + +/include/ "pq3-power.dtsi" }; diff --git a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi index 642dc3a83d0e..cc4c7461003b 100644 --- a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi @@ -163,14 +163,17 @@ /include/ "pq3-etsec2-0.dtsi" enet0: enet0_grp2: ethernet@b0000 { + fsl,pmc-handle = <&etsec1_clk>; }; /include/ "pq3-etsec2-1.dtsi" enet1: enet1_grp2: ethernet@b1000 { + fsl,pmc-handle = <&etsec2_clk>; }; /include/ "pq3-etsec2-2.dtsi" enet2: enet2_grp2: ethernet@b2000 { + fsl,pmc-handle = <&etsec3_clk>; }; global-utilities@e0000 { @@ -178,6 +181,8 @@ reg = <0xe0000 0x1000>; fsl,has-rstcr; }; + +/include/ "pq3-power.dtsi" }; /include/ "pq3-etsec2-grp2-0.dtsi" diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi index 407cb5fd0f5b..378195db9fca 100644 --- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi @@ -159,14 +159,17 @@ /include/ "pq3-etsec2-0.dtsi" enet0: enet0_grp2: ethernet@b0000 { + fsl,pmc-handle = <&etsec1_clk>; }; /include/ "pq3-etsec2-1.dtsi" enet1: enet1_grp2: ethernet@b1000 { + fsl,pmc-handle = <&etsec2_clk>; }; /include/ "pq3-etsec2-2.dtsi" enet2: enet2_grp2: ethernet@b2000 { + fsl,pmc-handle = <&etsec3_clk>; }; global-utilities@e0000 { @@ -174,6 +177,8 @@ reg = <0xe0000 0x1000>; fsl,has-rstcr; }; + +/include/ "pq3-power.dtsi" }; &qe { diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi index 5f51b7bfc064..6ac21e81344a 100644 --- a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi @@ -225,11 +225,13 @@ /include/ "pq3-etsec2-0.dtsi" enet0: enet0_grp2: ethernet@b0000 { fsl,wake-on-filer; + fsl,pmc-handle = <&etsec1_clk>; }; /include/ "pq3-etsec2-1.dtsi" enet1: enet1_grp2: ethernet@b1000 { fsl,wake-on-filer; + fsl,pmc-handle = <&etsec2_clk>; }; global-utilities@e0000 { @@ -238,9 +240,10 @@ fsl,has-rstcr; }; - power@e0070{ - compatible = "fsl,mpc8536-pmc", "fsl,mpc8548-pmc"; - reg = <0xe0070 0x20>; +/include/ "pq3-power.dtsi" + power@e0070 { + compatible = "fsl,p1022-pmc", "fsl,mpc8536-pmc", + "fsl,mpc8548-pmc"; }; }; diff --git a/arch/powerpc/boot/dts/fsl/p1023rdb-sdk.dts b/arch/powerpc/boot/dts/fsl/p1023rdb-sdk.dts new file mode 100644 index 000000000000..85ccbfc9dc89 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/p1023rdb-sdk.dts @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +/include/ "p1023rdb.dts" + +&soc { + fman0: fman@100000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <0>; + compatible = "fsl,fman", "simple-bus"; + ranges = <0 0x100000 0x100000>; + reg = <0x100000 0x100000>; + clock-frequency = <0>; + interrupts = < + 24 2 0 0 + 16 2 0 0>; + cc@0 { + compatible = "fsl,fman-cc"; + }; + muram@0 { + compatible = "fsl,fman-muram"; + reg = <0x0 0x10000>; + }; + bmi@80000 { + compatible = "fsl,fman-bmi"; + reg = <0x80000 0x400>; + }; + qmi@80400 { + compatible = "fsl,fman-qmi"; + reg = <0x80400 0x400>; + }; + policer@c0000 { + compatible = "fsl,fman-policer"; + reg = <0xc0000 0x1000>; + }; + keygen@c1000 { + compatible = "fsl,fman-keygen"; + reg = <0xc1000 0x1000>; + }; + dma@c2000 { + compatible = "fsl,fman-dma"; + reg = <0xc2000 0x1000>; + }; + fpm@c3000 { + compatible = "fsl,fman-fpm"; + reg = <0xc3000 0x1000>; + }; + parser@c7000 { + compatible = "fsl,fman-parser"; + reg = <0xc7000 0x1000>; + }; + fman0_rx0: port@88000 { + cell-index = <0>; + compatible = "fsl,fman-port-1g-rx"; + reg = <0x88000 0x1000>; + }; + fman0_rx1: port@89000 { + cell-index = <1>; + compatible = "fsl,fman-port-1g-rx"; + reg = <0x89000 0x1000>; + }; + fman0_tx0: port@a8000 { + cell-index = <0>; + compatible = "fsl,fman-port-1g-tx"; + reg = <0xa8000 0x1000>; + fsl,qman-channel-id = <0x40>; + }; + fman0_tx1: port@a9000 { + cell-index = <1>; + compatible = "fsl,fman-port-1g-tx"; + reg = <0xa9000 0x1000>; + fsl,qman-channel-id = <0x41>; + }; + fman0_oh1: port@82000 { + cell-index = <1>; + compatible = "fsl,fman-port-oh"; + reg = <0x82000 0x1000>; + fsl,qman-channel-id = <0x43>; + }; + fman0_oh2: port@83000 { + cell-index = <2>; + compatible = "fsl,fman-port-oh"; + reg = <0x83000 0x1000>; + fsl,qman-channel-id = <0x44>; + }; + fman0_oh3: port@84000 { + cell-index = <3>; + compatible = "fsl,fman-port-oh"; + reg = <0x84000 0x1000>; + fsl,qman-channel-id = <0x45>; + }; + fman0_oh4: port@85000 { + cell-index = <4>; + compatible = "fsl,fman-port-oh"; + reg = <0x85000 0x1000>; + fsl,qman-channel-id = <0x46>; + }; + enet0: ethernet@e0000 { + cell-index = <0>; + compatible = "fsl,fman-dtsec"; + reg = <0xe0000 0x1000>; + fsl,port-handles = <&fman0_rx0 &fman0_tx0>; + }; + enet1: ethernet@e2000 { + cell-index = <1>; + compatible = "fsl,fman-dtsec"; + reg = <0xe2000 0x1000>; + fsl,port-handles = <&fman0_rx1 &fman0_tx1>; + }; + mdio0: mdio@e1120 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,fman-mdio"; + reg = <0xe1120 0xee0>; + interrupts = <26 1 0 0>; + }; + }; +}; + +&bportals { + compatible = "fsl,bpid-range"; + fsl,bpid-range = <32 32>; +}; diff --git a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi index 884e01bcb243..2c4787cbf395 100644 --- a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi @@ -175,6 +175,10 @@ compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr"; }; /include/ "pq3-etsec1-0.dtsi" + enet0: ethernet@24000 { + fsl,pmc-handle = <&etsec1_clk>; + + }; /include/ "pq3-etsec1-timer-0.dtsi" ptp_clock@24e00 { @@ -183,7 +187,15 @@ /include/ "pq3-etsec1-1.dtsi" + enet1: ethernet@25000 { + fsl,pmc-handle = <&etsec2_clk>; + }; + /include/ "pq3-etsec1-2.dtsi" + enet2: ethernet@26000 { + fsl,pmc-handle = <&etsec3_clk>; + }; + /include/ "pq3-esdhc-0.dtsi" sdhc@2e000 { compatible = "fsl,p2020-esdhc", "fsl,esdhc"; @@ -198,4 +210,6 @@ reg = <0xe0000 0x1000>; fsl,has-rstcr; }; + +/include/ "pq3-power.dtsi" }; diff --git a/arch/powerpc/boot/dts/fsl/p2041rdb-sdk.dts b/arch/powerpc/boot/dts/fsl/p2041rdb-sdk.dts new file mode 100644 index 000000000000..4c8371b316a8 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/p2041rdb-sdk.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +/include/ "p2041rdb.dts" + +/include/ "qoriq-fman-0-sdk.dtsi" +/include/ "qoriq-dpaa-eth.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman1-portals-sdk.dtsi" diff --git a/arch/powerpc/boot/dts/fsl/p3041ds-sdk.dts b/arch/powerpc/boot/dts/fsl/p3041ds-sdk.dts new file mode 100644 index 000000000000..6f473416a51b --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/p3041ds-sdk.dts @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +/include/ "p3041ds.dts" + +/include/ "qoriq-fman-0-sdk.dtsi" +/include/ "qoriq-dpaa-eth.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman1-portals-sdk.dtsi" + +&soc { + fsldpaa: fsl,dpaa { + compatible = "simple-bus", "fsl,dpaa"; + ethernet@2 { + status = "disabled"; + }; + }; +}; + diff --git a/arch/powerpc/boot/dts/fsl/p4080ds-sdk.dts b/arch/powerpc/boot/dts/fsl/p4080ds-sdk.dts new file mode 100644 index 000000000000..6b2dbfc1e08b --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/p4080ds-sdk.dts @@ -0,0 +1,74 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +/include/ "p4080ds.dts" + +/ { + + aliases { + phy_rgmii = &phyrgmii; + phy5_slot3 = &phy5slot3; + phy6_slot3 = &phy6slot3; + phy7_slot3 = &phy7slot3; + phy8_slot3 = &phy8slot3; + emi1_slot3 = &p4080mdio2; + emi1_slot4 = &p4080mdio1; + emi1_slot5 = &p4080mdio3; + emi1_rgmii = &p4080mdio0; + emi2_slot4 = &p4080xmdio1; + emi2_slot5 = &p4080xmdio3; + }; +}; + +/include/ "qoriq-fman-0-sdk.dtsi" +/include/ "qoriq-fman-1-sdk.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman1-portals-sdk.dtsi" + +&soc { + fsldpaa: fsl,dpaa { + compatible = "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + ethernet@4 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet4>; + }; + ethernet@5 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet5>; + }; + ethernet@6 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet6>; + }; + ethernet@7 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet7>; + }; + ethernet@8 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet8>; + }; + ethernet@9 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet9>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/p5020ds-sdk.dts b/arch/powerpc/boot/dts/fsl/p5020ds-sdk.dts new file mode 100644 index 000000000000..42240a85054d --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/p5020ds-sdk.dts @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +/include/ "p5020ds.dts" + +/include/ "qoriq-fman-0-sdk.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman1-portals-sdk.dtsi" + +&soc { + fsldpaa: fsl,dpaa { + compatible = "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + status = "disabled"; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + ethernet@4 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet4>; + }; + ethernet@5 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet5>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/p5040ds-sdk.dts b/arch/powerpc/boot/dts/fsl/p5040ds-sdk.dts new file mode 100644 index 000000000000..d5af499a1962 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/p5040ds-sdk.dts @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +/include/ "p5040ds.dts" + +/include/ "qoriq-fman-0-sdk.dtsi" +/include/ "qoriq-fman-1-sdk.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman1-portals-sdk.dtsi" + +&soc { + fsldpaa: fsl,dpaa { + compatible = "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + status = "disabled"; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + ethernet@4 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet4>; + }; + ethernet@5 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet5>; + }; + ethernet@6 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet6>; + status = "disabled"; + }; + ethernet@7 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet7>; + }; + ethernet@8 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet8>; + }; + ethernet@9 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet9>; + }; + ethernet@10 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet10>; + }; + ethernet@11 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet11>; + }; + }; +}; + diff --git a/arch/powerpc/boot/dts/fsl/pq3-power.dtsi b/arch/powerpc/boot/dts/fsl/pq3-power.dtsi new file mode 100644 index 000000000000..5a760b3855bc --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/pq3-power.dtsi @@ -0,0 +1,48 @@ +/* + * PQ3 Power Management device tree stub + * + * Copyright 2012-2013 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +power@e0070 { + compatible = "fsl,mpc8548-pmc"; + reg = <0xe0070 0x20>; + + etsec1_clk: soc-clk@24 { + fsl,pmcdr-mask = <0x00000080>; + }; + etsec2_clk: soc-clk@25 { + fsl,pmcdr-mask = <0x00000040>; + }; + etsec3_clk: soc-clk@26 { + fsl,pmcdr-mask = <0x00000020>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-bman-portals-sdk.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-bman-portals-sdk.dtsi new file mode 100644 index 000000000000..130393056e1c --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/qoriq-bman-portals-sdk.dtsi @@ -0,0 +1,80 @@ +/* + * QorIQ BMan Portal device tree stub for 10 portals + * + * Copyright 2011 - 2014 Freescale Semiconductor Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +&bportals { + bman-portal@0 { + cell-index = <0>; + }; + + bman-portal@4000 { + cell-index = <1>; + }; + + bman-portal@8000 { + cell-index = <2>; + }; + + bman-portal@c000 { + cell-index = <3>; + }; + + bman-portal@10000 { + cell-index = <4>; + }; + + bman-portal@14000 { + cell-index = <5>; + }; + + bman-portal@18000 { + cell-index = <6>; + }; + + bman-portal@1c000 { + cell-index = <7>; + }; + + bman-portal@20000 { + cell-index = <8>; + }; + + bman-portal@24000 { + cell-index = <9>; + }; + + bman-bpids@0 { + compatible = "fsl,bpid-range"; + fsl,bpid-range = <32 32>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-dpaa-eth.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-dpaa-eth.dtsi new file mode 100644 index 000000000000..d12b19191030 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/qoriq-dpaa-eth.dtsi @@ -0,0 +1,62 @@ +/* + * Copyright 2012 - 2015 Freescale Semiconductor Inc. + * Copyright 2017 NXP + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +&soc { + fsldpaa: fsl,dpaa { + compatible = "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + ethernet@4 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet4>; + }; + ethernet@5 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet5>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi index eb77675c255a..29c4c8349890 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi @@ -35,13 +35,13 @@ fman@400000 { fman0_rx_0x10: port@90000 { cell-index = <0x10>; - compatible = "fsl,fman-v2-port-rx"; + compatible = "fsl,fman-v2-port-rx","fsl,fman-port-10g-rx"; reg = <0x90000 0x1000>; }; fman0_tx_0x30: port@b0000 { cell-index = <0x30>; - compatible = "fsl,fman-v2-port-tx"; + compatible = "fsl,fman-v2-port-tx","fsl,fman-port-10g-tx"; reg = <0xb0000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi index b965bc219bae..f8f44eb639fe 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi @@ -35,13 +35,13 @@ fman@400000 { fman0_rx_0x08: port@88000 { cell-index = <0x8>; - compatible = "fsl,fman-v2-port-rx"; + compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; reg = <0x88000 0x1000>; }; fman0_tx_0x28: port@a8000 { cell-index = <0x28>; - compatible = "fsl,fman-v2-port-tx"; + compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; reg = <0xa8000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi index 9eb6e6dd7cf9..4e55ac7b0e34 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi @@ -35,13 +35,13 @@ fman@400000 { fman0_rx_0x09: port@89000 { cell-index = <0x9>; - compatible = "fsl,fman-v2-port-rx"; + compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; reg = <0x89000 0x1000>; }; fman0_tx_0x29: port@a9000 { cell-index = <0x29>; - compatible = "fsl,fman-v2-port-tx"; + compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; reg = <0xa9000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi index 092b89936743..4c537954bfbb 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi @@ -35,13 +35,13 @@ fman@400000 { fman0_rx_0x0a: port@8a000 { cell-index = <0xa>; - compatible = "fsl,fman-v2-port-rx"; + compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; reg = <0x8a000 0x1000>; }; fman0_tx_0x2a: port@aa000 { cell-index = <0x2a>; - compatible = "fsl,fman-v2-port-tx"; + compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; reg = <0xaa000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi index 2df0dc876045..1d458ed65c68 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi @@ -35,13 +35,13 @@ fman@400000 { fman0_rx_0x0b: port@8b000 { cell-index = <0xb>; - compatible = "fsl,fman-v2-port-rx"; + compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; reg = <0x8b000 0x1000>; }; fman0_tx_0x2b: port@ab000 { cell-index = <0x2b>; - compatible = "fsl,fman-v2-port-tx"; + compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; reg = <0xab000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi index 5fceb2438fdc..e2f4dc73e42e 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi @@ -35,13 +35,13 @@ fman@400000 { fman0_rx_0x0c: port@8c000 { cell-index = <0xc>; - compatible = "fsl,fman-v2-port-rx"; + compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; reg = <0x8c000 0x1000>; }; fman0_tx_0x2c: port@ac000 { cell-index = <0x2c>; - compatible = "fsl,fman-v2-port-tx"; + compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; reg = <0xac000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-chosen-fifo-resize.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-chosen-fifo-resize.dtsi new file mode 100644 index 000000000000..8dd3a99cae73 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-chosen-fifo-resize.dtsi @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2018 NXP + */ + +/ { + chosen { + name = "chosen"; + dpaa-extended-args { + fman0-extd-args { + cell-index = <0>; + compatible = "fsl,fman-extended-args"; + total-fifo-size = <0x27000>; + fman0_oh1-extd-args { + cell-index = <1>; + compatible = "fsl,fman-port-op-extended-args"; + fifo-size = <0x800 0x0>; + num-dmas = <0x1 0x1>; + num-tnums = <0x1 0x4>; + }; + fman0_rx0-extd-args { + cell-index = <0>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + fifo-size = <0x2f00 0x2000>; + num-dmas = <0x1 0x1>; + num-tnums = <0x4 0x4>; + }; + fman0_tx0-extd-args { + cell-index = <0>; + compatible = "fsl,fman-port-1g-tx-extended-args"; + fifo-size = <0x2c00 0x0>; + num-dmas = <0x1 0x0>; + num-tnums = <0x4 0x4>; + }; + fman0_rx1-extd-args { + cell-index = <1>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + fifo-size = <0x2f00 0x2000>; + num-dmas = <0x1 0x1>; + num-tnums = <0x4 0x4>; + }; + fman0_tx1-extd-args { + cell-index = <1>; + compatible = "fsl,fman-port-1g-tx-extended-args"; + fifo-size = <0x2c00 0x0>; + num-dmas = <0x1 0x0>; + num-tnums = <0x4 0x4>; + }; + fman0_rx2-extd-args { + cell-index = <2>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + fifo-size = <0x2f00 0x2000>; + num-dmas = <0x1 0x1>; + num-tnums = <0x4 0x4>; + }; + fman0_tx2-extd-args { + cell-index = <2>; + compatible = "fsl,fman-port-1g-tx-extended-args"; + fifo-size = <0x2c00 0x0>; + num-dmas = <0x1 0x0>; + num-tnums = <0x4 0x4>; + }; + fman0_rx3-extd-args { + cell-index = <3>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + fifo-size = <0x2f00 0x2000>; + num-dmas = <0x1 0x1>; + num-tnums = <0x4 0x4>; + }; + fman0_tx3-extd-args { + cell-index = <3>; + compatible = "fsl,fman-port-1g-tx-extended-args"; + fifo-size = <0x2c00 0x0>; + num-dmas = <0x1 0x0>; + num-tnums = <0x4 0x4>; + }; + fman0_rx4-extd-args { + cell-index = <4>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + fifo-size = <0x2f00 0x2000>; + num-dmas = <0x1 0x1>; + num-tnums = <0x4 0x4>; + }; + fman0_tx4-extd-args { + cell-index = <4>; + compatible = "fsl,fman-port-1g-tx-extended-args"; + fifo-size = <0x2c00 0x0>; + num-dmas = <0x1 0x0>; + num-tnums = <0x4 0x4>; + }; + fman0_rx8-extd-args { + cell-index = <0>; + compatible = "fsl,fman-port-10g-rx-extended-args"; + fifo-size = <0x7000 0x3000>; + num-dmas = <0x8 0x8>; + num-tnums = <0x10 0x8>; + }; + fman0_tx8-extd-args { + cell-index = <0>; + compatible = "fsl,fman-port-10g-tx-extended-args"; + fifo-size = <0x4000 0x0>; + num-dmas = <0x8 0x0>; + num-tnums = <0x10 0x8>; + }; + }; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-sdk.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-sdk.dtsi new file mode 100644 index 000000000000..41bf8dee7b5a --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-sdk.dtsi @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +&fman0 { + compatible = "fsl,fman", "simple-bus"; + + /* tx - 1g - 0 */ + port@a8000 { + fsl,qman-channel-id = <0x41>; + }; + /* tx - 1g - 1 */ + port@a9000 { + fsl,qman-channel-id = <0x42>; + }; + /* tx - 1g - 2 */ + port@aa000 { + fsl,qman-channel-id = <0x43>; + }; + /* tx - 1g - 3 */ + port@ab000 { + fsl,qman-channel-id = <0x44>; + }; + /* tx - 1g - 4 */ + port@ac000 { + fsl,qman-channel-id = <0x45>; + }; + /* tx - 10g - 0 */ + port@b0000 { + fsl,qman-channel-id = <0x40>; + }; + /* offline 0 */ + port@81000 { + fsl,qman-channel-id = <0x46>; + }; + /* offline 1 */ + port@82000 { + fsl,qman-channel-id = <0x47>; + }; + /* offline 2 */ + port@83000 { + fsl,qman-channel-id = <0x48>; + }; + /* offline 3 */ + port@84000 { + fsl,qman-channel-id = <0x49>; + }; + /* offline 4 */ + port@85000 { + fsl,qman-channel-id = <0x4a>; + }; + /* offline 5 */ + port@86000 { + fsl,qman-channel-id = <0x4b>; + }; + + policer@c0000 { + compatible = "fsl,fman-policer"; + reg = <0xc0000 0x1000>; + }; + + keygen@c1000 { + compatible = "fsl,fman-keygen"; + reg = <0xc1000 0x1000>; + }; + + dma@c2000 { + compatible = "fsl,fman-dma"; + reg = <0xc2000 0x1000>; + }; + + fpm@c3000 { + compatible = "fsl,fman-fpm"; + reg = <0xc3000 0x1000>; + }; + + parser@c7000 { + compatible = "fsl,fman-parser"; + reg = <0xc7000 0x1000>; + }; +}; + diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi index 83ae87b69d92..3e2ef2b10414 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi @@ -35,13 +35,13 @@ fman@500000 { fman1_rx_0x10: port@90000 { cell-index = <0x10>; - compatible = "fsl,fman-v2-port-rx"; + compatible = "fsl,fman-v2-port-rx","fsl,fman-port-10g-rx"; reg = <0x90000 0x1000>; }; fman1_tx_0x30: port@b0000 { cell-index = <0x30>; - compatible = "fsl,fman-v2-port-tx"; + compatible = "fsl,fman-v2-port-tx","fsl,fman-port-10g-tx"; reg = <0xb0000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi index b0f0e36a4eac..8b41c39af8c1 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi @@ -35,13 +35,13 @@ fman@500000 { fman1_rx_0x08: port@88000 { cell-index = <0x8>; - compatible = "fsl,fman-v2-port-rx"; + compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; reg = <0x88000 0x1000>; }; fman1_tx_0x28: port@a8000 { cell-index = <0x28>; - compatible = "fsl,fman-v2-port-tx"; + compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; reg = <0xa8000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi index a3a79f8552a3..91dad61ba25c 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi @@ -35,13 +35,13 @@ fman@500000 { fman1_rx_0x09: port@89000 { cell-index = <0x9>; - compatible = "fsl,fman-v2-port-rx"; + compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; reg = <0x89000 0x1000>; }; fman1_tx_0x29: port@a9000 { cell-index = <0x29>; - compatible = "fsl,fman-v2-port-tx"; + compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; reg = <0xa9000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi index 96a69a84b8a8..26ed88f2f741 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi @@ -35,13 +35,13 @@ fman@500000 { fman1_rx_0x0a: port@8a000 { cell-index = <0xa>; - compatible = "fsl,fman-v2-port-rx"; + compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; reg = <0x8a000 0x1000>; }; fman1_tx_0x2a: port@aa000 { cell-index = <0x2a>; - compatible = "fsl,fman-v2-port-tx"; + compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; reg = <0xaa000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi index 7405d1940133..dd708f384219 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi @@ -35,13 +35,13 @@ fman@500000 { fman1_rx_0x0b: port@8b000 { cell-index = <0xb>; - compatible = "fsl,fman-v2-port-rx"; + compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; reg = <0x8b000 0x1000>; }; fman1_tx_0x2b: port@ab000 { cell-index = <0x2b>; - compatible = "fsl,fman-v2-port-tx"; + compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; reg = <0xab000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi index f49ad69e5212..0c6aba079e1c 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi @@ -35,13 +35,13 @@ fman@500000 { fman1_rx_0x0c: port@8c000 { cell-index = <0xc>; - compatible = "fsl,fman-v2-port-rx"; + compatible = "fsl,fman-v2-port-rx","fsl,fman-port-1g-rx"; reg = <0x8c000 0x1000>; }; fman1_tx_0x2c: port@ac000 { cell-index = <0x2c>; - compatible = "fsl,fman-v2-port-tx"; + compatible = "fsl,fman-v2-port-tx","fsl,fman-port-1g-tx"; reg = <0xac000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-chosen-fifo-resize.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-chosen-fifo-resize.dtsi new file mode 100644 index 000000000000..122a59be5cac --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-chosen-fifo-resize.dtsi @@ -0,0 +1,108 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2018 NXP + */ + +/ { + chosen { + name = "chosen"; + dpaa-extended-args { + fman1-extd-args { + cell-index = <1>; + compatible = "fsl,fman-extended-args"; + total-fifo-size = <0x27000>; + fman1_oh1-extd-args { + cell-index = <1>; + compatible = "fsl,fman-port-op-extended-args"; + fifo-size = <0x800 0x0>; + num-dmas = <0x1 0x1>; + num-tnums = <0x1 0x4>; + }; + fman1_rx0-extd-args { + cell-index = <0>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + fifo-size = <0x2f00 0x2000>; + num-dmas = <0x1 0x1>; + num-tnums = <0x4 0x4>; + }; + fman1_tx0-extd-args { + cell-index = <0>; + compatible = "fsl,fman-port-1g-tx-extended-args"; + fifo-size = <0x2c00 0x0>; + num-dmas = <0x1 0x0>; + num-tnums = <0x4 0x4>; + }; + fman1_rx1-extd-args { + cell-index = <1>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + fifo-size = <0x2f00 0x2000>; + num-dmas = <0x1 0x1>; + num-tnums = <0x4 0x4>; + }; + fman1_tx1-extd-args { + cell-index = <1>; + compatible = "fsl,fman-port-1g-tx-extended-args"; + fifo-size = <0x2c00 0x0>; + num-dmas = <0x1 0x0>; + num-tnums = <0x4 0x4>; + }; + fman1_rx2-extd-args { + cell-index = <2>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + fifo-size = <0x2f00 0x2000>; + num-dmas = <0x1 0x1>; + num-tnums = <0x4 0x4>; + }; + fman1_tx2-extd-args { + cell-index = <2>; + compatible = "fsl,fman-port-1g-tx-extended-args"; + fifo-size = <0x2c00 0x0>; + num-dmas = <0x1 0x0>; + num-tnums = <0x4 0x4>; + }; + fman1_rx3-extd-args { + cell-index = <3>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + fifo-size = <0x2f00 0x2000>; + num-dmas = <0x1 0x1>; + num-tnums = <0x4 0x4>; + }; + fman1_tx3-extd-args { + cell-index = <3>; + compatible = "fsl,fman-port-1g-tx-extended-args"; + fifo-size = <0x2c00 0x0>; + num-dmas = <0x1 0x0>; + num-tnums = <0x4 0x4>; + }; + fman1_rx4-extd-args { + cell-index = <4>; + compatible = "fsl,fman-port-1g-rx-extended-args"; + fifo-size = <0x2f00 0x2000>; + num-dmas = <0x1 0x1>; + num-tnums = <0x4 0x4>; + }; + fman1_tx4-extd-args { + cell-index = <4>; + compatible = "fsl,fman-port-1g-tx-extended-args"; + fifo-size = <0x2c00 0x0>; + num-dmas = <0x1 0x0>; + num-tnums = <0x4 0x4>; + }; + fman1_rx8-extd-args { + cell-index = <0>; + compatible = "fsl,fman-port-10g-rx-extended-args"; + fifo-size = <0x7000 0x3000>; + num-dmas = <0x8 0x8>; + num-tnums = <0x10 0x8>; + }; + fman1_tx8-extd-args { + cell-index = <0>; + compatible = "fsl,fman-port-10g-tx-extended-args"; + fifo-size = <0x4000 0x0>; + num-dmas = <0x8 0x0>; + num-tnums = <0x10 0x8>; + }; + }; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-sdk.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-sdk.dtsi new file mode 100644 index 000000000000..cba95e0e5ae6 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-sdk.dtsi @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +&fman1 { + compatible = "fsl,fman", "simple-bus"; + + /* tx - 1g - 0 */ + port@a8000 { + fsl,qman-channel-id = <0x61>; + }; + /* tx - 1g - 1 */ + port@a9000 { + fsl,qman-channel-id = <0x62>; + }; + /* tx - 1g - 2 */ + port@aa000 { + fsl,qman-channel-id = <0x63>; + }; + /* tx - 1g - 3 */ + port@ab000 { + fsl,qman-channel-id = <0x64>; + }; + /* tx - 1g - 4 */ + port@ac000 { + fsl,qman-channel-id = <0x65>; + }; + /* tx - 10g - 0 */ + port@b0000 { + fsl,qman-channel-id = <0x60>; + }; + /* offline 0 */ + port@81000 { + fsl,qman-channel-id = <0x66>; + }; + /* offline 1 */ + port@82000 { + fsl,qman-channel-id = <0x67>; + }; + /* offline 2 */ + port@83000 { + fsl,qman-channel-id = <0x68>; + }; + /* offline 3 */ + port@84000 { + fsl,qman-channel-id = <0x69>; + }; + /* offline 4 */ + port@85000 { + fsl,qman-channel-id = <0x6a>; + }; + /* offline 5 */ + port@86000 { + fsl,qman-channel-id = <0x6b>; + }; + + policer@c0000 { + compatible = "fsl,fman-policer"; + reg = <0xc0000 0x1000>; + }; + + keygen@c1000 { + compatible = "fsl,fman-keygen"; + reg = <0xc1000 0x1000>; + }; + + dma@c2000 { + compatible = "fsl,fman-dma"; + reg = <0xc2000 0x1000>; + }; + + fpm@c3000 { + compatible = "fsl,fman-fpm"; + reg = <0xc3000 0x1000>; + }; + + parser@c7000 { + compatible = "fsl,fman-parser"; + reg = <0xc7000 0x1000>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi index baa0c503e741..8c239cd0f1d8 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0-best-effort.dtsi @@ -35,7 +35,7 @@ fman@400000 { fman0_rx_0x08: port@88000 { cell-index = <0x8>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-10g-rx"; reg = <0x88000 0x1000>; fsl,fman-10g-port; fsl,fman-best-effort-port; @@ -43,7 +43,7 @@ fman@400000 { fman0_tx_0x28: port@a8000 { cell-index = <0x28>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-10g-tx"; reg = <0xa8000 0x1000>; fsl,fman-10g-port; fsl,fman-best-effort-port; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi index 93095600e808..f310f4573390 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-0.dtsi @@ -35,14 +35,14 @@ fman@400000 { fman0_rx_0x10: port@90000 { cell-index = <0x10>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx"; reg = <0x90000 0x1000>; fsl,fman-10g-port; }; fman0_tx_0x30: port@b0000 { cell-index = <0x30>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx"; reg = <0xb0000 0x1000>; fsl,fman-10g-port; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi index ff4bd38f0645..5b5307546318 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1-best-effort.dtsi @@ -35,7 +35,7 @@ fman@400000 { fman0_rx_0x09: port@89000 { cell-index = <0x9>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-10g-rx"; reg = <0x89000 0x1000>; fsl,fman-10g-port; fsl,fman-best-effort-port; @@ -43,7 +43,7 @@ fman@400000 { fman0_tx_0x29: port@a9000 { cell-index = <0x29>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-10g-tx"; reg = <0xa9000 0x1000>; fsl,fman-10g-port; fsl,fman-best-effort-port; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi index 1fa38ed6f59e..f42856e56f3e 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-10g-1.dtsi @@ -35,14 +35,14 @@ fman@400000 { fman0_rx_0x11: port@91000 { cell-index = <0x11>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx", "fsl,fman-port-10g-rx"; reg = <0x91000 0x1000>; fsl,fman-10g-port; }; fman0_tx_0x31: port@b1000 { cell-index = <0x31>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx", "fsl,fman-port-10g-tx"; reg = <0xb1000 0x1000>; fsl,fman-10g-port; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi index a8cc9780c0c4..eab7e908a87b 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-0.dtsi @@ -35,13 +35,13 @@ fman@400000 { fman0_rx_0x08: port@88000 { cell-index = <0x8>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; reg = <0x88000 0x1000>; }; fman0_tx_0x28: port@a8000 { cell-index = <0x28>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; reg = <0xa8000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi index 8b8bd70c9382..2e37b6c973b1 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-1.dtsi @@ -35,13 +35,13 @@ fman@400000 { fman0_rx_0x09: port@89000 { cell-index = <0x9>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; reg = <0x89000 0x1000>; }; fman0_tx_0x29: port@a9000 { cell-index = <0x29>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; reg = <0xa9000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi index 619c880b54d8..be3e7c8729f7 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-2.dtsi @@ -35,13 +35,13 @@ fman@400000 { fman0_rx_0x0a: port@8a000 { cell-index = <0xa>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; reg = <0x8a000 0x1000>; }; fman0_tx_0x2a: port@aa000 { cell-index = <0x2a>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; reg = <0xaa000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi index d7ebb73a400d..5fab79e7b345 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-3.dtsi @@ -35,13 +35,13 @@ fman@400000 { fman0_rx_0x0b: port@8b000 { cell-index = <0xb>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; reg = <0x8b000 0x1000>; }; fman0_tx_0x2b: port@ab000 { cell-index = <0x2b>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; reg = <0xab000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi index b151d696a069..7675c7b028fe 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-4.dtsi @@ -35,13 +35,13 @@ fman@400000 { fman0_rx_0x0c: port@8c000 { cell-index = <0xc>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; reg = <0x8c000 0x1000>; }; fman0_tx_0x2c: port@ac000 { cell-index = <0x2c>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; reg = <0xac000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi index adc0ae0013a3..dbab7e1349a0 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-1g-5.dtsi @@ -35,13 +35,13 @@ fman@400000 { fman0_rx_0x0d: port@8d000 { cell-index = <0xd>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; reg = <0x8d000 0x1000>; }; fman0_tx_0x2d: port@ad000 { cell-index = <0x2d>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; reg = <0xad000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-sdk.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-sdk.dtsi new file mode 100644 index 000000000000..a21ae92f7d13 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-0-sdk.dtsi @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +&fman0 { + compatible = "fsl,fman", "simple-bus"; + + /* tx - 10g - 2 */ + port@a8000 { + fsl,qman-channel-id = <0x802>; + }; + /* tx - 10g - 3 */ + port@a9000 { + fsl,qman-channel-id = <0x803>; + }; + /* tx - 1g - 2 */ + port@aa000 { + fsl,qman-channel-id = <0x804>; + }; + /* tx - 1g - 3 */ + port@ab000 { + fsl,qman-channel-id = <0x805>; + }; + /* tx - 1g - 4 */ + port@ac000 { + fsl,qman-channel-id = <0x806>; + }; + /* tx - 1g - 5 */ + port@ad000 { + fsl,qman-channel-id = <0x807>; + }; + /* tx - 10g - 0 */ + port@b0000 { + fsl,qman-channel-id = <0x800>; + }; + /* tx - 10g - 1 */ + port@b1000 { + fsl,qman-channel-id = <0x801>; + }; + /* offline - 1 */ + port@82000 { + fsl,qman-channel-id = <0x809>; + }; + /* offline - 2 */ + port@83000 { + fsl,qman-channel-id = <0x80a>; + }; + /* offline - 3 */ + port@84000 { + fsl,qman-channel-id = <0x80b>; + }; + /* offline - 4 */ + port@85000 { + fsl,qman-channel-id = <0x80c>; + }; + /* offline - 5 */ + port@86000 { + fsl,qman-channel-id = <0x80d>; + }; + /* offline - 6 */ + port@87000 { + fsl,qman-channel-id = <0x80e>; + }; + + policer@c0000 { + compatible = "fsl,fman-policer"; + reg = <0xc0000 0x1000>; + }; + + keygen@c1000 { + compatible = "fsl,fman-keygen"; + reg = <0xc1000 0x1000>; + }; + + dma@c2000 { + compatible = "fsl,fman-dma"; + reg = <0xc2000 0x1000>; + }; + + fpm@c3000 { + compatible = "fsl,fman-fpm"; + reg = <0xc3000 0x1000>; + }; + + parser@c7000 { + compatible = "fsl,fman-parser"; + reg = <0xc7000 0x1000>; + }; + + vsps@dc000 { + compatible = "fsl,fman-vsps"; + reg = <0xdc000 0x1000>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi index 435047e0e250..58780bb2db13 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-0.dtsi @@ -35,14 +35,14 @@ fman@500000 { fman1_rx_0x10: port@90000 { cell-index = <0x10>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-10g-rx"; reg = <0x90000 0x1000>; fsl,fman-10g-port; }; fman1_tx_0x30: port@b0000 { cell-index = <0x30>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-10g-tx"; reg = <0xb0000 0x1000>; fsl,fman-10g-port; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi index c098657cca0a..0da76c16acf3 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-10g-1.dtsi @@ -35,14 +35,14 @@ fman@500000 { fman1_rx_0x11: port@91000 { cell-index = <0x11>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-10g-rx"; reg = <0x91000 0x1000>; fsl,fman-10g-port; }; fman1_tx_0x31: port@b1000 { cell-index = <0x31>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-10g-tx"; reg = <0xb1000 0x1000>; fsl,fman-10g-port; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi index 9d06824815f3..e1d7067b1b58 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-0.dtsi @@ -35,13 +35,13 @@ fman@500000 { fman1_rx_0x08: port@88000 { cell-index = <0x8>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; reg = <0x88000 0x1000>; }; fman1_tx_0x28: port@a8000 { cell-index = <0x28>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; reg = <0xa8000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi index 70e947730c4b..1db943eae81b 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-1.dtsi @@ -35,13 +35,13 @@ fman@500000 { fman1_rx_0x09: port@89000 { cell-index = <0x9>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; reg = <0x89000 0x1000>; }; fman1_tx_0x29: port@a9000 { cell-index = <0x29>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; reg = <0xa9000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi index ad96e6529595..08346b532eba 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-2.dtsi @@ -35,13 +35,13 @@ fman@500000 { fman1_rx_0x0a: port@8a000 { cell-index = <0xa>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; reg = <0x8a000 0x1000>; }; fman1_tx_0x2a: port@aa000 { cell-index = <0x2a>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; reg = <0xaa000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi index 034bc4b71f7a..11ee2e966083 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-3.dtsi @@ -35,13 +35,13 @@ fman@500000 { fman1_rx_0x0b: port@8b000 { cell-index = <0xb>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; reg = <0x8b000 0x1000>; }; fman1_tx_0x2b: port@ab000 { cell-index = <0x2b>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; reg = <0xab000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi index 93ca23d82b39..ad6cc1636f85 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-4.dtsi @@ -35,13 +35,13 @@ fman@500000 { fman1_rx_0x0c: port@8c000 { cell-index = <0xc>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; reg = <0x8c000 0x1000>; }; fman1_tx_0x2c: port@ac000 { cell-index = <0x2c>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; reg = <0xac000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi index 23b3117a2fd2..f64a6c47b99b 100644 --- a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-1g-5.dtsi @@ -35,13 +35,13 @@ fman@500000 { fman1_rx_0x0d: port@8d000 { cell-index = <0xd>; - compatible = "fsl,fman-v3-port-rx"; + compatible = "fsl,fman-v3-port-rx","fsl,fman-port-1g-rx"; reg = <0x8d000 0x1000>; }; fman1_tx_0x2d: port@ad000 { cell-index = <0x2d>; - compatible = "fsl,fman-v3-port-tx"; + compatible = "fsl,fman-v3-port-tx","fsl,fman-port-1g-tx"; reg = <0xad000 0x1000>; }; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-sdk.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-sdk.dtsi new file mode 100644 index 000000000000..397017ac910a --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3-1-sdk.dtsi @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +&fman1 { + compatible = "fsl,fman", "simple-bus"; + + /* tx - 1g - 0 */ + port@a8000 { + fsl,qman-channel-id = <0x822>; + }; + /* tx - 1g - 1 */ + port@a9000 { + fsl,qman-channel-id = <0x823>; + }; + /* tx - 1g - 2 */ + port@aa000 { + fsl,qman-channel-id = <0x824>; + }; + /* tx - 1g - 3 */ + port@ab000 { + fsl,qman-channel-id = <0x825>; + }; + /* tx - 1g - 4 */ + port@ac000 { + fsl,qman-channel-id = <0x826>; + }; + /* tx - 1g - 5 */ + port@ad000 { + fsl,qman-channel-id = <0x827>; + }; + /* tx - 10g - 0 */ + port@b0000 { + fsl,qman-channel-id = <0x820>; + }; + /* tx - 10g - 1 */ + port@b1000 { + fsl,qman-channel-id = <0x821>; + }; + /* offline - 1 */ + port@82000 { + fsl,qman-channel-id = <0x829>; + }; + /* offline - 2 */ + port@83000 { + fsl,qman-channel-id = <0x82a>; + }; + /* offline - 3 */ + port@84000 { + fsl,qman-channel-id = <0x82b>; + }; + /* offline - 4 */ + port@85000 { + fsl,qman-channel-id = <0x82c>; + }; + /* offline - 5 */ + port@86000 { + fsl,qman-channel-id = <0x82d>; + }; + /* offline - 6 */ + port@87000 { + fsl,qman-channel-id = <0x82e>; + }; + + policer@c0000 { + compatible = "fsl,fman-policer"; + reg = <0xc0000 0x1000>; + }; + + keygen@c1000 { + compatible = "fsl,fman-keygen"; + reg = <0xc1000 0x1000>; + }; + + dma@c2000 { + compatible = "fsl,fman-dma"; + reg = <0xc2000 0x1000>; + }; + + fpm@c3000 { + compatible = "fsl,fman-fpm"; + reg = <0xc3000 0x1000>; + }; + + parser@c7000 { + compatible = "fsl,fman-parser"; + reg = <0xc7000 0x1000>; + }; + + vsps@dc000 { + compatible = "fsl,fman-vsps"; + reg = <0xdc000 0x1000>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-qman1-portals-sdk.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-qman1-portals-sdk.dtsi new file mode 100644 index 000000000000..91266d19fbe2 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/qoriq-qman1-portals-sdk.dtsi @@ -0,0 +1,51 @@ +/* + * Copyright 2012 - 2015 Freescale Semiconductor Inc. + * Copyright 2017 NXP + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +&qportals { + qman-fqids@0 { + compatible = "fsl,fqid-range"; + fsl,fqid-range = <256 256>; + }; + qman-fqids@1 { + compatible = "fsl,fqid-range"; + fsl,fqid-range = <32768 32768>; + }; + qman-pools@0 { + compatible = "fsl,pool-channel-range"; + fsl,pool-channel-range = <0x21 0xf>; + }; + qman-cgrids@0 { + compatible = "fsl,cgrid-range"; + fsl,cgrid-range = <0 256>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-qman3-ceetm0-32-sdk.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-qman3-ceetm0-32-sdk.dtsi new file mode 100644 index 000000000000..a6205b1a4929 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/qoriq-qman3-ceetm0-32-sdk.dtsi @@ -0,0 +1,42 @@ +/* + * Copyright 2012 - 2015 Freescale Semiconductor Inc. + * Copyright 2017 - 2018 NXP + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +&qportals { + qman-ceetm@0 { + compatible = "fsl,qman-ceetm"; + fsl,ceetm-lfqid-range = <0xf00000 0x1000>; + fsl,ceetm-sp-range = <0 16>; + fsl,ceetm-lni-range = <0 8>; + fsl,ceetm-channel-range = <0 32>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-qman3-ceetm0-8-sdk.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-qman3-ceetm0-8-sdk.dtsi new file mode 100644 index 000000000000..779ab5ebb805 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/qoriq-qman3-ceetm0-8-sdk.dtsi @@ -0,0 +1,42 @@ +/* + * Copyright 2012 - 2015 Freescale Semiconductor Inc. + * Copyright 2017 - 2018 NXP + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +&qportals { + qman-ceetm@0 { + compatible = "fsl,qman-ceetm"; + fsl,ceetm-lfqid-range = <0xf00000 0x1000>; + fsl,ceetm-sp-range = <0 16>; + fsl,ceetm-lni-range = <0 8>; + fsl,ceetm-channel-range = <0 8>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-qman3-ceetm1-32-sdk.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-qman3-ceetm1-32-sdk.dtsi new file mode 100644 index 000000000000..2c75f4d168ae --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/qoriq-qman3-ceetm1-32-sdk.dtsi @@ -0,0 +1,42 @@ +/* + * Copyright 2012 - 2015 Freescale Semiconductor Inc. + * Copyright 2017 - 2018 NXP + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +&qportals { + qman-ceetm@1 { + compatible = "fsl,qman-ceetm"; + fsl,ceetm-lfqid-range = <0xf10000 0x1000>; + fsl,ceetm-sp-range = <0 16>; + fsl,ceetm-lni-range = <0 8>; + fsl,ceetm-channel-range = <0 32>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/qoriq-qman3-portals-sdk.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-qman3-portals-sdk.dtsi new file mode 100644 index 000000000000..d8cb5390a305 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/qoriq-qman3-portals-sdk.dtsi @@ -0,0 +1,51 @@ +/* + * Copyright 2012 - 2015 Freescale Semiconductor Inc. + * Copyright 2017 NXP + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of Freescale Semiconductor nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * + * ALTERNATIVELY, this software may be distributed under the terms of the + * GNU General Public License ("GPL") as published by the Free Software + * Foundation, either version 2 of that License or (at your option) any + * later version. + * + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +&qportals { + qman-fqids@0 { + compatible = "fsl,fqid-range"; + fsl,fqid-range = <256 512>; + }; + qman-fqids@1 { + compatible = "fsl,fqid-range"; + fsl,fqid-range = <32768 32768>; + }; + qman-pools@0 { + compatible = "fsl,pool-channel-range"; + fsl,pool-channel-range = <0x401 0xf>; + }; + qman-cgrids@0 { + compatible = "fsl,cgrid-range"; + fsl,cgrid-range = <0 256>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/t1023rdb-sdk.dts b/arch/powerpc/boot/dts/fsl/t1023rdb-sdk.dts new file mode 100644 index 000000000000..6a88f1e1f61e --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t1023rdb-sdk.dts @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +#include "t1023rdb.dts" + +/include/ "qoriq-fman3-0-sdk.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman3-portals-sdk.dtsi" +/include/ "qoriq-qman3-ceetm0-8-sdk.dtsi" + +&soc { + fsldpaa: fsl,dpaa { + compatible = "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/t1023rdb.dts b/arch/powerpc/boot/dts/fsl/t1023rdb.dts index f82f85c65964..637e19b78e08 100644 --- a/arch/powerpc/boot/dts/fsl/t1023rdb.dts +++ b/arch/powerpc/boot/dts/fsl/t1023rdb.dts @@ -142,23 +142,23 @@ }; fman@400000 { - fm1mac1: ethernet@e0000 { + enet0: ethernet@e0000 { phy-handle = <&sgmii_rtk_phy2>; phy-connection-type = "sgmii"; sleep = <&rcpm 0x80000000>; }; - fm1mac2: ethernet@e2000 { + enet1: ethernet@e2000 { sleep = <&rcpm 0x40000000>; }; - fm1mac3: ethernet@e4000 { + enet2: ethernet@e4000 { phy-handle = <&sgmii_aqr_phy3>; phy-connection-type = "2500base-x"; sleep = <&rcpm 0x20000000>; }; - fm1mac4: ethernet@e6000 { + enet3: ethernet@e6000 { phy-handle = <&rgmii_rtk_phy1>; phy-connection-type = "rgmii"; sleep = <&rcpm 0x10000000>; diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi index d552044c5afc..c15a49df66e1 100644 --- a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi @@ -52,7 +52,7 @@ &ifc { #address-cells = <2>; #size-cells = <1>; - compatible = "fsl,ifc", "simple-bus"; + compatible = "fsl,ifc"; interrupts = <25 2 0 0>; }; diff --git a/arch/powerpc/boot/dts/fsl/t1024qds-sdk.dts b/arch/powerpc/boot/dts/fsl/t1024qds-sdk.dts new file mode 100644 index 000000000000..a1b812d763fc --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t1024qds-sdk.dts @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +#include "t1024qds.dts" + +/include/ "qoriq-fman3-0-sdk.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman3-portals-sdk.dtsi" +/include/ "qoriq-qman3-ceetm0-8-sdk.dtsi" + +&soc { + fsldpaa: fsl,dpaa { + compatible = "fsl,ls1043a-dpaa", "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/t1024rdb-sdk.dts b/arch/powerpc/boot/dts/fsl/t1024rdb-sdk.dts new file mode 100644 index 000000000000..a49b97dbf2a4 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t1024rdb-sdk.dts @@ -0,0 +1,28 @@ +#include "t1024rdb.dts" + +/include/ "qoriq-fman3-0-sdk.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman3-portals-sdk.dtsi" +/include/ "qoriq-qman3-ceetm0-8-sdk.dtsi" + +&soc { + fsldpaa: fsl,dpaa { + compatible = "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/t1024rdb.dts b/arch/powerpc/boot/dts/fsl/t1024rdb.dts index dbcd31cc35dc..605ceec66af3 100644 --- a/arch/powerpc/boot/dts/fsl/t1024rdb.dts +++ b/arch/powerpc/boot/dts/fsl/t1024rdb.dts @@ -91,7 +91,7 @@ board-control@2,0 { #address-cells = <1>; #size-cells = <1>; - compatible = "fsl,t1024-cpld"; + compatible = "fsl,t1024-cpld", "fsl,deepsleep-cpld"; reg = <3 0 0x300>; ranges = <0 3 0 0x300>; bank-width = <1>; @@ -174,23 +174,23 @@ }; fman@400000 { - fm1mac1: ethernet@e0000 { + enet0: ethernet@e0000 { phy-handle = <&xg_aqr105_phy3>; phy-connection-type = "xgmii"; sleep = <&rcpm 0x80000000>; }; - fm1mac2: ethernet@e2000 { + enet1: ethernet@e2000 { sleep = <&rcpm 0x40000000>; }; - fm1mac3: ethernet@e4000 { + enet2: ethernet@e4000 { phy-handle = <&rgmii_phy2>; phy-connection-type = "rgmii"; sleep = <&rcpm 0x20000000>; }; - fm1mac4: ethernet@e6000 { + enet3: ethernet@e6000 { phy-handle = <&rgmii_phy1>; phy-connection-type = "rgmii"; sleep = <&rcpm 0x10000000>; diff --git a/arch/powerpc/boot/dts/fsl/t1040d4rdb-sdk.dts b/arch/powerpc/boot/dts/fsl/t1040d4rdb-sdk.dts new file mode 100644 index 000000000000..97439ff5ae32 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t1040d4rdb-sdk.dts @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +#include "t1040d4rdb.dts" + +/include/ "qoriq-fman3-0-sdk.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman3-portals-sdk.dtsi" +/include/ "qoriq-qman3-ceetm0-8-sdk.dtsi" + +&soc { + fsldpaa: fsl,dpaa { + compatible = "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + ethernet@4 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet4>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/t1040qds-sdk.dts b/arch/powerpc/boot/dts/fsl/t1040qds-sdk.dts new file mode 100644 index 000000000000..c316c9b56de6 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t1040qds-sdk.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +#include "t1040qds.dts" + +/include/ "qoriq-fman3-0-sdk.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman3-portals-sdk.dtsi" +/include/ "qoriq-qman3-ceetm0-8-sdk.dtsi" diff --git a/arch/powerpc/boot/dts/fsl/t1040rdb-sdk.dts b/arch/powerpc/boot/dts/fsl/t1040rdb-sdk.dts new file mode 100644 index 000000000000..ef1e80bcf484 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t1040rdb-sdk.dts @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +#include "t1040rdb.dts" + +/include/ "qoriq-fman3-0-sdk.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman3-portals-sdk.dtsi" +/include/ "qoriq-qman3-ceetm0-8-sdk.dtsi" + +&soc { + fsldpaa: fsl,dpaa { + compatible = "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + ethernet@4 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet4>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/t1040rdb.dts b/arch/powerpc/boot/dts/fsl/t1040rdb.dts index af0c8a6f5613..0e7751202a76 100644 --- a/arch/powerpc/boot/dts/fsl/t1040rdb.dts +++ b/arch/powerpc/boot/dts/fsl/t1040rdb.dts @@ -104,7 +104,7 @@ ifc: localbus@ffe124000 { cpld@3,0 { - compatible = "fsl,t1040rdb-cpld"; + compatible = "fsl,t104xrdb-cpld", "fsl,deepsleep-cpld"; }; }; }; diff --git a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi index f58eb820eb5e..38703e58dd09 100644 --- a/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi @@ -52,7 +52,7 @@ &ifc { #address-cells = <2>; #size-cells = <1>; - compatible = "fsl,ifc", "simple-bus"; + compatible = "fsl,ifc"; interrupts = <25 2 0 0>; }; diff --git a/arch/powerpc/boot/dts/fsl/t1042d4rdb-sdk.dts b/arch/powerpc/boot/dts/fsl/t1042d4rdb-sdk.dts new file mode 100644 index 000000000000..6c3d636b5a3a --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t1042d4rdb-sdk.dts @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +#include "t1042d4rdb.dts" + +/include/ "qoriq-fman3-0-sdk.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman3-portals-sdk.dtsi" +/include/ "qoriq-qman3-ceetm0-8-sdk.dtsi" + +&soc { + fsldpaa: fsl,dpaa { + compatible = "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + ethernet@4 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet4>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/t1042qds-sdk.dts b/arch/powerpc/boot/dts/fsl/t1042qds-sdk.dts new file mode 100644 index 000000000000..e9c68d063fe8 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t1042qds-sdk.dts @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +#include "t1042qds.dts" diff --git a/arch/powerpc/boot/dts/fsl/t1042rdb-sdk.dts b/arch/powerpc/boot/dts/fsl/t1042rdb-sdk.dts new file mode 100644 index 000000000000..38f7032441b5 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t1042rdb-sdk.dts @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +#include "t1042rdb.dts" + + +/include/ "qoriq-fman3-0-sdk.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman3-portals-sdk.dtsi" +/include/ "qoriq-qman3-ceetm0-8-sdk.dtsi" + +&soc { + fsldpaa: fsl,dpaa { + compatible = "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + ethernet@4 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet4>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/t1042rdb.dts b/arch/powerpc/boot/dts/fsl/t1042rdb.dts index 3ebb712224cb..099764322b33 100644 --- a/arch/powerpc/boot/dts/fsl/t1042rdb.dts +++ b/arch/powerpc/boot/dts/fsl/t1042rdb.dts @@ -68,7 +68,7 @@ ifc: localbus@ffe124000 { cpld@3,0 { - compatible = "fsl,t1042rdb-cpld"; + compatible = "fsl,t104xrdb-cpld", "fsl,deepsleep-cpld"; }; }; }; diff --git a/arch/powerpc/boot/dts/fsl/t1042rdb_pi.dts b/arch/powerpc/boot/dts/fsl/t1042rdb_pi.dts index 8ec3ff45e6fc..b10cab1a347b 100644 --- a/arch/powerpc/boot/dts/fsl/t1042rdb_pi.dts +++ b/arch/powerpc/boot/dts/fsl/t1042rdb_pi.dts @@ -41,7 +41,7 @@ ifc: localbus@ffe124000 { cpld@3,0 { - compatible = "fsl,t1042rdb_pi-cpld"; + compatible = "fsl,t104xrdb-cpld", "fsl,deepsleep-cpld"; }; }; diff --git a/arch/powerpc/boot/dts/fsl/t2080qds-sdk.dts b/arch/powerpc/boot/dts/fsl/t2080qds-sdk.dts new file mode 100644 index 000000000000..898ea467b56a --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t2080qds-sdk.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +#include "t2080qds.dts" + +/include/ "qoriq-fman-0-sdk.dtsi" +/include/ "qoriq-dpaa-eth.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman3-portals-sdk.dtsi" +/include/ "qoriq-qman3-ceetm0-32-sdk.dtsi" diff --git a/arch/powerpc/boot/dts/fsl/t2080rdb-sdk.dts b/arch/powerpc/boot/dts/fsl/t2080rdb-sdk.dts new file mode 100644 index 000000000000..b3a5d7526c20 --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t2080rdb-sdk.dts @@ -0,0 +1,83 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +#include "t2080rdb.dts" + +/include/ "qoriq-fman3-0-sdk.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman3-portals-sdk.dtsi" +/include/ "qoriq-qman3-ceetm0-32-sdk.dtsi" + +&soc { + fsldpaa: fsl,dpaa { + compatible = "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + }; + ethernet@1 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + }; + ethernet@3 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + ethernet@4 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet4>; + }; + ethernet@5 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet5>; + }; + ethernet@6 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet6>; + }; + ethernet@7 { + compatible = "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet7>; + }; + }; +}; + +&bportals { + bman-portal@28000 { + cell-index = <0xa>; + }; + + bman-portal@2c000 { + cell-index = <0xb>; + }; + + bman-portal@30000 { + cell-index = <0xc>; + }; + + bman-portal@34000 { + cell-index = <0xd>; + }; + + bman-portal@38000 { + cell-index = <0xe>; + }; + + bman-portal@3c000 { + cell-index = <0xf>; + }; + + bman-portal@40000 { + cell-index = <0x10>; + }; + + bman-portal@44000 { + cell-index = <0x11>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/t2081qds-sdk.dts b/arch/powerpc/boot/dts/fsl/t2081qds-sdk.dts new file mode 100644 index 000000000000..2dcec8a5939b --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t2081qds-sdk.dts @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +/include/ "t2081qds.dts" diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi index ecbb447920bc..58ef8bf6045c 100644 --- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi @@ -50,7 +50,7 @@ &ifc { #address-cells = <2>; #size-cells = <1>; - compatible = "fsl,ifc", "simple-bus"; + compatible = "fsl,ifc"; interrupts = <25 2 0 0>; }; diff --git a/arch/powerpc/boot/dts/fsl/t4240qds-sdk.dts b/arch/powerpc/boot/dts/fsl/t4240qds-sdk.dts new file mode 100644 index 000000000000..db27e43751ee --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t4240qds-sdk.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +/include/ "t4240qds.dts" + +/include/ "qoriq-fman3-0-sdk.dtsi" +/include/ "qoriq-dpaa-eth.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman3-portals-sdk.dtsi" +/include/ "qoriq-qman3-ceetm0-32-sdk.dtsi" diff --git a/arch/powerpc/boot/dts/fsl/t4240rdb-sdk.dts b/arch/powerpc/boot/dts/fsl/t4240rdb-sdk.dts new file mode 100644 index 000000000000..4698f916330f --- /dev/null +++ b/arch/powerpc/boot/dts/fsl/t4240rdb-sdk.dts @@ -0,0 +1,249 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Copyright 2017-2018 NXP + */ + +/include/ "t4240rdb.dts" + +/include/ "qoriq-fman3-0-sdk.dtsi" +/include/ "qoriq-fman3-1-sdk.dtsi" +/include/ "qoriq-bman-portals-sdk.dtsi" +/include/ "qoriq-qman3-portals-sdk.dtsi" +/include/ "qoriq-qman3-ceetm0-32-sdk.dtsi" +/include/ "qoriq-qman3-ceetm1-32-sdk.dtsi" + +&soc { + fsldpaa: fsl,dpaa { + compatible = "simple-bus", "fsl,dpaa"; + ethernet@0 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet0>; + }; + ethernet@1 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet1>; + }; + ethernet@2 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet2>; + }; + ethernet@3 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet3>; + }; + ethernet@4 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet4>; + status = "disabled"; + }; + ethernet@5 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet5>; + status = "disabled"; + }; + ethernet@6 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet6>; + }; + ethernet@7 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet7>; + }; + ethernet@8 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet8>; + }; + ethernet@9 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet9>; + }; + ethernet@10 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet10>; + }; + ethernet@11 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet11>; + }; + ethernet@12 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet12>; + status = "disabled"; + }; + ethernet@13 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet13>; + status = "disabled"; + }; + ethernet@14 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet14>; + }; + ethernet@15 { + compatible = "fsl,t4240-dpa-ethernet", "fsl,dpa-ethernet"; + fsl,fman-mac = <&enet15>; + }; + }; +}; + +&bportals { + bman-portal@28000 { + cell-index = <0xa>; + }; + + bman-portal@2c000 { + cell-index = <0xb>; + }; + + bman-portal@30000 { + cell-index = <0xc>; + }; + + bman-portal@34000 { + cell-index = <0xd>; + }; + + bman-portal@38000 { + cell-index = <0xe>; + }; + + bman-portal@3c000 { + cell-index = <0xf>; + }; + + bman-portal@40000 { + cell-index = <0x10>; + }; + + bman-portal@44000 { + cell-index = <0x11>; + }; + + bman-portal@48000 { + cell-index = <0x12>; + }; + + bman-portal@4c000 { + cell-index = <0x13>; + }; + + bman-portal@50000 { + cell-index = <0x14>; + }; + + bman-portal@54000 { + cell-index = <0x15>; + }; + + bman-portal@58000 { + cell-index = <0x16>; + }; + + bman-portal@5c000 { + cell-index = <0x17>; + }; + + bman-portal@60000 { + cell-index = <0x18>; + }; + + bman-portal@64000 { + cell-index = <0x19>; + }; + + bman-portal@68000 { + cell-index = <0x1a>; + }; + + bman-portal@6c000 { + cell-index = <0x1b>; + }; + + bman-portal@70000 { + cell-index = <0x1c>; + }; + + bman-portal@74000 { + cell-index = <0x1d>; + }; + + bman-portal@78000 { + cell-index = <0x1e>; + }; + + bman-portal@7c000 { + cell-index = <0x1f>; + }; + + bman-portal@80000 { + cell-index = <0x20>; + }; + + bman-portal@84000 { + cell-index = <0x21>; + }; + + bman-portal@88000 { + cell-index = <0x22>; + }; + + bman-portal@8c000 { + cell-index = <0x23>; + }; + + bman-portal@90000 { + cell-index = <0x24>; + }; + + bman-portal@94000 { + cell-index = <0x25>; + }; + + bman-portal@98000 { + cell-index = <0x26>; + }; + + bman-portal@9c000 { + cell-index = <0x27>; + }; + + bman-portal@a0000 { + cell-index = <0x28>; + }; + + bman-portal@a4000 { + cell-index = <0x29>; + }; + + bman-portal@a8000 { + cell-index = <0x2a>; + }; + + bman-portal@ac000 { + cell-index = <0x2b>; + }; + + bman-portal@b0000 { + cell-index = <0x2c>; + }; + + bman-portal@b4000 { + cell-index = <0x2d>; + }; + + bman-portal@b8000 { + cell-index = <0x2e>; + }; + + bman-portal@bc000 { + cell-index = <0x2f>; + }; + + bman-portal@c0000 { + cell-index = <0x30>; + }; + + bman-portal@c4000 { + cell-index = <0x31>; + }; +}; diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi index fcac73486d48..65f3e17c0d41 100644 --- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi @@ -50,7 +50,7 @@ &ifc { #address-cells = <2>; #size-cells = <1>; - compatible = "fsl,ifc", "simple-bus"; + compatible = "fsl,ifc"; interrupts = <25 2 0 0>; }; diff --git a/drivers/memory/fsl_ifc.c b/drivers/memory/fsl_ifc.c index d062c2f8250f..ef2092fa90d9 100644 --- a/drivers/memory/fsl_ifc.c +++ b/drivers/memory/fsl_ifc.c @@ -88,6 +88,7 @@ static int fsl_ifc_ctrl_remove(struct platform_device *dev) { struct fsl_ifc_ctrl *ctrl = dev_get_drvdata(&dev->dev); + of_platform_depopulate(&dev->dev); free_irq(ctrl->nand_irq, ctrl); free_irq(ctrl->irq, ctrl); @@ -285,6 +286,12 @@ static int fsl_ifc_ctrl_probe(struct platform_device *dev) } } + /* legacy dts may still use "simple-bus" compatible */ + ret = of_platform_populate(dev->dev.of_node, NULL, NULL, + &dev->dev); + if (ret) + goto err_nandirq; + return 0; err_nandirq: |