Merge branch 'lf-5.15.y' into fslc-5.15-2.2.x-imx

Merge tag lf-5.15.71-2.2.2 with reverted upstream (sound/) commits
339ba37942c9d 6f668d2cbd2e2 d62dd3e291e06 416f4b7624040 1c23070f17c59

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>

20 files changed, 262 insertions, 33 deletions

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 671b736ab304..c307e063f230 100755
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -1652,7 +1652,7 @@
 				<&clk IMX8MQ_GPU_PLL_OUT>,
 				<&clk IMX8MQ_GPU_PLL_OUT>,
 				<&clk IMX8MQ_GPU_PLL_OUT>;
-		assigned-clock-rates = <800000000>, <800000000>, <800000000>, <800000000>;
+		assigned-clock-rates = <800000000>, <800000000>, <800000000>, <400000000>;
 		power-domains = <&pgc_gpu>;
 		status = "disabled";
 	};
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
index e19e35ab0474..c4e2b8c31394 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8ulp-evk.dts
@@ -89,6 +89,12 @@
 			no-map;
 		};
 
+		ele_reserved: ele-reserved@90000000 {
+			compatible = "shared-dma-pool";
+			reg = <0 0x90000000 0 0x100000>;
+			no-map;
+		};
+
 		vdev0vring0: vdev0vring0@aff00000 {
 			reg = <0 0xaff00000 0 0x8000>;
 			no-map;
@@ -220,6 +226,10 @@
 	status = "okay";
 };
 
+&ele_mu {
+	memory-region = <&ele_reserved>;
+};
+
 &fec {
 	pinctrl-names = "default", "sleep";
 	pinctrl-0 = <&pinctrl_enet>;
diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 9ffb78622891..445d36f8c7d8 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -257,8 +257,6 @@
 		};
 
 		ele_mu: ele-mu {
-			#address-cells = <1>;
-			#size-cells = <1>;
 			compatible = "fsl,imx-ele";
 			mboxes = <&s4muap 0 0 &s4muap 1 0>;
 			mbox-names = "tx", "rx";
@@ -266,7 +264,6 @@
 			fsl,ele_mu_id = <2>;
 			fsl,ele_mu_max_users = <4>;
 			status = "okay";
-			dma-ranges = <0x80000000 0x80000000 0x20000000>;
 			sram-pool = <&sram0>;
 		};
 
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
index 13e9e844d8fe..e86c578a455a 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
@@ -8,6 +8,10 @@
 #include <dt-bindings/usb/pd.h>
 #include "imx93.dtsi"
 
+&ele_mu {
+	memory-region = <&ele_reserved>;
+};
+
 / {
 	model = "NXP i.MX93 11X11 EVK board";
 	compatible = "fsl,imx93-11x11-evk", "fsl,imx93";
@@ -65,6 +69,12 @@
 			reg = <0 0xa4020000 0 0x100000>;
 			no-map;
 		};
+
+		ele_reserved: ele-reserved@a4120000 {
+			compatible = "shared-dma-pool";
+			reg = <0 0xa4120000 0 0x100000>;
+			no-map;
+		};
 	};
 
 	cm33: imx93-cm33 {
diff --git a/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts b/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts
index 561c3ede79ce..a97df512c5f2 100644
--- a/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-9x9-qsb.dts
@@ -8,6 +8,10 @@
 #include <dt-bindings/usb/pd.h>
 #include "imx93.dtsi"
 
+&ele_mu {
+	memory-region = <&ele_reserved>;
+};
+
 / {
 	model = "NXP i.MX93 9x9 Quick Start Board";
 	compatible = "fsl,imx93-9x9-qsb", "fsl,imx93";
@@ -58,6 +62,12 @@
 			reg = <0 0xa4020000 0 0x100000>;
 			no-map;
 		};
+
+		ele_reserved: ele-reserved@a4120000 {
+			compatible = "shared-dma-pool";
+			reg = <0 0xa4120000 0 0x100000>;
+			no-map;
+		};
 	};
 
 	cm33: imx93-cm33 {
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 62d2b4fe45f9..6e4248d228a3 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -1259,8 +1259,6 @@
 		};
 
 		ele_mu: ele-mu {
-			#address-cells = <1>;
-			#size-cells = <1>;
 			compatible = "fsl,imx93-ele";
 			mboxes = <&s4muap 0 0 &s4muap 1 0>;
 			mbox-names = "tx", "rx";
@@ -1268,7 +1266,6 @@
 			fsl,ele_mu_id = <2>;
 			fsl,ele_mu_max_users = <4>;
 			status = "okay";
-			dma-ranges = <0x80000000 0x80000000 0x20000000>;
 		};
 
 		media_blk_ctrl: blk-ctrl@4ac10000 {
diff --git a/drivers/crypto/caam/secvio.c b/drivers/crypto/caam/secvio.c
index d6ebe0af40fc..e319677132cf 100644
--- a/drivers/crypto/caam/secvio.c
+++ b/drivers/crypto/caam/secvio.c
@@ -3,7 +3,7 @@
  * SNVS Security Violation Handler
  *
  * Copyright 2012-2016 Freescale Semiconductor, Inc.
- * Copyright 2017-2019 NXP
+ * Copyright 2017-2019, 2023 NXP
  */
 
 #include "compat.h"
@@ -54,6 +54,24 @@ static const u8 *snvs_ssm_state_name[] = {
 	"secure",
 };
 
+static DEFINE_STATIC_KEY_TRUE(snvs_little_end);
+
+static inline u32 secvio_read(void __iomem *reg)
+{
+	if (static_branch_likely(&snvs_little_end))
+		return ioread32(reg);
+	else
+		return ioread32be(reg);
+}
+
+static inline void secvio_write(void __iomem *reg, u32 data)
+{
+	if (static_branch_likely(&snvs_little_end))
+		iowrite32(data, reg);
+	else
+		iowrite32be(data, reg);
+}
+
 /* Top-level security violation interrupt */
 static irqreturn_t snvs_secvio_interrupt(int irq, void *snvsdev)
 {
@@ -62,8 +80,8 @@ static irqreturn_t snvs_secvio_interrupt(int irq, void *snvsdev)
 
 	clk_enable(svpriv->clk);
 	/* Check the HP secvio status register */
-	svpriv->irqcause = rd_reg32(&svpriv->svregs->hp.secvio_status) &
-				    HP_SECVIOST_SECVIOMASK;
+	svpriv->irqcause = secvio_read(&svpriv->svregs->hp.secvio_status) &
+				       HP_SECVIOST_SECVIOMASK;
 
 	if (!svpriv->irqcause) {
 		clk_disable(svpriv->clk);
@@ -192,7 +210,7 @@ static int snvs_secvio_remove(struct platform_device *pdev)
 
 	clk_enable(svpriv->clk);
 	/* Set all sources to nonfatal */
-	wr_reg32(&svpriv->svregs->hp.secvio_intcfg, 0);
+	secvio_write(&svpriv->svregs->hp.secvio_intcfg, 0);
 
 	/* Remove tasklets and release interrupt */
 	for_each_possible_cpu(i)
@@ -216,6 +234,7 @@ static int snvs_secvio_probe(struct platform_device *pdev)
 	u32 hpstate;
 	const void *jtd, *wtd, *itd, *etd;
 	u32 td_en;
+	u32 ipidr, ipid;
 
 	svpriv = kzalloc(sizeof(struct snvs_secvio_drv_private), GFP_KERNEL);
 	if (!svpriv)
@@ -281,9 +300,36 @@ static int snvs_secvio_probe(struct platform_device *pdev)
 
 	clk_prepare_enable(svpriv->clk);
 
+	/*
+	 * Reading SNVS version ID register HPVIDR1 to identify the endianness
+	 * of the device which contain non-zero constants including 16-bit field
+	 * called IP_ID[Bit 31-16] having one of the four values 0x003A, 0x003C,
+	 * 0x003E, 0x003F.
+	 */
+	ipidr = secvio_read(&svpriv->svregs->vid);
+	ipid = ipidr >> SNVS_HPVIDR_BLOCK_ID;
+	if (ipid == SNVS_ID1 || ipid == SNVS_ID2 || ipid == SNVS_ID3 || ipid == SNVS_ID4) {
+		dev_info(svdev, "ipid matched - 0x%x\n", ipid);
+	} else {
+		/*
+		 * Device endianness is not LE.Reading again SNVS version ID
+		 * register value to identify the endianness of device is BE.
+		 */
+		ipid = (ipidr & (u32)0x0000FF00) >> 8;
+		if (ipid == SNVS_ID1 || ipid == SNVS_ID2 || ipid == SNVS_ID3 || ipid == SNVS_ID4) {
+			dev_info(svdev, "ipid matched - 0x%x\n", ipid);
+			static_branch_disable(&snvs_little_end);
+		} else {
+			dev_err(svdev, "unable to identify secvio endianness\n");
+			iounmap(svpriv->svregs);
+			kfree(svpriv);
+			return -EINVAL;
+		}
+	}
+
 	/* Write the Secvio Enable Config the SVCR */
-	wr_reg32(&svpriv->svregs->hp.secvio_ctl, td_en);
-	wr_reg32(&svpriv->svregs->hp.secvio_intcfg, td_en);
+	secvio_write(&svpriv->svregs->hp.secvio_ctl, td_en);
+	secvio_write(&svpriv->svregs->hp.secvio_intcfg, td_en);
 
 	 /* Device data set up. Now init interrupt source descriptions */
 	for (i = 0; i < MAX_SECVIO_SOURCES; i++) {
@@ -306,8 +352,8 @@ static int snvs_secvio_probe(struct platform_device *pdev)
 		return -EINVAL;
 	}
 
-	hpstate = (rd_reg32(&svpriv->svregs->hp.status) &
-			    HP_STATUS_SSM_ST_MASK) >> HP_STATUS_SSM_ST_SHIFT;
+	hpstate = (secvio_read(&svpriv->svregs->hp.status) &
+			       HP_STATUS_SSM_ST_MASK) >> HP_STATUS_SSM_ST_SHIFT;
 	dev_info(svdev, "violation handlers armed - %s state\n",
 		 snvs_ssm_state_name[hpstate]);
 
diff --git a/drivers/crypto/caam/snvsregs.h b/drivers/crypto/caam/snvsregs.h
index 4a7e7693328f..278d811919e9 100644
--- a/drivers/crypto/caam/snvsregs.h
+++ b/drivers/crypto/caam/snvsregs.h
@@ -236,4 +236,10 @@ struct snvs_full {
 	u32 opt_rev;		/* 0xbfc HP Options / Revision (VID 2) */
 };
 
+#define SNVS_HPVIDR_BLOCK_ID	16	/* SNVS Block ID 31-16 bit */
+#define SNVS_ID1		58	/* SNVS Block ID 0x3A */
+#define SNVS_ID2		60	/* SNVS Block ID 0x3C */
+#define SNVS_ID3		62	/* SNVS Block ID 0x3E */
+#define SNVS_ID4		63	/* SNVS Block ID 0x3F */
+
 #endif /* SNVSREGS_H */
diff --git a/drivers/firmware/imx/ele_mu.c b/drivers/firmware/imx/ele_mu.c
index 7b7d4c64407c..a99689f90334 100644
--- a/drivers/firmware/imx/ele_mu.c
+++ b/drivers/firmware/imx/ele_mu.c
@@ -19,6 +19,7 @@
 #include <linux/mod_devicetable.h>
 #include <linux/module.h>
 #include <linux/of_platform.h>
+#include <linux/of_reserved_mem.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
 #include <linux/delay.h>
@@ -30,22 +31,27 @@
 #define ELE_PING_INTERVAL	(3600 * HZ)
 #define ELE_TRNG_STATE_OK	0x203
 
+#define RESERVED_DMA_POOL	BIT(1)
+
 struct ele_mu_priv *ele_priv_export;
 
 struct imx_info {
 	bool socdev;
 	/* platform specific flag to enable/disable the Sentinel True RNG */
 	bool enable_ele_trng;
+	bool reserved_dma_ranges;
 };
 
 static const struct imx_info imx8ulp_info = {
 	.socdev = true,
 	.enable_ele_trng = false,
+	.reserved_dma_ranges = true,
 };
 
 static const struct imx_info imx93_info = {
 	.socdev = false,
 	.enable_ele_trng = true,
+	.reserved_dma_ranges = true,
 };
 
 static const struct of_device_id ele_mu_match[] = {
@@ -231,7 +237,7 @@ static int imx_soc_device_register(struct platform_device *pdev)
 	return 0;
 }
 
-static int ele_trng_enable(struct platform_device *pdev)
+static int ele_do_start_rng(void)
 {
 	int ret;
 	int count = 5;
@@ -262,8 +268,9 @@ static int ele_trng_enable(struct platform_device *pdev)
 			return -EIO;
 	}
 
-	return ele_trng_init(&pdev->dev);
+	return 0;
 }
+
 /*
  * File operations for user-space
  */
@@ -936,6 +943,9 @@ static int ele_mu_probe(struct platform_device *pdev)
 		goto exit;
 	}
 
+	priv->max_dev_ctx = max_nb_users;
+	priv->ctxs = devm_kzalloc(dev, sizeof(dev_ctx) * max_nb_users, GFP_KERNEL);
+
 	/* Create users */
 	for (i = 0; i < max_nb_users; i++) {
 		dev_ctx = devm_kzalloc(dev, sizeof(*dev_ctx), GFP_KERNEL);
@@ -949,6 +959,9 @@ static int ele_mu_probe(struct platform_device *pdev)
 		dev_ctx->dev = dev;
 		dev_ctx->status = MU_FREE;
 		dev_ctx->priv = priv;
+
+		priv->ctxs[i] = dev_ctx;
+
 		/* Default value invalid for an header. */
 		init_waitqueue_head(&dev_ctx->wq);
 
@@ -990,6 +1003,16 @@ static int ele_mu_probe(struct platform_device *pdev)
 
 	ele_priv_export = priv;
 
+	if (info && info->reserved_dma_ranges) {
+		ret = of_reserved_mem_device_init(dev);
+		if (ret) {
+			dev_err(dev, "failed to init reserved memory region %d\n", ret);
+			priv->flags &= (~RESERVED_DMA_POOL);
+			goto exit;
+		}
+		priv->flags |= RESERVED_DMA_POOL;
+	}
+
 	if (info && info->socdev) {
 		ret = imx_soc_device_register(pdev);
 		if (ret) {
@@ -999,8 +1022,13 @@ static int ele_mu_probe(struct platform_device *pdev)
 		}
 	}
 
-	if (info && info->enable_ele_trng) {
-		ret = ele_trng_enable(pdev);
+	/* start ele rng */
+	ret = ele_do_start_rng();
+	if (ret)
+		dev_err(dev, "Failed to start ele rng\n");
+
+	if (!ret && info && info->enable_ele_trng) {
+		ret = ele_trng_init(dev);
 		if (ret)
 			dev_err(dev, "Failed to init ele-trng\n");
 	}
@@ -1015,6 +1043,13 @@ static int ele_mu_probe(struct platform_device *pdev)
 	return devm_of_platform_populate(dev);
 
 exit:
+	/* if execution control reaches here, ele-mu probe fail.
+	 * hence doing the cleanup
+	 */
+	if (priv->flags & RESERVED_DMA_POOL) {
+		of_reserved_mem_device_release(dev);
+		priv->flags &= (~RESERVED_DMA_POOL);
+	}
 	return ret;
 }
 
@@ -1027,13 +1062,40 @@ static int ele_mu_remove(struct platform_device *pdev)
 	mbox_free_channel(priv->tx_chan);
 	mbox_free_channel(priv->rx_chan);
 
+	if (priv->flags & RESERVED_DMA_POOL) {
+		of_reserved_mem_device_release(&pdev->dev);
+		priv->flags &= (~RESERVED_DMA_POOL);
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_PM_SLEEP
+static int ele_mu_resume(struct device *dev)
+{
+	struct ele_mu_priv *priv = dev_get_drvdata(dev);
+	int i, ret;
+
+	for (i = 0; i < priv->max_dev_ctx; i++)
+		wake_up_interruptible(&priv->ctxs[i]->wq);
+
+	ret = ele_do_start_rng();
+	if (ret)
+		dev_err(dev, "Failed to start ele rng on resume\n");
+
 	return 0;
 }
+#endif
+
+static const struct dev_pm_ops ele_mu_pm = {
+	SET_SYSTEM_SLEEP_PM_OPS(NULL, ele_mu_resume)
+};
 
 static struct platform_driver ele_mu_driver = {
 	.driver = {
 		.name = "fsl-ele-mu",
 		.of_match_table = ele_mu_match,
+		.pm = &ele_mu_pm,
 	},
 	.probe = ele_mu_probe,
 	.remove = ele_mu_remove,
diff --git a/drivers/firmware/imx/ele_mu.h b/drivers/firmware/imx/ele_mu.h
index 6584142a4c38..fded52d1d3d9 100644
--- a/drivers/firmware/imx/ele_mu.h
+++ b/drivers/firmware/imx/ele_mu.h
@@ -135,6 +135,12 @@ struct ele_mu_priv {
 	struct ele_api_msg tx_msg, rx_msg;
 	struct completion done;
 	spinlock_t lock;
+	/* Flag to retain the state of initialization done at
+	 * the time of ele-mu probe.
+	 */
+	int flags;
+	int max_dev_ctx;
+	struct ele_mu_device_ctx **ctxs;
 };
 
 int get_ele_mu_priv(struct ele_mu_priv **export);
diff --git a/drivers/firmware/imx/seco_mu.c b/drivers/firmware/imx/seco_mu.c
index 75c721100915..ee84889029be 100644
--- a/drivers/firmware/imx/seco_mu.c
+++ b/drivers/firmware/imx/seco_mu.c
@@ -680,6 +680,12 @@ static int seco_mu_ioctl_setup_iobuf_handler(struct seco_mu_device_ctx *dev_ctx,
 		shared_mem->pos += round_up(io.length, 8u);
 		io.seco_addr = (u64)shared_mem->dma_addr + pos;
 	} else {
+		if (io.length > MAX_DATA_SIZE_PER_USER) {
+			devctx_err(dev_ctx, "Buffer length exceeded the max limit\n");
+			err = -ENOMEM;
+			goto exit;
+		}
+
 		io.seco_addr = (u64)addr;
 	}
 
diff --git a/drivers/gpu/drm/imx/dpu/dpu-blit.c b/drivers/gpu/drm/imx/dpu/dpu-blit.c
index 35d8429a400f..deb88c2d7234 100644
--- a/drivers/gpu/drm/imx/dpu/dpu-blit.c
+++ b/drivers/gpu/drm/imx/dpu/dpu-blit.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2017,2021-2022 NXP
+ * Copyright 2017,2021-2023 NXP
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License as published by the
@@ -19,6 +19,7 @@
 #include <drm/imx_drm.h>
 #include <linux/component.h>
 #include <linux/device.h>
+#include <linux/dma-buf.h>
 #include <linux/errno.h>
 #include <linux/export.h>
 #include <linux/module.h>
@@ -215,13 +216,60 @@ static int imx_drm_dpu_get_param_ioctl(struct drm_device *drm_dev, void *data,
 	return ret;
 }
 
-const struct drm_ioctl_desc imx_drm_dpu_ioctls[3] = {
+static int imx_drm_dpu_sync_dmabuf_ioctl(struct drm_device *drm_dev, void *data,
+					  struct drm_file *file)
+{
+	struct drm_imx_dpu_sync_dmabuf *flush = data;
+	struct dma_buf *dmabuf;
+	struct dma_buf_attachment *attachment;
+	struct sg_table *sgt;
+	int direction;
+	int ret = 0;
+
+	if (flush->direction == IMX_DPU_SYNC_TO_BOTH)
+		direction = DMA_BIDIRECTIONAL;
+	else if (flush->direction == IMX_DPU_SYNC_TO_DEVICE)
+		direction = DMA_TO_DEVICE;
+	else if (flush->direction == IMX_DPU_SYNC_TO_CPU)
+		direction = DMA_FROM_DEVICE;
+	else
+		direction = DMA_NONE;
+
+	dmabuf = dma_buf_get(flush->dmabuf_fd);
+	if (IS_ERR(dmabuf)) {
+		drm_err(drm_dev, "failed to get dmabuf\n");
+		return PTR_ERR(dmabuf);
+	}
+	attachment = dma_buf_attach(dmabuf, drm_dev->dev);
+	if (IS_ERR(attachment)) {
+		ret = PTR_ERR(attachment);
+		drm_err(drm_dev, "failed to attach dmabuf\n");
+		goto err_put;
+	}
+	sgt = dma_buf_map_attachment(attachment, direction);
+	if (IS_ERR(sgt)) {
+		ret = PTR_ERR(sgt);
+		drm_err(drm_dev, "failed to get dmabuf sg_table\n");
+		goto err_detach;
+	}
+	dma_buf_unmap_attachment(attachment, sgt, direction);
+err_detach:
+	dma_buf_detach(dmabuf, attachment);
+err_put:
+	dma_buf_put(dmabuf);
+
+	return ret;
+}
+
+const struct drm_ioctl_desc imx_drm_dpu_ioctls[4] = {
 	DRM_IOCTL_DEF_DRV(IMX_DPU_SET_CMDLIST, imx_drm_dpu_set_cmdlist_ioctl,
 			DRM_RENDER_ALLOW),
 	DRM_IOCTL_DEF_DRV(IMX_DPU_WAIT, imx_drm_dpu_wait_ioctl,
 			DRM_RENDER_ALLOW),
 	DRM_IOCTL_DEF_DRV(IMX_DPU_GET_PARAM, imx_drm_dpu_get_param_ioctl,
 			DRM_RENDER_ALLOW),
+	DRM_IOCTL_DEF_DRV(IMX_DPU_SYNC_DMABUF, imx_drm_dpu_sync_dmabuf_ioctl,
+			DRM_RENDER_ALLOW),
 };
 
 static int dpu_bliteng_bind(struct device *dev, struct device *master,
@@ -344,3 +392,4 @@ module_platform_driver(dpu_bliteng_driver);
 MODULE_LICENSE("GPL");
 MODULE_AUTHOR("NXP Semiconductor");
 MODULE_DESCRIPTION("i.MX DRM DPU BLITENG");
+MODULE_IMPORT_NS(DMA_BUF);
diff --git a/drivers/gpu/drm/imx/dpu/dpu-blit.h b/drivers/gpu/drm/imx/dpu/dpu-blit.h
index cf429086cdf4..3af1bba1e5ff 100644
--- a/drivers/gpu/drm/imx/dpu/dpu-blit.h
+++ b/drivers/gpu/drm/imx/dpu/dpu-blit.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0+ */
 
 /*
- * Copyright 2021 NXP
+ * Copyright 2021,2023 NXP
  */
 
 #ifndef _DPU_DRM_BLIT_H_
@@ -10,7 +10,7 @@
 #include <drm/drm_ioctl.h>
 
 #ifdef CONFIG_DRM_IMX_DPU
-extern const struct drm_ioctl_desc imx_drm_dpu_ioctls[3];
+extern const struct drm_ioctl_desc imx_drm_dpu_ioctls[4];
 #else
 const struct drm_ioctl_desc imx_drm_dpu_ioctls[] = {};
 #endif
diff --git a/drivers/gpu/imx/dpu-blit/dpu-blit.c b/drivers/gpu/imx/dpu-blit/dpu-blit.c
index 72e1c5f234ba..eef1f41156dd 100644
--- a/drivers/gpu/imx/dpu-blit/dpu-blit.c
+++ b/drivers/gpu/imx/dpu-blit/dpu-blit.c
@@ -301,6 +301,8 @@ int dpu_be_get_fence(struct dpu_bliteng *dpu_be)
 		goto failed;
 	}
 
+	dma_fence_put(&fence->base);
+
 	/* Get the unused file descriptor */
 	fd = get_unused_fd_flags(O_CLOEXEC);
 	if (fd < 0) {
@@ -369,9 +371,8 @@ int dpu_be_set_fence(struct dpu_bliteng *dpu_be, int fd)
 	/* Setup the fence and active it asynchronously */
 	dpu_be_emit_fence(dpu_be, fence, false);
 
-	/* Increase fence and base reference */
+	/* Increase fence reference */
 	atomic_inc(&fence->refcnt);
-	dma_fence_get(&fence->base);
 
 	return 0;
 }
diff --git a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c
index e10d229bd8c1..9638878bbccf 100644
--- a/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c
+++ b/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c
@@ -3076,9 +3076,16 @@ gckHARDWARE_InitializeHardware(
 
     if (_IsHardwareMatch(Hardware, gcv4000, 0x5222)
      || _IsHardwareMatch(Hardware, gcv2000, 0x5108)
+     || _IsHardwareMatch(Hardware, gcv7000, 0x6009)
      || _IsHardwareMatch(Hardware, gcv7000, 0x6202)
      || _IsHardwareMatch(Hardware, gcv7000, 0x6203)
      || _IsHardwareMatch(Hardware, gcv7000, 0x6204)
+     || _IsHardwareMatch(Hardware, gcv7000, 0x6205)
+     || _IsHardwareMatch(Hardware, gcv7000, 0x6212)
+     || _IsHardwareMatch(Hardware, gcv7000, 0x6214)
+     || _IsHardwareMatch(Hardware, gcv600, 0x4653)
+     || _IsHardwareMatch(Hardware, gcv8000, 0x6201)
+     || _IsHardwareMatch(Hardware, gcv8000, 0x6204)
      || (gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_TX_DESCRIPTOR)
        && !gckHARDWARE_IsFeatureAvailable(Hardware, gcvFEATURE_TX_DESC_CACHE_CLOCKGATE_FIX)
         )
diff --git a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c
index 3b667aa1ea7c..09579f9efa34 100644
--- a/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c
+++ b/drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c
@@ -762,7 +762,12 @@ gckOS_Construct(
         gcmkONERROR(gcvSTATUS_OUT_OF_MEMORY);
     }
 
-    os->paddingPage = alloc_page(GFP_KERNEL | __GFP_HIGHMEM | gcdNOWARN);
+#if defined(CONFIG_ZONE_DMA32) && LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)
+    os->paddingPage = alloc_page(GFP_KERNEL | __GFP_DMA32 | gcdNOWARN);
+#else
+    os->paddingPage = alloc_page(GFP_KERNEL | __GFP_DMA | gcdNOWARN);
+#endif
+
     if (os->paddingPage == gcvNULL)
     {
         /* Out of memory. */
diff --git a/drivers/staging/ethosu/ethosu_device.c b/drivers/staging/ethosu/ethosu_device.c
index fdc44ec9a075..b0be4bcba7a1 100644
--- a/drivers/staging/ethosu/ethosu_device.c
+++ b/drivers/staging/ethosu/ethosu_device.c
@@ -228,10 +228,8 @@ static int ethosu_open(struct inode *inode,
 	if (!ret && atomic_read(&rproc->power) == 0) {
 		init_completion(&edev->erp.rpmsg_ready);
 		ret = rproc_boot(rproc);
-		if (ret)
+		if (ret || wait_for_completion_interruptible(&edev->erp.rpmsg_ready))
 			dev_err(edev->dev, "could not boot a remote processor\n");
-		else
-			wait_for_completion_interruptible(&edev->erp.rpmsg_ready);
 	} else {
 		dev_err(edev->dev, "can't change firmware or remote processor is running\n");
 	}
diff --git a/drivers/staging/ethosu/ethosu_network_info.c b/drivers/staging/ethosu/ethosu_network_info.c
index 5584666071b0..3b8ad935505a 100644
--- a/drivers/staging/ethosu/ethosu_network_info.c
+++ b/drivers/staging/ethosu/ethosu_network_info.c
@@ -147,7 +147,7 @@ void ethosu_network_info_rsp(struct ethosu_device *edev,
 		goto signal_complete;
 	}
 
-	if (rsp->ifm_count > ETHOSU_FD_MAX || rsp->ofm_count > ETHOSU_FD_MAX) {
+	if (rsp->ifm_count > ETHOSU_CORE_BUFFER_MAX || rsp->ofm_count > ETHOSU_CORE_BUFFER_MAX) {
 		info->errno = -ENFILE;
 		goto signal_complete;
 	}
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
index c33aac3f71b4..9cc22036349f 100644
--- a/drivers/usb/chipidea/core.c
+++ b/drivers/usb/chipidea/core.c
@@ -1361,12 +1361,12 @@ static void ci_extcon_wakeup_int(struct ci_hdrc *ci)
 	cable_id = &ci->platdata->id_extcon;
 	cable_vbus = &ci->platdata->vbus_extcon;
 
-	if ((!IS_ERR(cable_id->edev) || !IS_ERR(ci->role_switch))
+	if ((!IS_ERR(cable_id->edev) || ci->role_switch)
 		&& ci->is_otg && (otgsc & OTGSC_IDIE)
 		&& (otgsc & OTGSC_IDIS))
 		ci_irq(ci);
 
-	if ((!IS_ERR(cable_vbus->edev) || !IS_ERR(ci->role_switch))
+	if ((!IS_ERR(cable_vbus->edev) || ci->role_switch)
 		&& ci->is_otg && (otgsc & OTGSC_BSVIE)
 		&& (otgsc & OTGSC_BSVIS))
 		ci_irq(ci);
diff --git a/include/uapi/drm/imx_drm.h b/include/uapi/drm/imx_drm.h
index 8578e075f316..7d2189f67a74 100644
--- a/include/uapi/drm/imx_drm.h
+++ b/include/uapi/drm/imx_drm.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2017,2022 NXP
+ * Copyright 2017,2022-2023 NXP
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms of the GNU General Public License as published by the
@@ -43,6 +43,7 @@ struct drm_imx_dpu_frame_info {
 #define DRM_IMX_DPU_SET_CMDLIST                 0x00
 #define DRM_IMX_DPU_WAIT                        0x01
 #define DRM_IMX_DPU_GET_PARAM                   0x02
+#define DRM_IMX_DPU_SYNC_DMABUF                 0x03
 
 #define DRM_IOCTL_IMX_DPU_SET_CMDLIST   DRM_IOWR(DRM_COMMAND_BASE + \
 		DRM_IMX_DPU_SET_CMDLIST, struct drm_imx_dpu_set_cmdlist)
@@ -50,6 +51,8 @@ struct drm_imx_dpu_frame_info {
 		DRM_IMX_DPU_WAIT, struct drm_imx_dpu_wait)
 #define DRM_IOCTL_IMX_DPU_GET_PARAM     DRM_IOWR(DRM_COMMAND_BASE + \
 		DRM_IMX_DPU_GET_PARAM, enum drm_imx_dpu_param)
+#define DRM_IOCTL_IMX_DPU_SYNC_DMABUF   DRM_IOW(DRM_COMMAND_BASE + \
+		DRM_IMX_DPU_SYNC_DMABUF, struct drm_imx_dpu_sync_dmabuf)
 
 /**
  * struct drm_imx_dpu_set_cmdlist - ioctl argument for
@@ -73,6 +76,22 @@ struct drm_imx_dpu_wait {
 	__u64   user_data;
 };
 
+enum drm_imx_dpu_sync_direction {
+	IMX_DPU_SYNC_TO_CPU = 0,
+	IMX_DPU_SYNC_TO_DEVICE = 1,
+	IMX_DPU_SYNC_TO_BOTH = 2,
+};
+
+/**
+ * struct drm_imx_dpu_sync_dmabuf - ioctl argument for
+ * DRM_IMX_DPU_SYNC_DMABUF.
+ *
+ */
+struct drm_imx_dpu_sync_dmabuf {
+	__u32   dmabuf_fd;
+	__u32   direction;
+};
+
 /**
  * enum drm_imx_dpu_param - ioctl argument for
  * DRM_IMX_DPU_GET_PARAM.