diff options
| author | Gao Pan <pandy.gao@nxp.com> | 2018-01-19 11:12:15 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 15:47:56 +0800 |
| commit | 4265cbdb4be03c67b4f8e22f7cda7a344450dd86 (patch) | |
| tree | f0e42932798ede35d108260fe1e73225fd368b1b | |
| parent | bbc881815d099491b2a4abafb7011ae66dca741e (diff) | |
MLK-17416 imx8: sim: add usleep_range() before reading SPDP Bit
Card Presence Detect Status Bit SPDP in EMV_SIM_PCSR is
synchronized by two posedge of low_ref_clk which is 32KHz.
So there should be 1.5 low_ref_clk cycles(about 90us) before
reading SPDP Bit.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
| -rw-r--r-- | drivers/mxc/sim/imx_emvsim.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mxc/sim/imx_emvsim.c b/drivers/mxc/sim/imx_emvsim.c index b87478dcdd34..faddf8a17f11 100644 --- a/drivers/mxc/sim/imx_emvsim.c +++ b/drivers/mxc/sim/imx_emvsim.c @@ -752,6 +752,7 @@ static void emvsim_start(struct emvsim_t *emvsim) clk_div = (clk_rate + emvsim->clk_rate - 1) / emvsim->clk_rate; __raw_writel(clk_div, emvsim->ioaddr + EMV_SIM_CLKCFG); + usleep_range(90, 100); /* SPDP=0: SIM Presence Detect pin is low, default PRESENT status */ if (__raw_readl(emvsim->ioaddr + EMV_SIM_PCSR) & SPDP) { emvsim->present = SIM_PRESENT_REMOVED; |