diff options
| author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2020-03-17 18:26:14 +0800 |
|---|---|---|
| committer | Shengjiu Wang <shengjiu.wang@nxp.com> | 2020-03-18 15:41:50 +0800 |
| commit | 1d46a32f506cc923c1f8d6f334477434e454baeb (patch) | |
| tree | 219619b47734fc875e38426d022daf7fd6d5fede | |
| parent | ee1a47b87fff88e7cb97bc6dce0a8a7fafbd38bc (diff) | |
MLK-23618-7: ASoC: fsl_asrc: Don't bind clock with regmap
The call flow:
devm_regmap_init_mmio_clk
- clk_prepare()
- clk_pm_runtime_get()
Cause the power domain of lpcg clock always be enabled.
which impact the power consumption.
So we can't bind clock with regmap, then explicitly enable
clock when using. As we already enable all clock in
pm_runtime_resume, so only need to enable clock in probe.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
| -rw-r--r-- | sound/soc/fsl/fsl_asrc.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c index 81a3fa9b1d9c..6a93fd929563 100644 --- a/sound/soc/fsl/fsl_asrc.c +++ b/sound/soc/fsl/fsl_asrc.c @@ -1059,7 +1059,7 @@ static int fsl_asrc_probe(struct platform_device *pdev) asrc_priv->paddr = res->start; - asrc_priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "mem", regs, + asrc_priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, regs, &fsl_asrc_regmap_config); if (IS_ERR(asrc_priv->regmap)) { dev_err(&pdev->dev, "failed to init regmap\n"); @@ -1134,12 +1134,18 @@ static int fsl_asrc_probe(struct platform_device *pdev) asrc_priv->dma_type = DMA_EDMA; } + ret = clk_prepare_enable(asrc_priv->mem_clk); + if (ret) + return ret; + ret = fsl_asrc_init(asrc_priv); if (ret) { dev_err(&pdev->dev, "failed to init asrc %d\n", ret); return ret; } + clk_disable_unprepare(asrc_priv->mem_clk); + asrc_priv->channel_avail = 10; ret = of_property_read_u32(np, "fsl,asrc-rate", |