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authorPeter Geis <pgwipeout@gmail.com>2019-06-26 13:04:43 +0000
committerHeiko Stuebner <heiko@sntech.de>2019-06-27 00:22:13 +0200
commit393f3875c385cc6ae3b6069c3a88fe8e24d681ae (patch)
treeb48fe35c4507d4de3fa477874e93bcff5f91b6b6
parentc2aacceedc86af87428d998e23a1aca24fd8aa2e (diff)
arm64: dts: rockchip: improve rk3328-roc-cc rgmii performance.
Currently the rk3328-roc-cc ethernet is enabled using "snps,force_thresh_dma_mode". While this works, the performance leaves a lot to be desired. A previous attempt to improve performance used "snps,txpbl = <0x4>". This also allowed networking to function, but performance varied between boards. This patch takes that one step further. Set txpbl and rxpbl to 0x4. This can also be accomplished with "snps,pbl =<0x4>" which affects both. Also set "snps,aal" which forces address aligned DMA mode. Fixes: 4bc4d6013b7f (arm64: dts: rockchip: fix rk3328-roc-cc gmac2io stability issues) Signed-off-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Leonidas P. Papadakos <papadakospan@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
index 5d499c9086fb..bb40c163b05d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
@@ -141,10 +141,12 @@
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmiim1_pins>;
- snps,force_thresh_dma_mode;
+ snps,aal;
snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
+ snps,rxpbl = <0x4>;
+ snps,txpbl = <0x4>;
tx_delay = <0x24>;
rx_delay = <0x18>;
status = "okay";