diff options
author | Richard Zhu <hongxing.zhu@nxp.com> | 2019-04-28 16:12:58 +0800 |
---|---|---|
committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:04:27 +0800 |
commit | 6945d59d54a93515d81077f1cbc8b4ac30a6e08d (patch) | |
tree | b546d22af44b6b57b6831dea5097986bae99d9d4 | |
parent | cd8bc8edd7fbdea60826347a7005ac8ee7831218 (diff) |
arm64: dts: imx8m: add the rpmsg support
Add the imx8mq/imx8mm rpmsg support.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
-rw-r--r-- | arch/arm64/boot/dts/freescale/Makefile | 4 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm-evk-rpmsg.dts | 57 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm.dtsi | 23 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts | 62 | ||||
-rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8mq.dtsi | 23 |
5 files changed, 167 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 33736c651ce2..e8439c53ec78 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -21,9 +21,9 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls2088a-rdb.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-qds.dtb dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb -dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb imx8mm-evk-rpmsg.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb -dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb imx8mq-evk-rpmsg.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-hummingboard-pulse.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mq-nitrogen.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk-rpmsg.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk-rpmsg.dts new file mode 100644 index 000000000000..98193c5af252 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk-rpmsg.dts @@ -0,0 +1,57 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2019 NXP + */ + +/dts-v1/; + +#include "imx8mm-evk.dts" + +/ { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + m4_reserved: m4@0x80000000 { + no-map; + reg = <0 0x80000000 0 0x1000000>; + }; + + rpmsg_reserved: rpmsg@0xb8000000 { + no-map; + reg = <0 0xb8000000 0 0x400000>; + }; + }; +}; + +/* + * ATTENTION: M4 may use IPs like below + * ECSPI0/ECSPI2, GPIO1/GPIO5, GPT1, I2C3, I2S3, WDOG1, UART4, PWM3, SDMA1 + */ + +&i2c3 { + status = "disabled"; +}; + +&rpmsg{ + /* + * 64K for one rpmsg instance: + * --0xb8000000~0xb800ffff: pingpong + */ + vdev-nums = <1>; + reg = <0x0 0xb8000000 0x0 0x10000>; + status = "okay"; +}; + +&sdma1{ + status = "disabled"; +}; + +&uart4 { + status = "disabled"; +}; + +&sdma3 { + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index c8dc40344176..dbb86d772bf5 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -690,6 +690,15 @@ status = "disabled"; }; + mu: mu@30aa0000 { + compatible = "fsl,imx8mm-mu", "fsl,imx6sx-mu"; + reg = <0x30aa0000 0x10000>; + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_MU_ROOT>; + clock-names = "mu"; + #mbox-cells = <2>; + }; + usdhc1: mmc@30b40000 { compatible = "fsl,imx8mm-usdhc", "fsl,imx7d-usdhc"; reg = <0x30b40000 0x10000>; @@ -866,4 +875,18 @@ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; }; }; + + rpmsg: rpmsg{ + compatible = "fsl,imx8mq-rpmsg"; + /* up to now, the following channels are used in imx rpmsg + * - tx1/rx1: messages channel. + * - general interrupt1: remote proc finish re-init rpmsg stack + * when A core is partition reset. + */ + mbox-names = "tx", "rx", "rxdb"; + mboxes = <&mu 0 1 + &mu 1 1 + &mu 3 1>; + status = "disabled"; + }; }; diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts new file mode 100644 index 000000000000..826c7c82a685 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk-rpmsg.dts @@ -0,0 +1,62 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2019 NXP + */ + +/dts-v1/; + +#include "imx8mq-evk.dts" + +/ { + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + m4_reserved: m4@0x80000000 { + no-map; + reg = <0 0x80000000 0 0x1000000>; + }; + + rpmsg_reserved: rpmsg@0xb8000000 { + no-map; + reg = <0 0xb8000000 0 0x400000>; + }; + }; +}; + +/* + * Regarding to the HW conflications, the following module should be disabled + * when M4 is running on evk board. + * gpt1, i2c2, pwm4, tmu, uart2, wdog3 + */ + +&i2c2 { + status = "disabled"; +}; + +&pwm4 { + status = "disabled"; +}; + +&rpmsg{ + /* + * 64K for one rpmsg instance: + * --0xb8000000~0xb800ffff: pingpong + */ + vdev-nums = <1>; + reg = <0x0 0xb8000000 0x0 0x10000>; + status = "okay"; +}; + +&tmu { + status = "disabled"; +}; + +&uart2 { + status = "disabled"; +}; + +&wdog3{ + status = "disabled"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 9c7fc9d18814..26cdf249a61c 100755 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -845,6 +845,15 @@ status = "disabled"; }; + mu: mu@30aa0000 { + compatible = "fsl,imx8mq-mu", "fsl,imx6sx-mu"; + reg = <0x30aa0000 0x10000>; + interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MQ_CLK_MU_ROOT>; + clock-names = "mu"; + #mbox-cells = <2>; + }; + usdhc1: mmc@30b40000 { compatible = "fsl,imx8mq-usdhc", "fsl,imx7d-usdhc"; @@ -1125,4 +1134,18 @@ status = "disabled"; }; }; + + rpmsg: rpmsg{ + compatible = "fsl,imx8mq-rpmsg"; + /* up to now, the following channels are used in imx rpmsg + * - tx1/rx1: messages channel. + * - general interrupt1: remote proc finish re-init rpmsg stack + * when A core is partition reset. + */ + mbox-names = "tx", "rx", "rxdb"; + mboxes = <&mu 0 1 + &mu 1 1 + &mu 3 1>; + status = "disabled"; + }; }; |