diff options
author | Philippe Schenker <philippe.schenker@toradex.com> | 2020-08-05 20:30:52 +0200 |
---|---|---|
committer | Oleksandr Suvorov <oleksandr.suvorov@toradex.com> | 2021-01-27 20:36:42 +0200 |
commit | 795682b0ab9e82d327412a9481bd689ec31bff4e (patch) | |
tree | 0490fd5507957bb3da88c2a9af7a0e1fe3859b68 | |
parent | 68f701763836773fee3b338c3d548602005e9257 (diff) |
arm64: dts: apalis-imx8: initial devicetree
This commit holds the initial devicetrees for colibri-imx8 module.
They are based on the devicetree from toradex_4.14-2.3.x-imx branch
and contain only a stripped down subset of the features which compile
and should act as a starting point for further bringup on this
branch.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Conflicts:
arch/arm64/boot/dts/freescale/Makefile
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
11 files changed, 1725 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index a2446ed9a912..b2a822e4bec6 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -104,7 +104,13 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek.dtb imx8qm-mek-ov5640.dtb \ imx8qm-lpddr4-val-lpspi.dtb imx8qm-lpddr4-val-lpspi-slave.dtb \ imx8qm-mek-dsi-rm67191.dtb imx8qm-lpddr4-val-dp.dtb\ imx8qp-lpddr4-val.dtb imx8dm-lpddr4-val.dtb imx8qm-pcieax2pciebx1.dtb \ - imx8qm-mek-esai.dtb imx8qm-mek-vop.dtb + imx8qm-mek-esai.dtb imx8qm-mek-vop.dtb \ + imx8qm-apalis-eval.dtb \ + imx8qm-apalis-eval-ar0521.dtb \ + imx8qm-apalis-v1.1-eval.dtb \ + imx8qm-apalis-v1.1-eval-ar0521.dtb \ + imx8qm-apalis-ixora-v1.1.dtb \ + imx8qm-apalis-ixora-v1.1-ar0521.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qm-mek-dom0.dtb imx8qm-mek-domu.dtb \ imx8qm-mek-root.dtb imx8qm-mek-inmate.dtb dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval-ar0521.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval-ar0521.dts new file mode 100644 index 000000000000..d4820cb6e751 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval-ar0521.dts @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2020 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis.dtsi" +#include "imx8qm-apalis-eval.dtsi" + +/ { + model = "Toradex Apalis iMX8QM/QP on Apalis Evaluation Board + e-con Systems AR0521 Camera"; + compatible = "toradex,apalis-imx8qm-eval-ar0521", "toradex,apalis-imx8qm-eval", + "toradex,apalis-imx8qm", "fsl,imx8qm"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio2>, <&pinctrl_gpio4>, + <&pinctrl_gpio_usbh_oc_n>, <&pinctrl_lpuart1ctrl>, + <&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>, + <&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>, + <&pinctrl_mlb_gpios>, <&pinctrl_qspi1a_gpios>, + <&pinctrl_sata1_act>, <&pinctrl_sim0_gpios>, + <&pinctrl_usdhc1_gpios>; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts new file mode 100644 index 000000000000..a990270b3286 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dts @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2019 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis.dtsi" +#include "imx8qm-apalis-eval.dtsi" + +/ { + model = "Toradex Apalis iMX8QM/QP on Apalis Evaluation Board"; + compatible = "toradex,apalis-imx8qm-eval", "toradex,apalis-imx8qm", "fsl,imx8qm"; +};
\ No newline at end of file diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dtsi new file mode 100644 index 000000000000..31d9199b1c58 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-eval.dtsi @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2019 Toradex + */ + +/ { + aliases { + rtc0 = &rtc_i2c; + rtc1 = &rtc; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + regulator-name = "VCC USBH2(ABCD) / USBH(3|4)"; + }; +}; + +/* Apalis I2C2 (DDC) */ +&i2c0 { + status = "okay"; +}; + +/* Apalis I2C1 */ +&i2c2 { + status = "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + compatible = "st,m41t0"; + reg = <0x68>; + }; + + atmel_mxt_ts: atmel_mxt_ts@4a { + compatible = "atmel,maxtouch"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpio5>, <&pinctrl_gpio6>; + reg = <0x4a>; + interrupt-parent = <&lsio_gpio4>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; /* Apalis GPIO5 */ + reset-gpios = <&lsio_gpio4 2 GPIO_ACTIVE_HIGH>; /* Apalis GPIO6 */ + status = "okay"; + }; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + status = "okay"; +}; + +/* Apalis UART3 */ +&lpuart0 { + status = "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status = "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status = "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status = "okay"; +}; + +/* Apalis USBO1 */ +&usbotg1 { + status = "okay"; +}; + +/* Apalis USBH4 SuperSpeed */ +&usbotg3 { + dr_mode = "host"; + vbus-supply = <®_usb_host_vbus>; + status = "okay"; +}; +#if 0 +/* Apalis MMC1 */ +&usdhc2 { + status = "okay"; +}; + +/* Apalis SD1 */ +&usdhc3 { + status = "okay"; +}; +#endif diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1-ar0521.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1-ar0521.dts new file mode 100644 index 000000000000..a87ad5b68a99 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1-ar0521.dts @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2020 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis.dtsi" +#include "imx8qm-apalis-ixora-v1.1.dtsi" + +/ { + model = "Toradex Apalis iMX8QM/QP on Apalis Ixora Board V1.1 + e-con Systems AR0521 Camera"; + compatible = "toradex,apalis-imx8qm-ixora-v1.1-ar0521", "toradex,apalis-imx8qm-ixora-v1.1", + "toradex,apalis-imx8qm-ixora", "toradex,apalis-imx8qm", "fsl,imx8qm"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio2>, <&pinctrl_gpio4>, + <&pinctrl_gpio_usbh_oc_n>, <&pinctrl_lpuart1ctrl>, + <&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>, + <&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>, + <&pinctrl_mlb_gpios>, <&pinctrl_qspi1a_gpios>, + <&pinctrl_sata1_act>, <&pinctrl_sim0_gpios>, + <&pinctrl_usdhc1_gpios>; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts new file mode 100644 index 000000000000..debefd7652d9 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2019 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis.dtsi" +#include "imx8qm-apalis-ixora-v1.1.dtsi" + +/ { + model = "Toradex Apalis iMX8QM/QP on Apalis Ixora V1.1 Carrier Board"; + compatible = "toradex,apalis-imx8qm-ixora-v1.1", "toradex,apalis-imx8qm-ixora", + "toradex,apalis-imx8qm", "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dtsi new file mode 100644 index 000000000000..250ae24f21dc --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-ixora-v1.1.dtsi @@ -0,0 +1,76 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2019 Toradex + */ + +/ { + +}; + +&fec1 { + status = "okay"; +}; + +&lsio_gpio5 { + ngpios = <32>; + gpio-line-names = "gpio5-01", "gpio5-02", "gpio5-03", "gpio5-04", + "gpio5-05", "gpio5-06", "gpio5-07", "gpio5-08", + "gpio5-09", "gpio5-10", "gpio5-11", "gpio5-12", + "gpio5-13", "gpio5-14", "gpio5-15", "gpio5-16", + "gpio5-17", "gpio5-18", "gpio5-19", "LED-5-GREEN", + "LED-5-RED", "gpio5-22", "gpio5-23", "gpio5-24", + "UART24-FORCEOFF", "gpio5-26", "LED-4-GREEN", "gpio5-28", + "LED-4-RED", "gpio5-30", "gpio5-31", "gpio5-32"; +}; + +&iomuxc { + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>,<&pinctrl_gpio_usbh_oc_n>, + <&pinctrl_lpuart1ctrl>, <&pinctrl_lvds0_i2c0_gpio>, + <&pinctrl_lvds1_i2c0_gpios>, <&pinctrl_mipi_dsi_0_1_en>, + <&pinctrl_mipi_dsi1_gpios>, <&pinctrl_mlb_gpios>, + <&pinctrl_qspi1a_gpios>, <&pinctrl_sata1_act>, + <&pinctrl_sim0_gpios>, <&pinctrl_usdhc1_gpios>, + <&pinctrl_uart24_forceoff>; + + pinctrl_leds_ixora: ledsixoragrp { + fsl,pins = < + IMX8QM_USDHC2_DATA1_LSIO_GPIO5_IO27 0x41 /* LED_4_GREEN */ + IMX8QM_USDHC2_DATA3_LSIO_GPIO5_IO29 0x41 /* LED_4_RED */ + IMX8QM_USDHC1_DATA5_LSIO_GPIO5_IO20 0x41 /* LED_5_GREEN */ + IMX8QM_USDHC1_DATA6_LSIO_GPIO5_IO21 0x41 /* LED_5_RED */ + >; + }; + + pinctrl_uart24_forceoff: uart24forceoffgrp { + fsl,pins = < + IMX8QM_USDHC2_CMD_LSIO_GPIO5_IO25 0x21 + >; + }; +}; + +/* Apalis UART3 */ +&lpuart0 { + status = "okay"; +}; + +/* Apalis UART1 */ +&lpuart1 { + status = "okay"; +}; + +/* Apalis UART4 */ +&lpuart2 { + status = "okay"; +}; + +/* Apalis UART2 */ +&lpuart3 { + status = "okay"; +}; + +/* Apalis MMC1 */ +&usdhc2 { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval-ar0521.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval-ar0521.dts new file mode 100644 index 000000000000..c1de4dc7a9e7 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval-ar0521.dts @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2020 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8qm-apalis-eval.dtsi" + +/ { + model = "Toradex Apalis iMX8QM/QP V1.1 on Apalis Eval Board + e-con Systems AR0521 Camera"; + compatible = "toradex,apalis-imx8qm-v1.1-eval-ar0521", "toradex,apalis-imx8qm-v1.1-eval", + "toradex,apalis-imx8qm", "fsl,imx8qm"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio2>, <&pinctrl_gpio4>, + <&pinctrl_gpio_usbh_oc_n>, <&pinctrl_lpuart1ctrl>, + <&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>, + <&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>, + <&pinctrl_mlb_gpios>, <&pinctrl_qspi1a_gpios>, + <&pinctrl_sata1_act>, <&pinctrl_sim0_gpios>, + <&pinctrl_usdhc1_gpios>; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts new file mode 100644 index 000000000000..b36ccd46865f --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1-eval.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2020 Toradex + */ + +/dts-v1/; + +#include "imx8qm-apalis-v1.1.dtsi" +#include "imx8qm-apalis-eval.dtsi" + +/ { + model = "Toradex Apalis iMX8QM/QP V1.1 on Apalis Evaluation Board"; + compatible = "toradex,apalis-imx8qm-v1.1-eval", "toradex,apalis-imx8qm-eval", + "toradex,apalis-imx8qm", "fsl,imx8qm"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi new file mode 100644 index 000000000000..cca7ec84274a --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis-v1.1.dtsi @@ -0,0 +1,1311 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2017-2020 Toradex + */ + +#include <dt-bindings/pwm/pwm.h> +#include "imx8qm.dtsi" + +/ { + model = "Toradex Apalis iMX8QM V1.1"; + compatible = "toradex,apalis-imx8qm-v1.1", "toradex,apalis-imx8qm", "fsl,imx8qm"; + + chosen { + stdout-path = &lpuart1; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + decoder_boot: decoder_boot@0x84000000 { + no-map; + reg = <0 0x84000000 0 0x2000000>; + }; + encoder_boot: encoder_boot@0x86000000 { + no-map; + reg = <0 0x86000000 0 0x400000>; + }; + /* + * reserved-memory layout + * 0x8800_0000 ~ 0x8FFF_FFFF is reserved for M4 + * Shouldn't be used at A core and Linux side. + * + */ + m4_reserved: m4@0x88000000 { + no-map; + reg = <0 0x88000000 0 0x8000000>; + }; + rpmsg_reserved: rpmsg@0x90000000 { + no-map; + reg = <0 0x90200000 0 0x200000>; + }; + decoder_rpc: decoder_rpc@0x92000000 { + no-map; + reg = <0 0x92000000 0 0x200000>; + }; + encoder_rpc: encoder_rpc@0x92200000 { + no-map; + reg = <0 0x92200000 0 0x200000>; + }; + dsp_reserved: dsp@0x92400000 { + no-map; + reg = <0 0x92400000 0 0x2000000>; + }; + encoder_reserved: encoder_reserved@0x94400000 { + no-map; + reg = <0 0x94400000 0 0x800000>; + }; + ts_boot: ts_boot@0x95000000 { + no-map; + reg = <0 0x95000000 0 0x400000>; + }; + + /* global autoconfigured region for contiguous allocations */ + linux,cma { + compatible = "shared-dma-pool"; + reusable; + size = <0 0x3c000000>; + alloc-ranges = <0 0x96000000 0 0x3c000000>; + linux,cma-default; + }; + }; + + reg_module_3v3: regulator-module-3v3 { + compatible = "regulator-fixed"; + regulator-name = "+V3.3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_module_3v3_avdd: regulator-module-3v3-avdd { + compatible = "regulator-fixed"; + regulator-name = "+V3.3_AUDIO"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + reg_module_wifi: regulator-module-wifi { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&lsio_gpio1 28 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wifi_pdn>; + regulator-name = "wifi_pwrdn_fake_regulator"; + regulator-settling-time-us = <100>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + reg_usb_host_vbus: regulator-usb-host-vbus { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbh_en>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + /* Apalis USBH_EN */ + gpio = <&lsio_gpio4 4 GPIO_ACTIVE_HIGH>; + }; + + reg_vref_1v8: regulator-vref-1v8 { + compatible = "regulator-fixed"; + regulator-name = "+V1.8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; +}; + +/* Apalis GLAN */ +&fec1 { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&pinctrl_fec1>; + pinctrl-1 = <&pinctrl_fec1_sleep>; + fsl,magic-packet; + fsl,rgmii_txc_dly; + phy-handle = <ðphy0>; + phy-mode = "rgmii-rxid"; + phy-reset-duration = <10>; + phy-reset-gpios = <&lsio_gpio1 11 GPIO_ACTIVE_LOW>; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c22"; + interrupt-parent = <&lsio_gpio1>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; + micrel,led-mode = <0>; + reg = <7>; + }; + }; +}; + +/* On-module I2C */ +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c1>; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + status = "okay"; + + /* USB3503A */ + usb3503@8 { + compatible = "smsc,usb3503a"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb3503a>; + connect-gpios = <&lsio_gpio0 31 GPIO_ACTIVE_LOW>; + initial-mode = <1>; + intn-gpios = <&lsio_gpio1 1 GPIO_ACTIVE_LOW>; + refclk-frequency = <25000000>; + reg = <0x08>; + reset-gpios = <&lsio_gpio1 2 GPIO_ACTIVE_LOW>; + }; +}; + +/* Apalis I2C1 */ +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c2>; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; +}; + +/* Apalis I2C3 (CAM) */ +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c3>; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_cam1_gpios>, <&pinctrl_dap1_gpios>, + <&pinctrl_esai0_gpios>, <&pinctrl_fec2_gpios>, + <&pinctrl_gpio3>, <&pinctrl_gpio4>, + <&pinctrl_gpio_usbh_oc_n>, <&pinctrl_lpuart1ctrl>, + <&pinctrl_lvds0_i2c0_gpio>, <&pinctrl_lvds1_i2c0_gpios>, + <&pinctrl_mipi_dsi_0_1_en>, <&pinctrl_mipi_dsi1_gpios>, + <&pinctrl_mlb_gpios>, <&pinctrl_qspi1a_gpios>, + <&pinctrl_sata1_act>, <&pinctrl_sim0_gpios>, + <&pinctrl_usdhc1_gpios>; + + apalis-imx8qm { + /* Apalis AN1_ADC */ + pinctrl_adc0: adc0grp { + fsl,pins = < + /* Apalis AN1_ADC0 */ + IMX8QM_ADC_IN0_DMA_ADC0_IN0 0xc0000060 + /* Apalis AN1_ADC1 */ + IMX8QM_ADC_IN1_DMA_ADC0_IN1 0xc0000060 + /* Apalis AN1_ADC2 */ + IMX8QM_ADC_IN2_DMA_ADC0_IN2 0xc0000060 + /* Apalis AN1_TSWIP_ADC3 */ + IMX8QM_ADC_IN3_DMA_ADC0_IN3 0xc0000060 + >; + }; + + /* Apalis AN1_TS */ + pinctrl_adc1: adc1grp { + fsl,pins = < + /* Apalis AN1_TSPX */ + IMX8QM_ADC_IN4_DMA_ADC1_IN0 0xc0000060 + /* Apalis AN1_TSMX */ + IMX8QM_ADC_IN5_DMA_ADC1_IN1 0xc0000060 + /* Apalis AN1_TSPY */ + IMX8QM_ADC_IN6_DMA_ADC1_IN2 0xc0000060 + /* Apalis AN1_TSMY */ + IMX8QM_ADC_IN7_DMA_ADC1_IN3 0xc0000060 + >; + }; + + /* Apalis BKL_ON */ + pinctrl_gpio_bkl_on: gpio-bkl-on { + fsl,pins = < + IMX8QM_LVDS0_GPIO00_LSIO_GPIO1_IO04 0x00000021 + >; + }; + + /* Apalis BKL1_PWM */ + pinctrl_pwm_bkl: pwmbklgrp { + fsl,pins = < + IMX8QM_LVDS1_GPIO00_LVDS1_PWM0_OUT 0x00000020 + >; + }; + + /* Apalis CAM1 */ + pinctrl_cam1_gpios: cam1gpiosgrp { + fsl,pins = < + /* Apalis CAM1_D7 */ + IMX8QM_MIPI_DSI1_I2C0_SCL_LSIO_GPIO1_IO20 0x00000021 + /* Apalis CAM1_D6 */ + IMX8QM_MIPI_DSI1_I2C0_SDA_LSIO_GPIO1_IO21 0x00000021 + /* Apalis CAM1_D5 */ + IMX8QM_ESAI0_TX0_LSIO_GPIO2_IO26 0x00000021 + /* Apalis CAM1_D4 */ + IMX8QM_ESAI0_TX1_LSIO_GPIO2_IO27 0x00000021 + /* Apalis CAM1_D3 */ + IMX8QM_ESAI0_TX2_RX3_LSIO_GPIO2_IO28 0x00000021 + /* Apalis CAM1_D2 */ + IMX8QM_ESAI0_TX3_RX2_LSIO_GPIO2_IO29 0x00000021 + /* Apalis CAM1_D1 */ + IMX8QM_ESAI0_TX4_RX1_LSIO_GPIO2_IO30 0x00000021 + /* Apalis CAM1_D0 */ + IMX8QM_ESAI0_TX5_RX0_LSIO_GPIO2_IO31 0x00000021 + /* Apalis CAM1_PCLK */ + IMX8QM_MCLK_IN0_LSIO_GPIO3_IO00 0x00000021 + /* Apalis CAM1_MCLK */ + IMX8QM_SPI3_SDO_LSIO_GPIO2_IO18 0x00000021 + /* Apalis CAM1_VSYNC */ + IMX8QM_ESAI0_SCKR_LSIO_GPIO2_IO24 0x00000021 + /* Apalis CAM1_HSYNC */ + IMX8QM_ESAI0_SCKT_LSIO_GPIO2_IO25 0x00000021 + >; + }; + + /* Apalis CAN1 */ + pinctrl_flexcan1: flexcan0grp { + fsl,pins = < + IMX8QM_FLEXCAN0_TX_DMA_FLEXCAN0_TX 0x21 + IMX8QM_FLEXCAN0_RX_DMA_FLEXCAN0_RX 0x21 + >; + }; + + /* Apalis CAN2 */ + pinctrl_flexcan2: flexcan1grp { + fsl,pins = < + IMX8QM_FLEXCAN1_TX_DMA_FLEXCAN1_TX 0x21 + IMX8QM_FLEXCAN1_RX_DMA_FLEXCAN1_RX 0x21 + >; + }; + + /* Apalis DAP1 */ + pinctrl_dap1_gpios: dap1gpiosgrp { + fsl,pins = < + /* Apalis DAP1_MCLK */ + IMX8QM_SPI3_SDI_LSIO_GPIO2_IO19 0x00000021 + /* Apalis DAP1_D_OUT */ + IMX8QM_SAI1_RXC_LSIO_GPIO3_IO12 0x00000021 + /* Apalis DAP1_RESET */ + IMX8QM_ESAI1_SCKT_LSIO_GPIO2_IO07 0x00000021 + /* Apalis DAP1_BIT_CLK */ + IMX8QM_SPI0_CS1_LSIO_GPIO3_IO06 0x00000021 + /* Apalis DAP1_D_IN */ + IMX8QM_SAI1_RXFS_LSIO_GPIO3_IO14 0x00000021 + /* Apalis DAP1_SYNC */ + IMX8QM_SPI2_CS1_LSIO_GPIO3_IO11 0x00000021 + /* On-module Wi-Fi_I2S_EN# */ + IMX8QM_ESAI1_TX5_RX0_LSIO_GPIO2_IO13 0x00000021 + >; + }; + + /* Apalis GPIO1 */ + pinctrl_gpio1: gpio1grp { + fsl,pins = < + IMX8QM_M40_GPIO0_00_LSIO_GPIO0_IO08 0x06000021 + >; + }; + + /* Apalis GPIO2 */ + pinctrl_gpio2: gpio2grp { + fsl,pins = < + IMX8QM_M40_GPIO0_01_LSIO_GPIO0_IO09 0x06000021 + >; + }; + + /* Apalis GPIO3 */ + pinctrl_gpio3: gpio3grp { + fsl,pins = < + IMX8QM_M41_GPIO0_00_LSIO_GPIO0_IO12 0x06000021 + >; + }; + + /* Apalis GPIO4 */ + pinctrl_gpio4: gpio4grp { + fsl,pins = < + IMX8QM_M41_GPIO0_01_LSIO_GPIO0_IO13 0x06000021 + >; + }; + + /* Apalis GPIO5 */ + pinctrl_gpio5: gpio5grp { + fsl,pins = < + IMX8QM_FLEXCAN2_RX_LSIO_GPIO4_IO01 0x06000021 + >; + }; + + /* Apalis GPIO6 */ + pinctrl_gpio6: gpio6grp { + fsl,pins = < + IMX8QM_FLEXCAN2_TX_LSIO_GPIO4_IO02 0x06000021 + >; + }; + + /* Apalis GPIO7 */ + pinctrl_gpio7: gpio7grp { + fsl,pins = < + IMX8QM_MLB_SIG_LSIO_GPIO3_IO26 0x00000021 + >; + }; + + /* Apalis GPIO8 */ + pinctrl_gpio8: gpio8grp { + fsl,pins = < + IMX8QM_MLB_DATA_LSIO_GPIO3_IO28 0x00000021 + >; + }; + + /* Apalis I2C1 */ + pinctrl_lpi2c2: lpi2c2grp { + fsl,pins = < + IMX8QM_GPT1_CLK_DMA_I2C2_SCL 0x04000020 + IMX8QM_GPT1_CAPTURE_DMA_I2C2_SDA 0x04000020 + >; + }; + + /* Apalis I2C3 (CAM) */ + pinctrl_lpi2c3: lpi2c3grp { + fsl,pins = < + IMX8QM_SIM0_PD_DMA_I2C3_SCL 0x04000020 + IMX8QM_SIM0_POWER_EN_DMA_I2C3_SDA 0x04000020 + >; + }; + + /* Apalis LCD1_G1+2 */ + pinctrl_esai0_gpios: esai0gpiosgrp { + fsl,pins = < + /* Apalis LCD1_G1 */ + IMX8QM_ESAI0_FSR_LSIO_GPIO2_IO22 0x00000021 + /* Apalis LCD1_G2 */ + IMX8QM_ESAI0_FST_LSIO_GPIO2_IO23 0x00000021 + >; + }; + + /* Apalis LCD1_G6+7 */ + pinctrl_lvds1_i2c0_gpios: lvds1i2c0gpiosgrp { + fsl,pins = < + /* Apalis LCD1_G6 */ + IMX8QM_LVDS1_I2C0_SCL_LSIO_GPIO1_IO12 0x00000021 + /* Apalis LCD1_G7 */ + IMX8QM_LVDS1_I2C0_SDA_LSIO_GPIO1_IO13 0x00000021 + >; + }; + + /* Apalis LCD1_ */ + pinctrl_fec2_gpios: fec2gpiosgrp { + fsl,pins = < + IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA_PAD 0x000014a0 + /* Apalis LCD1_R1 */ + IMX8QM_ENET1_MDC_LSIO_GPIO4_IO18 0x00000021 + /* Apalis LCD1_R0 */ + IMX8QM_ENET1_MDIO_LSIO_GPIO4_IO17 0x00000021 + /* Apalis LCD1_G0 */ + IMX8QM_ENET1_REFCLK_125M_25M_LSIO_GPIO4_IO16 0x00000021 + /* Apalis LCD1_R7 */ + IMX8QM_ENET1_RGMII_RX_CTL_LSIO_GPIO6_IO17 0x00000021 + /* Apalis LCD1_DE */ + IMX8QM_ENET1_RGMII_RXD0_LSIO_GPIO6_IO18 0x00000021 + /* Apalis LCD1_HSYNC */ + IMX8QM_ENET1_RGMII_RXD1_LSIO_GPIO6_IO19 0x00000021 + /* Apalis LCD1_VSYNC */ + IMX8QM_ENET1_RGMII_RXD2_LSIO_GPIO6_IO20 0x00000021 + /* Apalis LCD1_PCLK */ + IMX8QM_ENET1_RGMII_RXD3_LSIO_GPIO6_IO21 0x00000021 + /* Apalis LCD1_R6 */ + IMX8QM_ENET1_RGMII_TX_CTL_LSIO_GPIO6_IO11 0x00000021 + /* Apalis LCD1_R5 */ + IMX8QM_ENET1_RGMII_TXC_LSIO_GPIO6_IO10 0x00000021 + /* Apalis LCD1_R4 */ + IMX8QM_ENET1_RGMII_TXD0_LSIO_GPIO6_IO12 0x00000021 + /* Apalis LCD1_R3 */ + IMX8QM_ENET1_RGMII_TXD1_LSIO_GPIO6_IO13 0x00000021 + /* Apalis LCD1_R2 */ + IMX8QM_ENET1_RGMII_TXD2_LSIO_GPIO6_IO14 0x00000021 + >; + }; + + /* Apalis LCD1_ */ + pinctrl_qspi1a_gpios: qspi1agpiosgrp { + fsl,pins = < + /* Apalis LCD1_B0 */ + IMX8QM_QSPI1A_DATA0_LSIO_GPIO4_IO26 0x00000021 + /* Apalis LCD1_B1 */ + IMX8QM_QSPI1A_DATA1_LSIO_GPIO4_IO25 0x00000021 + /* Apalis LCD1_B2 */ + IMX8QM_QSPI1A_DATA2_LSIO_GPIO4_IO24 0x00000021 + /* Apalis LCD1_B3 */ + IMX8QM_QSPI1A_DATA3_LSIO_GPIO4_IO23 0x00000021 + /* Apalis LCD1_B5 */ + IMX8QM_QSPI1A_DQS_LSIO_GPIO4_IO22 0x00000021 + /* Apalis LCD1_B7 */ + IMX8QM_QSPI1A_SCLK_LSIO_GPIO4_IO21 0x00000021 + /* Apalis LCD1_B4 */ + IMX8QM_QSPI1A_SS0_B_LSIO_GPIO4_IO19 0x00000021 + /* Apalis LCD1_B6 */ + IMX8QM_QSPI1A_SS1_B_LSIO_GPIO4_IO20 0x00000021 + >; + }; + + /* Apalis LCD1_ */ + pinctrl_sim0_gpios: sim0gpiosgrp { + fsl,pins = < + /* Apalis LCD1_G5 */ + IMX8QM_SIM0_CLK_LSIO_GPIO0_IO00 0x00000021 + /* Apalis LCD1_G3 */ + IMX8QM_SIM0_GPIO0_00_LSIO_GPIO0_IO05 0x00000021 + /* Apalis TS_5 */ + IMX8QM_SIM0_IO_LSIO_GPIO0_IO02 0x00000021 + /* Apalis LCD1_G4 */ + IMX8QM_SIM0_RST_LSIO_GPIO0_IO01 0x00000021 + >; + }; + + /* Apalis MMC1_CD# */ + pinctrl_mmc1_cd: mmc1cdgrp { + fsl,pins = < + IMX8QM_ESAI1_TX1_LSIO_GPIO2_IO09 0x00000021 + >; + }; + + /* Apalis MMC1 */ + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000041 + IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000021 + IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000021 + IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000021 + IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000021 + IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000021 + IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 0x00000021 + IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 0x00000021 + IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 0x00000021 + IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 0x00000021 + /* On-module PMIC use */ + IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000021 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp100mhz { + fsl,pins = < + IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000040 + IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000020 + IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000020 + IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000020 + IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000020 + IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000020 + IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 0x00000020 + IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 0x00000020 + IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 0x00000020 + IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 0x00000020 + /* On-module PMIC use */ + IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000020 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp200mhz { + fsl,pins = < + IMX8QM_USDHC1_CLK_CONN_USDHC1_CLK 0x06000040 + IMX8QM_USDHC1_CMD_CONN_USDHC1_CMD 0x00000020 + IMX8QM_USDHC1_DATA0_CONN_USDHC1_DATA0 0x00000020 + IMX8QM_USDHC1_DATA1_CONN_USDHC1_DATA1 0x00000020 + IMX8QM_USDHC1_DATA2_CONN_USDHC1_DATA2 0x00000020 + IMX8QM_USDHC1_DATA3_CONN_USDHC1_DATA3 0x00000020 + IMX8QM_USDHC1_DATA4_CONN_USDHC1_DATA4 0x00000020 + IMX8QM_USDHC1_DATA5_CONN_USDHC1_DATA5 0x00000020 + IMX8QM_USDHC1_DATA6_CONN_USDHC1_DATA6 0x00000020 + IMX8QM_USDHC1_DATA7_CONN_USDHC1_DATA7 0x00000020 + /* On-module PMIC use */ + IMX8QM_USDHC1_VSELECT_CONN_USDHC1_VSELECT 0x00000020 + >; + }; + + /* Apalis PWM1 */ + pinctrl_pwm2: pwm2grp { + fsl,pins = < + IMX8QM_GPT1_COMPARE_LSIO_PWM2_OUT 0x00000020 + >; + }; + + /* Apalis PWM2 */ + pinctrl_pwm3: pwm3grp { + fsl,pins = < + IMX8QM_GPT0_COMPARE_LSIO_PWM3_OUT 0x00000020 + >; + }; + + /* Apalis PWM3 */ + pinctrl_pwm0: pwm0grp { + fsl,pins = < + IMX8QM_UART0_RTS_B_LSIO_PWM0_OUT 0x00000020 + >; + }; + + /* Apalis PWM4 */ + pinctrl_pwm1: pwm1grp { + fsl,pins = < + IMX8QM_UART0_CTS_B_LSIO_PWM1_OUT 0x00000020 + >; + }; + + /* Apalis SATA1_ACT# */ + pinctrl_sata1_act: sata1actgrp { + fsl,pins = < + IMX8QM_ESAI1_TX0_LSIO_GPIO2_IO08 0x00000021 + >; + }; + + /* Apalis SD1_CD# */ + pinctrl_sd1_cd: sd1cdgrp { + fsl,pins = < + IMX8QM_USDHC2_CD_B_LSIO_GPIO4_IO12 0x00000021 + >; + }; + + /* Apalis SD1 */ + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041 + IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021 + IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021 + IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021 + IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021 + IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021 + /* On-module PMIC use */ + IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021 + >; + }; + + pinctrl_touchctrl_idle: touchctrl_idle { + fsl,pins = < + IMX8QM_ADC_IN4_LSIO_GPIO3_IO22 0x00000021 + IMX8QM_ADC_IN5_LSIO_GPIO3_IO23 0x00000021 + IMX8QM_ADC_IN6_LSIO_GPIO3_IO24 0x00000021 + IMX8QM_ADC_IN7_LSIO_GPIO3_IO25 0x00000021 + >; + }; + + pinctrl_touchctrl_gpios: touchctrl_gpios { + fsl,pins = < + IMX8QM_ESAI1_FSR_LSIO_GPIO2_IO04 0x00000021 + IMX8QM_ESAI1_FST_LSIO_GPIO2_IO05 0x00000041 + IMX8QM_SPI3_SCK_LSIO_GPIO2_IO17 0x00000021 + IMX8QM_SPI3_CS1_LSIO_GPIO2_IO21 0x00000041 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp100mhz { + fsl,pins = < + IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041 + IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021 + IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021 + IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021 + IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021 + IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021 + /* On-module PMIC use */ + IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp200mhz { + fsl,pins = < + IMX8QM_USDHC2_CLK_CONN_USDHC2_CLK 0x06000041 + IMX8QM_USDHC2_CMD_CONN_USDHC2_CMD 0x00000021 + IMX8QM_USDHC2_DATA0_CONN_USDHC2_DATA0 0x00000021 + IMX8QM_USDHC2_DATA1_CONN_USDHC2_DATA1 0x00000021 + IMX8QM_USDHC2_DATA2_CONN_USDHC2_DATA2 0x00000021 + IMX8QM_USDHC2_DATA3_CONN_USDHC2_DATA3 0x00000021 + /* On-module PMIC use */ + IMX8QM_USDHC2_VSELECT_CONN_USDHC2_VSELECT 0x00000021 + >; + }; + + /* Apalis SPDIF */ + pinctrl_spdif0: spdif0grp { + fsl,pins = < + IMX8QM_SPDIF0_TX_AUD_SPDIF0_TX 0xc6000040 + IMX8QM_SPDIF0_RX_AUD_SPDIF0_RX 0xc6000040 + >; + }; + + /* Apalis SPI1 */ + pinctrl_lpspi0: lpspi0grp { + fsl,pins = < + IMX8QM_SPI0_SCK_DMA_SPI0_SCK 0x0600004c + IMX8QM_SPI0_SDO_DMA_SPI0_SDO 0x0600004c + IMX8QM_SPI0_SDI_DMA_SPI0_SDI 0x0600004c + IMX8QM_SPI0_CS0_LSIO_GPIO3_IO05 0x0600004c + >; + }; + + /* Apalis SPI2 */ + pinctrl_lpspi2: lpspi2grp { + fsl,pins = < + IMX8QM_SPI2_SCK_DMA_SPI2_SCK 0x0600004c + IMX8QM_SPI2_SDO_DMA_SPI2_SDO 0x0600004c + IMX8QM_SPI2_SDI_DMA_SPI2_SDI 0x0600004c + IMX8QM_SPI2_CS0_LSIO_GPIO3_IO10 0x0600004c + >; + }; + + /* Apalis TS_1 */ + pinctrl_mlb_gpios: mlbgpiosgrp { + fsl,pins = < + IMX8QM_MLB_CLK_LSIO_GPIO3_IO27 0x00000021 + >; + }; + + /* Apalis TS_2 */ + pinctrl_lvds0_i2c0_gpio: lvds0i2c0gpio { + fsl,pins = < + IMX8QM_LVDS0_I2C0_SCL_LSIO_GPIO1_IO06 0x00000021 + >; + }; + + /* Apalis TS_3 */ + pinctrl_mipi_dsi_0_1_en: mipi_dsi_0_1_en { + fsl,pins = < + IMX8QM_LVDS0_I2C0_SDA_LSIO_GPIO1_IO07 0x00000021 + >; + }; + + /* Apalis TS_4 */ + pinctrl_mipi_dsi1_gpios: mipidsi1gpiosgrp { + fsl,pins = < + IMX8QM_MIPI_DSI1_GPIO0_00_LSIO_GPIO1_IO22 0x00000021 + >; + }; + + /* Apalis TS_6 */ + pinctrl_usdhc1_gpios: usdhc1gpiosgrp { + fsl,pins = < + IMX8QM_USDHC1_STROBE_LSIO_GPIO5_IO23 0x00000021 + >; + }; + + /* Apalis UART1 */ + pinctrl_lpuart1: lpuart1grp { + fsl,pins = < + IMX8QM_UART1_RX_DMA_UART1_RX 0x06000020 + IMX8QM_UART1_TX_DMA_UART1_TX 0x06000020 + IMX8QM_UART1_CTS_B_DMA_UART1_CTS_B 0x06000020 + IMX8QM_UART1_RTS_B_DMA_UART1_RTS_B 0x06000020 + >; + }; + + /* Apalis UART1_ */ + pinctrl_lpuart1ctrl: lpuart1ctrlgrp { + fsl,pins = < + /* Apalis UART1_DTR */ + IMX8QM_M40_I2C0_SCL_LSIO_GPIO0_IO06 0x00000021 + /* Apalis UART1_DSR */ + IMX8QM_M40_I2C0_SDA_LSIO_GPIO0_IO07 0x00000021 + /* Apalis UART1_DCD */ + IMX8QM_M41_I2C0_SCL_LSIO_GPIO0_IO10 0x00000021 + /* Apalis UART1_RI */ + IMX8QM_M41_I2C0_SDA_LSIO_GPIO0_IO11 0x00000021 + >; + }; + + /* Apalis UART2 */ + pinctrl_lpuart3: lpuart3grp { + fsl,pins = < + IMX8QM_LVDS1_I2C1_SCL_DMA_UART3_TX 0x06000020 + IMX8QM_LVDS1_I2C1_SDA_DMA_UART3_RX 0x06000020 + IMX8QM_ENET1_RGMII_TXD3_DMA_UART3_RTS_B 0x06000020 + IMX8QM_ENET1_RGMII_RXC_DMA_UART3_CTS_B 0x06000020 + >; + }; + + /* Apalis UART3 */ + pinctrl_lpuart0: lpuart0grp { + fsl,pins = < + IMX8QM_UART0_RX_DMA_UART0_RX 0x06000020 + IMX8QM_UART0_TX_DMA_UART0_TX 0x06000020 + >; + }; + + /* Apalis UART4 */ + pinctrl_lpuart2: lpuart2grp { + fsl,pins = < + IMX8QM_LVDS0_I2C1_SCL_DMA_UART2_TX 0x06000020 + IMX8QM_LVDS0_I2C1_SDA_DMA_UART2_RX 0x06000020 + >; + }; + + /* Apalis USBH_EN */ + pinctrl_usbh_en: usbhen { + fsl,pins = < + IMX8QM_USB_SS3_TC1_LSIO_GPIO4_IO04 0x00000021 + >; + }; + + /* Apalis USBH_OC# */ + pinctrl_gpio_usbh_oc_n: gpiousbhocn { + fsl,pins = < + IMX8QM_USB_SS3_TC3_LSIO_GPIO4_IO06 0x04000021 + >; + }; + + /* Apalis USBO1 */ + pinctrl_usbotg1: usbotg1 { + fsl,pins = < + /* Apalis USBO1_EN */ + IMX8QM_USB_SS3_TC0_CONN_USB_OTG1_PWR 0x00000021 + /* Apalis USBO1_OC# */ + IMX8QM_USB_SS3_TC2_CONN_USB_OTG1_OC 0x04000021 + >; + }; + + /* Apalis WAKE1_MICO */ + pinctrl_gpio_keys: gpio-keys { + fsl,pins = < + IMX8QM_SPI3_CS0_LSIO_GPIO2_IO20 0x06700021 + >; + }; + + /* On-module eMMC */ + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 0x06000041 + IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD 0x00000021 + IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000021 + IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000021 + IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000021 + IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000021 + IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000021 + IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000021 + IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000021 + IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000021 + IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000041 + IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000021 + >; + }; + + pinctrl_usdhc1_100mhz: usdhc1grp100mhz { + fsl,pins = < + IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 0x06000040 + IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD 0x00000020 + IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000020 + IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000020 + IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000020 + IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000020 + IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000020 + IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020 + IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020 + IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020 + IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000040 + IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000020 + >; + }; + + pinctrl_usdhc1_200mhz: usdhc1grp200mhz { + fsl,pins = < + IMX8QM_EMMC0_CLK_CONN_EMMC0_CLK 0x06000040 + IMX8QM_EMMC0_CMD_CONN_EMMC0_CMD 0x00000020 + IMX8QM_EMMC0_DATA0_CONN_EMMC0_DATA0 0x00000020 + IMX8QM_EMMC0_DATA1_CONN_EMMC0_DATA1 0x00000020 + IMX8QM_EMMC0_DATA2_CONN_EMMC0_DATA2 0x00000020 + IMX8QM_EMMC0_DATA3_CONN_EMMC0_DATA3 0x00000020 + IMX8QM_EMMC0_DATA4_CONN_EMMC0_DATA4 0x00000020 + IMX8QM_EMMC0_DATA5_CONN_EMMC0_DATA5 0x00000020 + IMX8QM_EMMC0_DATA6_CONN_EMMC0_DATA6 0x00000020 + IMX8QM_EMMC0_DATA7_CONN_EMMC0_DATA7 0x00000020 + IMX8QM_EMMC0_STROBE_CONN_EMMC0_STROBE 0x06000040 + IMX8QM_EMMC0_RESET_B_CONN_EMMC0_RESET_B 0x00000020 + >; + }; + + /* On-module Gigabit Ethernet PHY Micrel KSZ9031 for Apalis GLAN */ + pinctrl_fec1: fec1grp { + fsl,pins = < + IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0 /* Use pads in 3.3V mode */ + IMX8QM_ENET0_MDC_CONN_ENET0_MDC 0x06000020 + IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 + IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020 + IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020 + IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020 + IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020 + IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020 + IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020 + IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020 + IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020 + IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020 + IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020 + IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020 + IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020 + IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M 0x06000020 + /* On-module ETH_RESET# */ + IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x06000020 + /* On-module ETH_INT# */ + IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_IO29 0x04000060 + >; + }; + + pinctrl_fec1_sleep: fec1-sleepgrp { + fsl,pins = < + IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0 + IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14 0x04000040 + IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13 0x04000040 + IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_IO31 0x04000040 + IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30 0x04000040 + IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO00 0x04000040 + IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO01 0x04000040 + IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO02 0x04000040 + IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO03 0x04000040 + IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04 0x04000040 + IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_IO05 0x04000040 + IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO06 0x04000040 + IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO07 0x04000040 + IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08 0x04000040 + IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09 0x04000040 + IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15 0x04000040 + IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x04000040 + IMX8QM_MIPI_CSI1_MCLK_OUT_LSIO_GPIO1_IO29 0x04000040 + >; + }; + + /* On-module HDMI_CTRL */ + pinctrl_hdmi_ctrl: hdmictrlgrp { + fsl,pins = < + IMX8QM_MIPI_CSI1_GPIO0_00_LSIO_GPIO1_IO30 0x00000061 + >; + }; + + /* On-module I2C */ + pinctrl_lpi2c1: lpi2c1grp { + fsl,pins = < + IMX8QM_GPT0_CLK_DMA_I2C1_SCL 0x04000020 + IMX8QM_GPT0_CAPTURE_DMA_I2C1_SDA 0x04000020 + >; + }; + + /* On-module I2S SGTL5000 for Apalis Analogue Audio */ + pinctrl_sai1: sai1grp { + fsl,pins = < + IMX8QM_SAI1_TXD_AUD_SAI1_TXD 0xc600006c + IMX8QM_SAI1_RXD_AUD_SAI1_RXD 0xc600004c + IMX8QM_SAI1_TXC_AUD_SAI1_TXC 0xc600004c + IMX8QM_SAI1_TXFS_AUD_SAI1_TXFS 0xc600004c + >; + }; + + /* On-module I2S SGTL5000 SYS_MCLK */ + pinctrl_sgtl5000: sgtl5000grp { + fsl,pins = < + IMX8QM_MCLK_OUT0_AUD_ACM_MCLK_OUT0 0xc600004c + >; + }; + + /* On-module PCIe_CLK_EN1 */ + pinctrl_pcie_sata_refclk: pciesatarefclkgrp { + fsl,pins = < + IMX8QM_USDHC2_WP_LSIO_GPIO4_IO11 0x00000021 + >; + }; + + /* On-module PCIe_CLK_EN2 */ + pinctrl_pcie_wifi_refclk: pciewifirefclkgrp { + fsl,pins = < + IMX8QM_ESAI1_TX3_RX2_LSIO_GPIO2_IO11 0x00000021 + >; + }; + + /* On-module PCIe_Wi-Fi */ + pinctrl_pcieb: pciebgrp { + fsl,pins = < + IMX8QM_PCIE_CTRL1_CLKREQ_B_LSIO_GPIO4_IO30 0x00000021 + IMX8QM_PCIE_CTRL1_WAKE_B_LSIO_GPIO4_IO31 0x00000021 + IMX8QM_PCIE_CTRL1_PERST_B_LSIO_GPIO5_IO00 0x00000021 + >; + }; + + /* On-module RESET_MOCI#_DRV */ + pinctrl_reset_moci: resetmocigrp { + fsl,pins = < + IMX8QM_SCU_GPIO0_02_LSIO_GPIO0_IO30 0x00000021 + >; + }; + + /* On-module USB HSIC HUB */ + pinctrl_usb3503a: usb3503agrp { + fsl,pins = < + /* On-module HSIC_HUB_CONNECT */ + IMX8QM_SCU_GPIO0_03_LSIO_GPIO0_IO31 0x00000041 + /* On-module HSIC_INT_N */ + IMX8QM_SCU_GPIO0_05_LSIO_GPIO1_IO01 0x00000021 + /* On-module HSIC_RESET_N */ + IMX8QM_SCU_GPIO0_06_LSIO_GPIO1_IO02 0x00000041 + >; + }; + + /* On-module USB HSIC HUB (idle) */ + pinctrl_usb_hsic_idle: usbh1_1 { + fsl,pins = < + IMX8QM_USB_HSIC0_DATA_CONN_USB_HSIC0_DATA 0xc60000c5 + IMX8QM_USB_HSIC0_STROBE_CONN_USB_HSIC0_STROBE 0xc60000c5 + >; + }; + + /* On-module USB HSIC HUB (active) */ + pinctrl_usb_hsic_active: usbh1_2 { + fsl,pins = < + IMX8QM_USB_HSIC0_STROBE_CONN_USB_HSIC0_STROBE 0xc60000d5 + >; + }; + + /* On-module Wi-Fi */ + pinctrl_wifi: wifigrp { + fsl,pins = < + /* On-module Wi-Fi_SUSCLK_32k */ + IMX8QM_SCU_GPIO0_07_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x06000021 + /* On-module Wi-Fi_PCIE_W_DISABLE */ + IMX8QM_MIPI_CSI0_MCLK_OUT_LSIO_GPIO1_IO24 0x06000021 + >; + }; + + pinctrl_wifi_pdn: wifipdngrp { + fsl,pins = < + /* On-module Wi-Fi_POWER_DOWN */ + IMX8QM_MIPI_CSI0_GPIO0_01_LSIO_GPIO1_IO28 0x06000021 + >; + }; + }; +}; + +&irqsteer_csi0 { + status = "okay"; +}; + +&irqsteer_csi1 { + status = "okay"; +}; + +&lsio_gpio0 { + gpio-line-names = "MXM3_279", + "MXM3_277", + "MXM3_135", + "MXM3_203", + "MXM3_201", + "MXM3_275", + "MXM3_110", + "MXM3_120", + "MXM3_1/GPIO1", + "MXM3_3/GPIO2", + "MXM3_124", + "MXM3_122", + "MXM3_5/GPIO3", + "MXM3_7/GPIO4", + "", + "", + "MXM3_4", + "MXM3_211", + "MXM3_209", + "MXM3_2", + "MXM3_136", + "MXM3_134", + "MXM3_6", + "MXM3_8", + "MXM3_112", + "MXM3_118", + "MXM3_114", + "MXM3_116"; + + /* Todo: Remove that again when adding PCIE */ + reset_moci { + gpio-hog; + gpios = <30 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +&lsio_gpio1 { + gpio-line-names = "", + "", + "", + "", + "MXM3_286", + "", + "MXM3_87", + "MXM3_99", + "MXM3_138", + "MXM3_140", + "MXM3_239", + "", + "MXM3_281", + "MXM3_283", + "MXM3_126", + "MXM3_132", + "", + "", + "", + "", + "MXM3_173", + "MXM3_175", + "MXM3_123"; +}; + +&lsio_gpio2 { + gpio-line-names = "", + "", + "", + "", + "", + "", + "", + "MXM3_198", + "MXM3_35", + "MXM3_164", + "", + "", + "", + "", + "MXM3_217", + "MXM3_215", + "", + "", + "MXM3_193", + "MXM3_194", + "MXM3_37", + "", + "MXM3_271", + "MXM3_273", + "MXM3_195", + "MXM3_197", + "MXM3_177", + "MXM3_179", + "MXM3_181", + "MXM3_183", + "MXM3_185", + "MXM3_187"; +}; + +&lsio_gpio3 { + gpio-line-names = "MXM3_191", + "", + "MXM3_221", + "MXM3_225", + "MXM3_223", + "MXM3_227", + "MXM3_200", + "MXM3_235", + "MXM3_231", + "MXM3_229", + "MXM3_233", + "MXM3_204", + "MXM3_196", + "", + "MXM3_202", + "", + "", + "", + "MXM3_305", + "MXM3_307", + "MXM3_309", + "MXM3_311", + "MXM3_315", + "MXM3_317", + "MXM3_319", + "MXM3_321", + "MXM3_15/GPIO7", + "MXM3_63", + "MXM3_17/GPIO8", + "MXM3_12", + "MXM3_14", + "MXM3_16"; +}; + +&lsio_gpio4 { + gpio-line-names = "MXM3_18", + "MXM3_11/GPIO5", + "MXM3_13/GPIO6", + "MXM3_274", + "MXM3_84", + "MXM3_262", + "MXM3_96", + "", + "", + "", + "", + "", + "MXM3_190", + "", + "", + "", + "MXM3_269", + "MXM3_251", + "MXM3_253", + "MXM3_295", + "MXM3_299", + "MXM3_301", + "MXM3_297", + "MXM3_293", + "MXM3_291", + "MXM3_289", + "MXM3_287"; +}; + +&lsio_gpio5 { + gpio-line-names = "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "MXM3_150", + "MXM3_160", + "MXM3_162", + "MXM3_144", + "MXM3_146", + "MXM3_148", + "MXM3_152", + "MXM3_156", + "MXM3_158", + "MXM3_159", + "MXM3_184", + "MXM3_180", + "MXM3_186", + "MXM3_188", + "MXM3_176", + "MXM3_178"; +}; + +&lsio_gpio6 { + gpio-line-names = "", + "", + "", + "", + "", + "", + "", + "", + "", + "", + "MXM3_261", + "MXM3_263", + "MXM3_259", + "MXM3_257", + "MXM3_255", + "MXM3_128", + "MXM3_130", + "MXM3_265", + "MXM3_249", + "MXM3_247", + "MXM3_245", + "MXM3_243"; +}; + +/* Apalis UART3 */ +&lpuart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart0>; +}; + +/* Apalis UART1 */ +&lpuart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart1>; +}; + +/* Apalis UART4 */ +&lpuart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart2>; +}; + +/* Apalis UART2 */ +&lpuart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpuart3>; +}; + +&thermal_zones { + pmic-thermal0 { + polling-delay-passive = <250>; + polling-delay = <2000>; + thermal-sensors = <&tsens IMX_SC_R_PMIC_0>; + trips { + pmic_alert0: trip0 { + temperature = <110000>; + hysteresis = <2000>; + type = "passive"; + }; + pmic_crit0: trip1 { + temperature = <125000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + cooling-maps { + map0 { + trip = <&pmic_alert0>; + cooling-device = + <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A72_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A72_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; +}; + +/* Apalis USBO1 */ +&usbotg1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg1>; + adp-disable; + ci-disable-lpm; + hnp-disable; + power-polarity-active-high; + srp-disable; +}; + +/* On-module eMMC */ +&usdhc1 { + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + bus-width = <8>; + non-removable; + status = "okay"; +}; +#if 0 +/* Apalis MMC1 */ +&usdhc2 { + bus-width = <8>; + cd-gpios = <&lsio_gpio2 9 GPIO_ACTIVE_LOW>; /* Apalis MMC1_CD# */ + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_mmc1_cd>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_mmc1_cd>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_mmc1_cd>; +}; + +/* Apalis SD1 */ +&usdhc3 { + bus-width = <4>; + cd-gpios = <&lsio_gpio4 12 GPIO_ACTIVE_LOW>; /* Apalis SD1_CD# */ + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_sd1_cd>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>, <&pinctrl_sd1_cd>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>, <&pinctrl_sd1_cd>; +}; +#endif diff --git a/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi new file mode 100644 index 000000000000..687f7c720462 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qm-apalis.dtsi @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * Copyright 2017-2020 Toradex + */ + +#include "imx8qm-apalis-v1.1.dtsi" + +/ { + model = "Toradex Apalis iMX8QM"; + compatible = "toradex,apalis-imx8qm", "fsl,imx8qm"; +}; + +ðphy0 { + interrupts = <5 IRQ_TYPE_LEVEL_LOW>; +}; + +/* Apalis I2C2 (DDC) */ +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c0>; + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; +}; + +&hdmi { + ddc-i2c-bus = <&i2c0>; +}; + +&pinctrl_fec1 { + fsl,pins = < + IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0 /* Use pads in 1.8V mode */ + IMX8QM_ENET0_MDC_CONN_ENET0_MDC 0x06000020 + IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO 0x06000020 + IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL 0x06000020 + IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC 0x06000020 + IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0 0x06000020 + IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1 0x06000020 + IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2 0x06000020 + IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3 0x06000020 + IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC 0x06000020 + IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL 0x06000020 + IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0 0x06000020 + IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1 0x06000020 + IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2 0x06000020 + IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3 0x06000020 + IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M 0x06000020 + /* On-module ETH_RESET# */ + IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x06000020 + /* On-module ETH_INT# */ + IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05 0x04000060 + >; +}; + +&pinctrl_fec1_sleep { + fsl,pins = < + IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD 0x000014a0 + IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14 0x04000040 + IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13 0x04000040 + IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_IO31 0x04000040 + IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30 0x04000040 + IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO00 0x04000040 + IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO01 0x04000040 + IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO02 0x04000040 + IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO03 0x04000040 + IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04 0x04000040 + IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_IO05 0x04000040 + IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO06 0x04000040 + IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO07 0x04000040 + IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08 0x04000040 + IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09 0x04000040 + IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15 0x04000040 + IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11 0x04000040 + IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05 0x04000040 + >; +}; + +&iomuxc { + apalis-imx8qm { + /* Apalis I2C2 (DDC) */ + pinctrl_lpi2c0: lpi2c0grp { + fsl,pins = < + IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 0x04000022 + IMX8QM_HDMI_TX0_TS_SDA_DMA_I2C0_SDA 0x04000022 + >; + }; + }; +}; + +/* On-module PCIe_CTRL0_CLKREQ */ +&pinctrl_pcie_sata_refclk { + fsl,pins = < + IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27 0x00000021 + >; +}; + +/* Apalis MMC1 */ +&usdhc2 { + /* + * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates + * issues with certain SD cards, disable 1.8V signaling for now. + */ + no-1-8-v; +}; + +/* Apalis SD1 */ +&usdhc3 { + /* + * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates + * issues with certain SD cards, disable 1.8V signaling for now. + */ + no-1-8-v; +}; |