diff options
| author | Laurentiu Palcu <laurentiu.palcu@nxp.com> | 2019-11-19 16:01:30 +0200 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:10:22 +0800 |
| commit | de7a191d8428ba7deb69147b18fcc81973a1d8d2 (patch) | |
| tree | 5a6dc0441378d316d6376ce8d717be4d8f0dd5f7 | |
| parent | baabcb7a2cc6ae08043ff5bd90fe469b57633e41 (diff) | |
arm64: dts: imx8mq: remove dcss entries from dts files
Remove the DCSS entries from DTS. Will add them back, after the upstream DCSS
driver is added back.
Signed-off-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 11 | ||||
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8mq.dtsi | 28 |
2 files changed, 0 insertions, 39 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts index f6729e203991..191dd65730e1 100755 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts @@ -1074,17 +1074,6 @@ status = "okay"; }; -&dcss { - status = "okay"; - disp-dev = "hdmi_disp"; - - port@0 { - dcss_out: endpoint { - remote-endpoint = <&hdmi_in>; - }; - }; -}; - &hdmi { compatible = "cdn,imx8mq-hdmi"; lane-mapping = <0xe4>; diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 54f8ecf8989c..a798e1a4116c 100755 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -1219,34 +1219,6 @@ interrupt-controller; #interrupt-cells = <1>; }; - - dcss: dcss@0x32e00000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "nxp,imx8mq-dcss"; - reg = <0x32e00000 0x2D000>, <0x32e2f000 0x1000>; - interrupts = <6>, <8>, <9>; - interrupt-names = "ctx_ld", "ctxld_kick", "vblank"; - interrupt-parent = <&irqsteer>; - clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>, - <&clk IMX8MQ_CLK_DISP_AXI_ROOT>, - <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>, - <&clk IMX8MQ_VIDEO2_PLL_OUT>, - <&clk IMX8MQ_CLK_DISP_DTRC>, - <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>, - <&clk IMX8MQ_CLK_PHY_27MHZ>; - clock-names = "apb", "axi", "rtrm", "pix", - "dtrc", "pll_src", "pll_phy_ref"; - assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>, - <&clk IMX8MQ_CLK_DISP_RTRM>, - <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>; - assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, - <&clk IMX8MQ_SYS1_PLL_800M>, - <&clk IMX8MQ_CLK_27M>; - assigned-clock-rates = <800000000>, - <400000000>; - status = "disabled"; - }; }; gpu: gpu@38000000 { |