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authorBrian Niebuhr <bniebuhr@efjohnson.com>2010-10-06 18:32:40 +0530
committerSekhar Nori <nsekhar@ti.com>2010-11-18 18:38:37 +0530
commit035540f6ea2394bdd9675552d31e1125cd0e402e (patch)
tree2e8673d2920cd473aef270e05f4520456d5c3090
parentd8c174cdeb6511aa307e6058468b68a9cc3990e4 (diff)
spi: davinci: add additional comments
Add comments describing the platform data members and per-chip-select SPI configuration structure. Also, add some comments describing the what happens during the driver probe. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
-rw-r--r--arch/arm/mach-davinci/include/mach/spi.h32
-rw-r--r--drivers/spi/davinci_spi.c7
2 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index 1f8b7866bea3..38f4da5ca135 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -26,6 +26,20 @@ enum {
SPI_VERSION_2, /* For DA8xx */
};
+/**
+ * davinci_spi_platform_data - Platform data for SPI master device on DaVinci
+ *
+ * @version: version of the SPI IP. Different DaVinci devices have slightly
+ * varying versions of the same IP.
+ * @num_chipselect: number of chipselects supported by this SPI master
+ * @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt
+ * controller withn the SoC. Possible values are 0 and 1.
+ * @chip_sel: list of GPIOs which can act as chip-selects for the SPI.
+ * SPI_INTERN_CS denotes internal SPI chip-select. Not necessary
+ * to populate if all chip-selects are internal.
+ * @cshold_bug: set this to true if the SPI controller on your chip requires
+ * a write to CSHOLD bit in between transfers (like in DM355).
+ */
struct davinci_spi_platform_data {
u8 version;
u8 num_chipselect;
@@ -34,6 +48,24 @@ struct davinci_spi_platform_data {
bool cshold_bug;
};
+/**
+ * davinci_spi_config - Per-chip-select configuration for SPI slave devices
+ *
+ * @wdelay: amount of delay between transmissions. Measured in number of
+ * SPI module clocks.
+ * @odd_parity: polarity of parity flag at the end of transmit data stream.
+ * 0 - odd parity, 1 - even parity.
+ * @parity_enable: enable transmission of parity at end of each transmit
+ * data stream.
+ * @io_type: type of IO transfer. Choose between polled, interrupt and DMA.
+ * @timer_disable: disable chip-select timers (setup and hold)
+ * @c2tdelay: chip-select setup time. Measured in number of SPI module clocks.
+ * @t2cdelay: chip-select hold time. Measured in number of SPI module clocks.
+ * @t2edelay: transmit data finished to SPI ENAn pin inactive time. Measured
+ * in number of SPI clocks.
+ * @c2edelay: chip-select active to SPI ENAn signal active time. Measured in
+ * number of SPI clocks.
+ */
struct davinci_spi_config {
u8 wdelay;
u8 odd_parity;
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 2ec5fd2f2e7b..f40f1be1528a 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -787,6 +787,13 @@ rx_dma_failed:
/**
* davinci_spi_probe - probe function for SPI Master Controller
* @pdev: platform_device structure which contains plateform specific data
+ *
+ * According to Linux Device Model this function will be invoked by Linux
+ * with platform_device struct which contains the device specific info.
+ * This function will map the SPI controller's memory, register IRQ,
+ * Reset SPI controller and setting its registers to default value.
+ * It will invoke spi_bitbang_start to create work queue so that client driver
+ * can register transfer method to work queue.
*/
static int davinci_spi_probe(struct platform_device *pdev)
{