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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2016-01-06 18:18:07 +0100
committerMax Krummenacher <max.krummenacher@toradex.com>2016-03-08 15:13:54 +0100
commit29a3e3db2da1cfa7579b94deacfc1ec5eb79355f (patch)
treebcb8c3862858ffc8e222e2659863abb34bc986d5
parent7a1647038ef8bfb6e92e03cbd5588e78a6be68a6 (diff)
PCI: imx6: improve GEN2 disable handling
Improve GEN2 disable handling more in-line with how Gateworks did it in their gateworks_fslc_3.14_1.0.x_ga branch on github. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
-rw-r--r--drivers/pci/host/pci-imx6.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c
index fb01d6110d31..5dd6a33293bd 100644
--- a/drivers/pci/host/pci-imx6.c
+++ b/drivers/pci/host/pci-imx6.c
@@ -500,9 +500,8 @@ static int imx6_pcie_start_link(struct pcie_port *pp)
struct imx6_pcie *imx6_pcie = to_imx6_pcie(pp);
uint32_t tmp;
int ret;
-#ifndef CONFIG_PCI_FORCE_GEN1
int count;
-#endif
+
/*
* Force Gen1 operation when starting the link. In case the link is
* started in Gen2 mode, there is a possibility the devices on the
@@ -528,6 +527,9 @@ static int imx6_pcie_start_link(struct pcie_port *pp)
tmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK;
tmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN2;
writel(tmp, pp->dbi_base + PCIE_RC_LCR);
+#else
+ dev_info(pp->dev, "Configuration forces GEN1\n");
+#endif /* CONFIG_PCI_FORCE_GEN1 */
/*
* Start Directed Speed Change so the best possible speed both link
@@ -551,9 +553,6 @@ static int imx6_pcie_start_link(struct pcie_port *pp)
ret = imx6_pcie_wait_for_link(pp);
else
ret = -EINVAL;
-#else
- dev_info(pp->dev, "Configuration forces GEN1\n");
-#endif /* CONFIG_PCI_FORCE_GEN1 */
out:
if (ret) {