diff options
| author | Shawn Xiao <b49994@freescale.com> | 2014-10-10 10:50:46 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-01-15 21:18:20 -0600 |
| commit | 9d08142952fc84a5802fc06236f1d046fe8054a4 (patch) | |
| tree | ecef35c5addfd9a5dd336bd7a7fe77760ffa16ad | |
| parent | 524d1bb8e41c41edcc804786233eb416ed43d9a5 (diff) | |
MLK-9672-1 imx6sx:dts:Add GPU module
Add GPU module to imx6sx.dtsi to enable GPU on imx6sx borad
Add power-domain-cell in gpc module to enable power-domain for GPU
Use macro instead of hard code to describe GPU interrupt resource
Signed-off-by: Shawn Xiao <b49994@freescale.com>
| -rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index e54aaddd1a87..2f5d18e21ec3 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -161,6 +161,21 @@ arm,data-latency = <4 2 3>; }; + gpu: gpu@01800000 { + compatible = "fsl,imx6sx-gpu", "fsl,imx6q-gpu"; + reg = <0x01800000 0x4000>, <0x80000000 0x0>; + reg-names = "iobase_3d", "phys_baseaddr"; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "irq_3d"; + clocks = <&clks IMX6SX_CLK_GPU_AXI_PODF>, <&clks IMX6SX_CLK_GPU>, + <&clks 0>; + clock-names = "gpu3d_axi_clk", "gpu3d_clk", + "gpu3d_shader_clk"; + resets = <&src 0>; + reset-names = "gpu3d"; + power-domains = <&gpc 1>; + }; + dma_apbh: dma-apbh@01804000 { compatible = "fsl,imx6sx-dma-apbh", "fsl,imx28-dma-apbh"; reg = <0x01804000 0x2000>; @@ -720,6 +735,7 @@ reg = <0x020dc000 0x4000>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; fsl,mf-mix-wakeup-irq = <0x7c00000 0x3d00 0x0 0x400200>; + #power-domain-cells = <1>; }; iomuxc: iomuxc@020e0000 { |