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authorVenu Byravarasu <vbyravarasu@nvidia.com>2013-01-16 03:30:19 +0000
committerStephen Warren <swarren@nvidia.com>2013-01-28 11:20:05 -0700
commite374b65c9b15c17685925e45a3f8e97c80a75e5e (patch)
tree5c18eefccc847b2af0ee37e8aa52f4463811d54a
parent5e18150a7b4139e15e1ed7d7c938dd91f7f12354 (diff)
ARM: tegra: add DT nodes for Tegra USB PHY
Add DT nodes for Tegra USB PHY along with related documentation. Also added a phandle property to controller DT node, for referring to connected PHY instance. Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
-rw-r--r--Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt1
-rw-r--r--Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt14
-rw-r--r--arch/arm/boot/dts/tegra20.dtsi22
3 files changed, 37 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
index 6ea765ad3dad..34c952883276 100644
--- a/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt
@@ -11,6 +11,7 @@ Required properties :
- phy_type : Should be one of "ulpi" or "utmi".
- nvidia,vbus-gpio : If present, specifies a gpio that needs to be
activated for the bus to be powered.
+ - nvidia,phy : phandle of the PHY instance, the controller is connected to.
Required properties for phy_type == ulpi:
- nvidia,phy-reset-gpio : The GPIO used to reset the PHY.
diff --git a/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
new file mode 100644
index 000000000000..84a4c12943af
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/nvidia,tegra20-usb-phy.txt
@@ -0,0 +1,14 @@
+Tegra SOC USB PHY
+
+The device node for Tegra SOC USB PHY:
+
+Required properties :
+ - compatible : Should be "nvidia,tegra20-usb-phy".
+ - reg : Address and length of the register set for the USB PHY interface.
+ - phy_type : Should be one of "ulpi" or "utmi".
+
+Optional properties:
+ - nvidia,has-legacy-mode : boolean indicates whether this controller can
+ operate in legacy mode (as APX 2500 / 2600). In legacy mode some
+ registers are accessed through the APB_MISC base address instead of
+ the USB controller. \ No newline at end of file
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 88cf8332e3f7..3d7ab220ae49 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -400,6 +400,25 @@
#size-cells = <0>;
};
+ phy1: usb-phy@c5000400 {
+ compatible = "nvidia,tegra20-usb-phy";
+ reg = <0xc5000400 0x3c00>;
+ phy_type = "utmi";
+ nvidia,has-legacy-mode;
+ };
+
+ phy2: usb-phy@c5004400 {
+ compatible = "nvidia,tegra20-usb-phy";
+ reg = <0xc5004400 0x3c00>;
+ phy_type = "ulpi";
+ };
+
+ phy3: usb-phy@c5008400 {
+ compatible = "nvidia,tegra20-usb-phy";
+ reg = <0xc5008400 0x3C00>;
+ phy_type = "utmi";
+ };
+
usb@c5000000 {
compatible = "nvidia,tegra20-ehci", "usb-ehci";
reg = <0xc5000000 0x4000>;
@@ -408,6 +427,7 @@
nvidia,has-legacy-mode;
clocks = <&tegra_car 22>;
nvidia,needs-double-reset;
+ nvidia,phy = <&phy1>;
status = "disabled";
};
@@ -417,6 +437,7 @@
interrupts = <0 21 0x04>;
phy_type = "ulpi";
clocks = <&tegra_car 58>;
+ nvidia,phy = <&phy2>;
status = "disabled";
};
@@ -426,6 +447,7 @@
interrupts = <0 97 0x04>;
phy_type = "utmi";
clocks = <&tegra_car 59>;
+ nvidia,phy = <&phy3>;
status = "disabled";
};