diff options
| author | Philippe Schenker <philippe.schenker@toradex.com> | 2018-11-16 11:00:50 +0100 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-12-27 16:29:28 +0100 |
| commit | 85483bb2da5af338e689c4aa69a5ef6e911cf0ef (patch) | |
| tree | 987f6dbd59e2cce975b589ef48eee8fe8fd6322e | |
| parent | 983ff8a6b61e9466beb6b4781fb370a6a7da937a (diff) | |
ARM: dts: imx6: add missing uart transceiver enable pinmux
This adds the enable-pin to uart2 that controls the transceiver for uart2/4.
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
(cherry picked from commit 07a8f35650e711666cf42f4962792d87b3b39b09)
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-apalis-ixora-v1.1.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-apalis-ixora.dtsi | 12 |
2 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-apalis-ixora-v1.1.dtsi b/arch/arm/boot/dts/imx6qdl-apalis-ixora-v1.1.dtsi index 85e9d4d440a4..56d1fa31dd2d 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis-ixora-v1.1.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis-ixora-v1.1.dtsi @@ -292,6 +292,12 @@ MX6QDL_PAD_NANDF_D2__GPIO2_IO02 PAD_CTRL_HYS_PU >; }; + + pinctrl_uart24_forceoff: uart24_forceoff { + fsl,pins = < + MX6QDL_PAD_SD2_CMD__GPIO1_IO11 PAD_CTRL_HYS_PU + >; + }; }; &lcd { @@ -373,6 +379,8 @@ &uart2 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2_dte &pinctrl_uart24_forceoff>; #if 0 linux,rs485-enabled-at-boot-time; rs485-rts-active-low; @@ -382,6 +390,10 @@ &uart4 { status = "okay"; + /* + * note that uart4 is only working with pinctrl_uart24_forceoff that is + * already defined in &uart2 + */ }; &uart5 { diff --git a/arch/arm/boot/dts/imx6qdl-apalis-ixora.dtsi b/arch/arm/boot/dts/imx6qdl-apalis-ixora.dtsi index 9f7f6e705233..917dabdecb6d 100644 --- a/arch/arm/boot/dts/imx6qdl-apalis-ixora.dtsi +++ b/arch/arm/boot/dts/imx6qdl-apalis-ixora.dtsi @@ -270,6 +270,12 @@ MX6QDL_PAD_NANDF_D2__GPIO2_IO02 PAD_CTRL_HYS_PU >; }; + + pinctrl_uart24_forceoff: uart24_forceoff { + fsl,pins = < + MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 PAD_CTRL_HYS_PU + >; + }; }; &lcd { @@ -343,6 +349,8 @@ &uart2 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2_dte &pinctrl_uart24_forceoff>; #if 0 linux,rs485-enabled-at-boot-time; rs485-rts-active-low; @@ -352,6 +360,10 @@ &uart4 { status = "okay"; + /* + * note that uart4 is also depending on pinctrl_uart24_forceoff that is + * already defined in &uart2 + */ }; &uart5 { |