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| author | Tsahee Zidenberg <tsahee@annapurnalabs.com> | 2015-04-05 15:43:53 +0300 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2015-04-14 01:16:13 +0200 |
| commit | 8b036556d68175caa9bea3fb98768f733fde33c6 (patch) | |
| tree | ae65778df3c968fd90244856e3cf5e3830caf88d | |
| parent | 49faf809ab824d7362870b55ef10e900ed9ca8d9 (diff) | |
ARM: dts: alpine: add internal pci
This patch adds device-tree entry for the internal pci bus on Alpine.
Alpine's on-chip devices appear as pci devices on this bus.
Signed-off-by: Tsahee Zidenberg <tsahee@annapurnalabs.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
| -rw-r--r-- | arch/arm/boot/dts/alpine.dtsi | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/alpine.dtsi b/arch/arm/boot/dts/alpine.dtsi index 519f58cc9761..9af2d60e9a7f 100644 --- a/arch/arm/boot/dts/alpine.dtsi +++ b/arch/arm/boot/dts/alpine.dtsi @@ -137,5 +137,24 @@ reg-shift = <2>; reg-io-width = <4>; }; + + /* Internal PCIe Controller */ + pcie-internal@0xfbc00000 { + compatible = "pci-host-ecam-generic"; + device_type = "pci"; + #size-cells = <2>; + #address-cells = <3>; + #interrupt-cells = <1>; + reg = <0x0 0xfbc00000 0x0 0x100000>; + interrupt-map-mask = <0xf800 0 0 7>; + /* Add legacy interrupts for SATA devices only */ + interrupt-map = <0x4000 0 0 1 &gic 0 43 4>, + <0x4800 0 0 1 &gic 0 44 4>; + + /* 32 bit non prefetchable memory space */ + ranges = <0x02000000 0x0 0xfe000000 0x0 0xfe000000 0x0 0x1000000>; + + bus-range = <0x00 0x00>; + }; }; }; |