diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2019-02-14 17:45:10 +0100 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2019-02-14 19:30:18 +0100 |
| commit | 710b8b3e509336c00e04dba7701abaf232423200 (patch) | |
| tree | b31fc110228ca9b2718c7d032f899f1162c546b1 | |
| parent | bd9284fe58ff29c4298ea19a866b8dc6498baa7e (diff) | |
fsl-imx8qxp-colibri-eval-v3.dtsi: add uart_a ctrl signals as gpio
The UART_A doesn't have dedicated control signals (RTS/CTS, DTR/DSR/DCD, RI).
Mux them as GPIOs.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi index 3a7f9abcf14f..246be7454271 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri-eval-v3.dtsi @@ -131,6 +131,16 @@ SC_P_FLEXCAN2_TX_ADMA_UART3_TX 0x06000020 >; }; + pinctrl_lpuart3_ctrl: lpuart3ctrlgrp { + fsl,pins = < + SC_P_MIPI_DSI1_GPIO0_01_LSIO_GPIO2_IO00 0x00000020 /* DTR */ + SC_P_SAI1_RXD_LSIO_GPIO0_IO29 0x00000020 /* CTS */ + SC_P_SAI1_RXC_LSIO_GPIO0_IO30 0x00000020 /* RTS */ + SC_P_CSI_RESET_LSIO_GPIO3_IO03 0x00000020 /* DSR */ + SC_P_USDHC1_CD_B_LSIO_GPIO4_IO22 0x00000020 /* DCD */ + SC_P_CSI_EN_LSIO_GPIO3_IO02 0x00000020 /* RI */ + >; + }; pinctrl_fec1: fec1grp { fsl,pins = < @@ -552,7 +562,7 @@ &lpuart3 { pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_lpuart3>; + pinctrl-0 = <&pinctrl_lpuart3>, <&pinctrl_lpuart3_ctrl>; status = "okay"; }; |