diff options
| author | Max Krummenacher <max.krummenacher@toradex.com> | 2019-01-24 19:45:36 +0100 |
|---|---|---|
| committer | Max Krummenacher <max.krummenacher@toradex.com> | 2019-01-30 19:19:58 +0100 |
| commit | 9b16f29f34f24839c701ca61f4659e960a63da1e (patch) | |
| tree | 582a7fc9e0ff2989dc0461267d4c9a1de834c5a5 | |
| parent | b770e359e16b8db6daf5dfd8c5b3c75f31e38564 (diff) | |
fsl-imx8qm-apalis.dts: add pwm1-4
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts index 4e54bd8464f0..2068933c9d47 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts @@ -312,6 +312,30 @@ >; }; + pinctrl_pwm0: pwm0grp { + fsl,pins = < + SC_P_UART0_RTS_B_LSIO_PWM0_OUT 0x00000020 + >; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = < + SC_P_UART0_CTS_B_LSIO_PWM1_OUT 0x00000020 + >; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = < + SC_P_GPT1_COMPARE_LSIO_PWM2_OUT 0x00000020 + >; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = < + SC_P_GPT0_COMPARE_LSIO_PWM3_OUT 0x00000020 + >; + }; + pinctrl_pwm_bkl: pwmbklgrp { fsl,pins = < SC_P_LVDS1_GPIO00_LVDS1_PWM0_OUT 0x00000020 @@ -526,6 +550,34 @@ status = "okay"; }; +/* PWM3, MXM3 pin 6 */ +&pwm0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0>; + status = "okay"; +}; + +/* PWM4, MXM3 pin 8 */ +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "okay"; +}; + +/* PWM1, MXM3 pin 2 */ +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "okay"; +}; + +/* PWM2, MXM3 pin 4 */ +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; + status = "okay"; +}; + &lvds1_pwm { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm_bkl>; |