diff options
| author | Fugang Duan <fugang.duan@nxp.com> | 2017-11-16 14:50:36 +0800 |
|---|---|---|
| committer | Fugang Duan <fugang.duan@nxp.com> | 2017-11-16 15:04:23 +0800 |
| commit | 43747ff885f3883f34710830798a7e98f4d96b84 (patch) | |
| tree | cf30d4ec92c50de383f53f98881f761c6d9bfb1a | |
| parent | ffdc510eecbcbe68b0171804f146872a04128596 (diff) | |
MLK-16835 ARM64: dts: imx8mq-evk-pcie1-m2: enable usdhc2 node
i.MX8MQ EVK RevA0/A1 board PCIe M.2 rework for 1CQ WIFI has
pin conflict with usdhc2 node, so disable the node in the extended
dts file. But for EVK RevB1/B2 board, there have no pin conflict
with usdhc1 node.
The change drop RevA0/A1 board PCIe M.2 WIFI support, and only support
RevB1/B2 or later boards. Then usdhc2 can work now.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-pcie1-m2.dts | 82 |
1 files changed, 51 insertions, 31 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-pcie1-m2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-pcie1-m2.dts index 8172be470012..feae708c4185 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-pcie1-m2.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mq-evk-pcie1-m2.dts @@ -12,41 +12,61 @@ * GNU General Public License for more details. */ +/* + * NOTE: + * 1. The DTS file only support i.MX8MQ EVK RevB1/B2 board PCIe M.2 Murata + * 1CQ (Qca6174) WIFI & BT. + * EVK RevB1 rework: + * WIFI rework: fly line from R1436 (near to M.2) to R1459 + * BT rework: ensure R1446,R1447,R1448,R1449 installed on board + * EVK RevB2 rework: no rework + * + * 2. If need to support i.MX8MQ EVK RevA0/A1 board PCIe M.2 Murata 1CQ + * (Qca6174) WIFI & BT, some board rework requirement: + * EVK RevA0 rework: + * WIFI rework: install R1436 for wlreg_on + * EVK RevA0 rework: + * WIFI rework: install R1436 for wlreg_on + * BT rework: fly line from M.2 pin54 to R1437 + * Also, below DTS change requirement: + * / { + * regulators { + * epdev_on: fixedregulator@100 { + * compatible = "regulator-fixed"; + * regulator-min-microvolt = <3300000>; + * regulator-max-microvolt = <3300000>; + * regulator-name = "epdev_on"; + * gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; + * enable-active-high; + * }; + * }; + * }; + * + * &iomuxc { + * imx8mq-evk { + * pinctrl_epdev_on: epdevongrp { + * fsl,pins = < + * MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x16 + * >; + * }; + * }; + * }; + * + * &pcie1{ + * pinctrl-names = "default"; + * pinctrl-0 = <&pinctrl_pcie1 &pinctrl_epdev_on>; + * epdev_on-supply = <&epdev_on>; + * }; + * + * &usdhc2 { + * status = "disabled"; + * }; + */ + #include "fsl-imx8mq-evk.dts" / { modem_reset: modem-reset { reset-gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>; }; - - regulators { - epdev_on: fixedregulator@100 { - compatible = "regulator-fixed"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "epdev_on"; - gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; - enable-active-high; - }; - }; -}; - -&iomuxc { - imx8mq-evk { - pinctrl_epdev_on: epdevongrp { - fsl,pins = < - MX8MQ_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x16 - >; - }; - }; -}; - -&pcie1{ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pcie1 &pinctrl_epdev_on>; - epdev_on-supply = <&epdev_on>; -}; - -&usdhc2 { - status = "disabled"; }; |