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authorRobert Chiras <robert.chiras@nxp.com>2017-10-16 15:21:07 +0300
committerRobert Chiras <robert.chiras@nxp.com>2017-11-10 10:12:42 +0200
commitfc560ca7e7cb3381342846a44896a4b65c16a4a5 (patch)
tree7e0d2f2fcebd8410c47ab5e95f1af2d286c88e84
parentf371d90f817d620852c29c9298d281a4e1fcc05b (diff)
MLK-16347-8: arm64: dts: fsl-imx8qm-lpddr4-arm2: Enable mipi-dsi with adv7535
Enable the MIPI-DSI to ADV7535 DSI2HDMI converter path on the MX8QM LPDDR4 development board. Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
-rw-r--r--arch/arm64/boot/dts/freescale/Makefile3
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-dsi-adv7535.dts107
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts16
3 files changed, 116 insertions, 10 deletions
diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
index b81406c08041..ad93f0adbfda 100644
--- a/arch/arm64/boot/dts/freescale/Makefile
+++ b/arch/arm64/boot/dts/freescale/Makefile
@@ -15,7 +15,8 @@ dtb-$(CONFIG_ARCH_FSL_IMX8QM) += fsl-imx8qm-lpddr4-arm2.dtb \
fsl-imx8qm-lpddr4-arm2-lpspi.dtb \
fsl-imx8qm-lpddr4-arm2-spdif.dtb \
fsl-imx8qm-lpddr4-arm2-mqs.dtb \
- fsl-imx8qm-lpddr4-arm2-usb3.dtb
+ fsl-imx8qm-lpddr4-arm2-usb3.dtb \
+ fsl-imx8qm-lpddr4-arm2-dsi-adv7535.dtb
dtb-$(CONFIG_ARCH_FSL_IMX8QXP) += fsl-imx8qxp-lpddr4-arm2.dtb \
fsl-imx8qxp-mek.dtb \
fsl-imx8qxp-mek-enet2.dtb \
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-dsi-adv7535.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-dsi-adv7535.dts
new file mode 100644
index 000000000000..8793030d1a0e
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2-dsi-adv7535.dts
@@ -0,0 +1,107 @@
+/*
+ * Copyright 2017 NXP
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include "fsl-imx8qm-lpddr4-arm2.dts"
+
+&hdmi {
+ status = "disabled";
+};
+
+&ldb1_phy {
+ status = "disabled";
+};
+
+&ldb1 {
+ status = "disabled";
+};
+
+&ldb2_phy {
+ status = "disabled";
+};
+
+&ldb2 {
+ status = "disabled";
+};
+
+&i2c0_mipi_dsi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mipi0_lpi2c0>;
+ clock-frequency = <100000>;
+ status = "okay";
+
+ adv_bridge1: adv7535@3d {
+ compatible = "adi,adv7535", "adi,adv7533";
+ reg = <0x3d>;
+ adi,dsi-lanes = <4>;
+ status = "okay";
+
+ port {
+ adv7535_1_in: endpoint {
+ remote-endpoint = <&mipi_dsi1_out>;
+ };
+ };
+ };
+};
+
+&mipi_dsi_phy1 {
+ status = "okay";
+};
+
+&mipi_dsi1 {
+ status = "okay";
+
+ port@1 {
+ mipi_dsi1_out: endpoint {
+ remote-endpoint = <&adv7535_1_in>;
+ };
+ };
+};
+
+&i2c0_mipi_dsi1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mipi1_lpi2c0>;
+ clock-frequency = <100000>;
+ status = "okay";
+
+ adv_bridge2: adv7535@3d {
+ compatible = "adi,adv7535", "adi,adv7533";
+ reg = <0x3d>;
+ adi,dsi-lanes = <4>;
+ status = "okay";
+
+ port {
+ adv7535_2_in: endpoint {
+ remote-endpoint = <&mipi_dsi2_out>;
+ };
+ };
+ };
+};
+
+&mipi_dsi_phy2 {
+ status = "okay";
+};
+
+&mipi_dsi2 {
+ status = "okay";
+
+ port@1 {
+ mipi_dsi2_out: endpoint {
+ remote-endpoint = <&adv7535_2_in>;
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
index 1f28e9cf361b..495a88845fe6 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-lpddr4-arm2.dts
@@ -290,6 +290,13 @@
>;
};
+ pinctrl_mipi1_lpi2c0: mipi1_lpi2c0grp {
+ fsl,pins = <
+ SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc600004c
+ SC_P_MIPI_DSI1_I2C0_SDA_MIPI_DSI1_I2C0_SDA 0xc600004c
+ >;
+ };
+
pinctrl_lpi2c0: lpi2c0grp {
fsl,pins = <
SC_P_HDMI_TX0_TS_SCL_DMA_I2C0_SCL 0xc600004c
@@ -679,15 +686,6 @@
};
};
-&i2c0_mipi_dsi0 {
- #address-cells = <1>;
- #size-cells = <0>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_mipi0_lpi2c0>;
- clock-frequency = <100000>;
- status = "okay";
-};
-
&i2c0_hdmi {
#address-cells = <1>;
#size-cells = <0>;