diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2018-05-02 11:26:57 +0200 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2018-05-02 11:26:57 +0200 |
| commit | 37a91946277a49ddb51e54f1070207228c5ea48c (patch) | |
| tree | cb309e21582cd2b1b7d432e5322e01bead73e1b1 | |
| parent | d6ec2d954abbdf639cbb435c89cad71775e24795 (diff) | |
apalis-imx8qm: add Apalis I2C1 and RTC support
Add carrier board RTC support.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts index 0772ec6c41b6..e46834bf7271 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts @@ -21,6 +21,11 @@ model = "Toradex Apalis iMX8QM"; compatible = "toradex,imx8qm-apalis", "fsl,imx8qm"; + aliases { + rtc0 = &rtc_i2c; + rtc1 = &rtc; + }; + chosen { bootargs = "console=ttyLP1,115200 earlycon=lpuart32,0x5a070000,115200"; stdout-path = &lpuart1; @@ -169,6 +174,13 @@ >; }; + pinctrl_lpi2c2: lpi2c2grp { + fsl,pins = < + SC_P_GPT1_CLK_DMA_I2C2_SCL 0xc600004c + SC_P_GPT1_CAPTURE_DMA_I2C2_SDA 0xc600004c + >; + }; + pinctrl_lpi2c3: lpi2c3grp { fsl,pins = < SC_P_SIM0_PD_DMA_I2C3_SCL 0xc600004c @@ -538,6 +550,22 @@ }; }; +/* Apalis I2C1 */ +&i2c2 { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lpi2c2>; + status = "okay"; + + /* M41T0M6 real time clock on carrier board */ + rtc_i2c: rtc@68 { + compatible = "st,m41t0"; + reg = <0x68>; + }; +}; + &i2c3 { #address-cells = <1>; #size-cells = <0>; |