diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2018-06-15 19:11:07 +0200 |
|---|---|---|
| committer | Stefan Agner <stefan.agner@toradex.com> | 2018-06-15 19:11:07 +0200 |
| commit | 4327a27b34c2c83b7998087e7cad928272aa1d4d (patch) | |
| tree | 4a81c3fec96be2e5c8bbe55f98552209a76c2277 | |
| parent | 9b8da32493057502a912b6d1426eadeb76780e69 (diff) | |
apalis-imx8qm: remove lpcg_xxx clocks in module level dt
Remove lpcg_xxx clocks (pcie_per) also in module level device tree.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts index dbe04811b295..75c39e765472 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qm-apalis.dts @@ -895,10 +895,9 @@ clocks = <&clk IMX8QM_HSIO_PCIE_A_MSTR_AXI_CLK>, <&clk IMX8QM_HSIO_PCIE_A_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_0>, - <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>, <&clk IMX8QM_HSIO_PCIE_A_DBI_AXI_CLK>, <&pcie_sata_refclk_gate>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi", "pcie_ext"; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi", "pcie_ext"; reset-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>; status = "okay"; @@ -912,10 +911,9 @@ clocks = <&clk IMX8QM_HSIO_PCIE_B_MSTR_AXI_CLK>, <&clk IMX8QM_HSIO_PCIE_B_SLV_AXI_CLK>, <&clk IMX8QM_HSIO_PHY_X2_PCLK_1>, - <&clk IMX8QM_HSIO_PCIE_X2_PER_CLK>, <&clk IMX8QM_HSIO_PCIE_B_DBI_AXI_CLK>, <&pcie_sata_refclk_gate>; - clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_per", "pcie_inbound_axi", "pcie_ext"; + clock-names = "pcie", "pcie_bus", "pcie_phy", "pcie_inbound_axi", "pcie_ext"; reset-gpio = <&gpio5 0 GPIO_ACTIVE_HIGH>; /*clkreq-gpio = <&gpio4 30 GPIO_ACTIVE_LOW>;*/ |