diff options
| author | Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> | 2023-06-01 13:45:05 +0300 |
|---|---|---|
| committer | Francesco Dolcini <francesco.dolcini@toradex.com> | 2023-06-19 15:31:12 +0200 |
| commit | 2a787aca993b5c502a3d7cdae85e0ddce826788d (patch) | |
| tree | aaf455942b242235c631a496700f3c6f4c7569d1 | |
| parent | e6d358de2348661f5cd06f2ce6bc3d39d42e95ef (diff) | |
HACK: drm: tidss: clk_set_rate issue workaround
Sometimes when changing the VP clock rate, the result is getting a clock
rate of 0, which obviously then breaks the display. As a quick
workaround, setting the rate a second time seems to fix the problem.
Upstream-Status: Inappropriate [other]
Just a temporary hack, this should be fixed on the TI SYSFW.
Reported to TI [1] and waiting for a fix.
[1] https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1239552/am625-clk_set_rate-failing-on-tidss-driver-sysfw-bug
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
| -rw-r--r-- | drivers/gpu/drm/tidss/tidss_dispc.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c index 5571ddfe3c44..4c95f563a530 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -1346,6 +1346,25 @@ int dispc_vp_set_clk_rate(struct dispc_device *dispc, u32 hw_videoport, new_rate = clk_get_rate(dispc->vp_clk[hw_videoport]); + /* + * XXX: There seems to be a bug somewhere, causing the clock to be 0 + * in some cases (when changing the video mode). Retrying the + * clk_set_rate "fixes" it. + */ + if (new_rate == 0) { + dev_warn(dispc->dev, "vp%d: applying clk_set_rate workaround\n", + hw_videoport); + + r = clk_set_rate(dispc->vp_clk[hw_videoport], rate); + if (r) { + dev_err(dispc->dev, "vp%d: failed to set clk rate to %lu\n", + hw_videoport, rate); + return r; + } + + new_rate = clk_get_rate(dispc->vp_clk[hw_videoport]); + } + if (dispc_pclk_diff(rate, new_rate) > 5) dev_warn(dispc->dev, "vp%d: Clock rate %lu differs over 5%% from requested %lu\n", |