diff options
author | Aaron Brice <aaron.brice@datasoft.com> | 2016-10-06 15:13:04 -0700 |
---|---|---|
committer | Stefan Agner <stefan@agner.ch> | 2018-05-30 14:07:05 +0200 |
commit | fdd5ac219ee5a69c8c722b4f2162804d59e71cc6 (patch) | |
tree | 7c26cb740e51a939eeeac97c42dfe739fda6fa2d | |
parent | 39ac0033f2345ce7b5d8ca4439192407dacb2355 (diff) |
tty: serial: fsl_lpuart: Fix Tx DMA edge case
In the case where head == 0 on the circular buffer, there should be one
DMA buffer, not two. The second zero-length buffer would break the
lpuart driver, transfer would never complete.
Signed-off-by: Aaron Brice <aaron.brice@datasoft.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
-rw-r--r-- | drivers/tty/serial/fsl_lpuart.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/tty/serial/fsl_lpuart.c b/drivers/tty/serial/fsl_lpuart.c index e0151f7317dc..67ec256b1edd 100644 --- a/drivers/tty/serial/fsl_lpuart.c +++ b/drivers/tty/serial/fsl_lpuart.c @@ -331,7 +331,7 @@ static void lpuart_dma_tx(struct lpuart_port *sport) sport->dma_tx_bytes = uart_circ_chars_pending(xmit); - if (xmit->tail < xmit->head) { + if (xmit->tail < xmit->head || xmit->head == 0) { sport->dma_tx_nents = 1; sg_init_one(sgl, xmit->buf + xmit->tail, sport->dma_tx_bytes); } else { |