diff options
| author | Fugang Duan <B38611@freescale.com> | 2011-11-10 15:58:13 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2012-01-09 21:06:03 +0800 |
| commit | ca74b602740a6a22250b861eeb06c620505cb49e (patch) | |
| tree | 90ed4900c94e1e66ab05336570add464863edcbb | |
| parent | 3bf003c990c97187e5c939215e0799b0739daa9a (diff) | |
ENGR00159982-1 [MX6] : Fix FEC get clock rate function.
- The clock formula has error, fix the get clock rate
for FEC module.
Signed-off-by: Fugang Duan <B38611@freescale.com>
| -rw-r--r-- | arch/arm/mach-mx6/clock.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/arm/mach-mx6/clock.c b/arch/arm/mach-mx6/clock.c index f5c7ba08af24..a0db56dca5f7 100644 --- a/arch/arm/mach-mx6/clock.c +++ b/arch/arm/mach-mx6/clock.c @@ -3394,7 +3394,22 @@ static unsigned long _clk_enet_get_rate(struct clk *clk) div = (__raw_readl(PLL8_ENET_BASE_ADDR)) & ANADIG_PLL_ENET_DIV_SELECT_MASK; - return 500000000 / (div + 1); + switch (div) { + case 0: + div = 20; + break; + case 1: + div = 10; + break; + case 3: + div = 5; + break; + case 4: + div = 4; + break; + } + + return 500000000 / div; } static struct clk enet_clk[] = { |